drivers/gpu/drm/nouveau/nouveau_bo.c

   1 /*
   2  * Copyright 2007 Dave Airlied
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24 /*
  25  * Authors: Dave Airlied <airlied@linux.ie>
  26  *          Ben Skeggs   <darktama@iinet.net.au>
  27  *          Jeremy Kolb  <jkolb@brandeis.edu>
  28  */
  29
  30 #include <linux/dma-mapping.h>
  31 #include <linux/swiotlb.h>
  32
  33 #include "nouveau_drv.h"
  34 #include "nouveau_chan.h"
  35 #include "nouveau_fence.h"
  36
  37 #include "nouveau_bo.h"
  38 #include "nouveau_ttm.h"
  39 #include "nouveau_gem.h"
  40 #include "nouveau_mem.h"
  41 #include "nouveau_vmm.h"
  42
  43 #include <nvif/class.h>
  44 #include <nvif/if500b.h>
  45 #include <nvif/if900b.h>
  46
  47 static int nouveau_ttm_tt_bind(struct ttm_bo_device *bdev, struct ttm_tt *ttm,
  48                                struct ttm_resource *reg);
  49
  50 /*
  51  * NV10-NV40 tiling helpers
  52  */
  53
  54 static void
  55 nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
  56                            u32 addr, u32 size, u32 pitch, u32 flags)
  57 {
  58         struct nouveau_drm *drm = nouveau_drm(dev);
  59         int i = reg - drm->tile.reg;
  60         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
  61         struct nvkm_fb_tile *tile = &fb->tile.region[i];
  62
  63         nouveau_fence_unref(&reg->fence);
  64
  65         if (tile->pitch)
  66                 nvkm_fb_tile_fini(fb, i, tile);
  67
  68         if (pitch)
  69                 nvkm_fb_tile_init(fb, i, addr, size, pitch, flags, tile);
  70
  71         nvkm_fb_tile_prog(fb, i, tile);
  72 }
  73
  74 static struct nouveau_drm_tile *
  75 nv10_bo_get_tile_region(struct drm_device *dev, int i)
  76 {
  77         struct nouveau_drm *drm = nouveau_drm(dev);
  78         struct nouveau_drm_tile *tile = &drm->tile.reg[i];
  79
  80         spin_lock(&drm->tile.lock);
  81
  82         if (!tile->used &&
  83             (!tile->fence || nouveau_fence_done(tile->fence)))
  84                 tile->used = true;
  85         else
  86                 tile = NULL;
  87
  88         spin_unlock(&drm->tile.lock);
  89         return tile;
  90 }
  91
  92 static void
  93 nv10_bo_put_tile_region(struct drm_device *dev, struct nouveau_drm_tile *tile,
  94                         struct dma_fence *fence)
  95 {
  96         struct nouveau_drm *drm = nouveau_drm(dev);
  97
  98         if (tile) {
  99                 spin_lock(&drm->tile.lock);
 100                 tile->fence = (struct nouveau_fence *)dma_fence_get(fence);
 101                 tile->used = false;
 102                 spin_unlock(&drm->tile.lock);
 103         }
 104 }
 105
 106 static struct nouveau_drm_tile *
 107 nv10_bo_set_tiling(struct drm_device *dev, u32 addr,
 108                    u32 size, u32 pitch, u32 zeta)
 109 {
 110         struct nouveau_drm *drm = nouveau_drm(dev);
 111         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
 112         struct nouveau_drm_tile *tile, *found = NULL;
 113         int i;
 114
 115         for (i = 0; i < fb->tile.regions; i++) {
 116                 tile = nv10_bo_get_tile_region(dev, i);
 117
 118                 if (pitch && !found) {
 119                         found = tile;
 120                         continue;
 121
 122                 } else if (tile && fb->tile.region[i].pitch) {
 123                         /* Kill an unused tile region. */
 124                         nv10_bo_update_tile_region(dev, tile, 0, 0, 0, 0);
 125                 }
 126
 127                 nv10_bo_put_tile_region(dev, tile, NULL);
 128         }
 129
 130         if (found)
 131                 nv10_bo_update_tile_region(dev, found, addr, size, pitch, zeta);
 132         return found;
 133 }
 134
 135 static void
 136 nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
 137 {
 138         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 139         struct drm_device *dev = drm->dev;
 140         struct nouveau_bo *nvbo = nouveau_bo(bo);
 141
 142         WARN_ON(nvbo->bo.pin_count > 0);
 143         nouveau_bo_del_io_reserve_lru(bo);
 144         nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
 145
 146         /*
 147          * If nouveau_bo_new() allocated this buffer, the GEM object was never
 148          * initialized, so don't attempt to release it.
 149          */
 150         if (bo->base.dev)
 151                 drm_gem_object_release(&bo->base);
 152
 153         kfree(nvbo);
 154 }
 155
 156 static inline u64
 157 roundup_64(u64 x, u32 y)
 158 {
 159         x += y - 1;
 160         do_div(x, y);
 161         return x * y;
 162 }
 163
 164 static void
 165 nouveau_bo_fixup_align(struct nouveau_bo *nvbo, int *align, u64 *size)
 166 {
 167         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 168         struct nvif_device *device = &drm->client.device;
 169
 170         if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
 171                 if (nvbo->mode) {
 172                         if (device->info.chipset >= 0x40) {
 173                                 *align = 65536;
 174                                 *size = roundup_64(*size, 64 * nvbo->mode);
 175
 176                         } else if (device->info.chipset >= 0x30) {
 177                                 *align = 32768;
 178                                 *size = roundup_64(*size, 64 * nvbo->mode);
 179
 180                         } else if (device->info.chipset >= 0x20) {
 181                                 *align = 16384;
 182                                 *size = roundup_64(*size, 64 * nvbo->mode);
 183
 184                         } else if (device->info.chipset >= 0x10) {
 185                                 *align = 16384;
 186                                 *size = roundup_64(*size, 32 * nvbo->mode);
 187                         }
 188                 }
 189         } else {
 190                 *size = roundup_64(*size, (1 << nvbo->page));
 191                 *align = max((1 <<  nvbo->page), *align);
 192         }
 193
 194         *size = roundup_64(*size, PAGE_SIZE);
 195 }
 196
 197 struct nouveau_bo *
 198 nouveau_bo_alloc(struct nouveau_cli *cli, u64 *size, int *align, u32 domain,
 199                  u32 tile_mode, u32 tile_flags)
 200 {
 201         struct nouveau_drm *drm = cli->drm;
 202         struct nouveau_bo *nvbo;
 203         struct nvif_mmu *mmu = &cli->mmu;
 204         struct nvif_vmm *vmm = cli->svm.cli ? &cli->svm.vmm : &cli->vmm.vmm;
 205         int i, pi = -1;
 206
 207         if (!*size) {
 208                 NV_WARN(drm, "skipped size %016llx\n", *size);
 209                 return ERR_PTR(-EINVAL);
 210         }
 211
 212         nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
 213         if (!nvbo)
 214                 return ERR_PTR(-ENOMEM);
 215         INIT_LIST_HEAD(&nvbo->head);
 216         INIT_LIST_HEAD(&nvbo->entry);
 217         INIT_LIST_HEAD(&nvbo->vma_list);
 218         nvbo->bo.bdev = &drm->ttm.bdev;
 219
 220         /* This is confusing, and doesn't actually mean we want an uncached
 221          * mapping, but is what NOUVEAU_GEM_DOMAIN_COHERENT gets translated
 222          * into in nouveau_gem_new().
 223          */
 224         if (domain & NOUVEAU_GEM_DOMAIN_COHERENT) {
 225                 /* Determine if we can get a cache-coherent map, forcing
 226                  * uncached mapping if we can't.
 227                  */
 228                 if (!nouveau_drm_use_coherent_gpu_mapping(drm))
 229                         nvbo->force_coherent = true;
 230         }
 231
 232         if (cli->device.info.family >= NV_DEVICE_INFO_V0_FERMI) {
 233                 nvbo->kind = (tile_flags & 0x0000ff00) >> 8;
 234                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 235                         kfree(nvbo);
 236                         return ERR_PTR(-EINVAL);
 237                 }
 238
 239                 nvbo->comp = mmu->kind[nvbo->kind] != nvbo->kind;
 240         } else
 241         if (cli->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 242                 nvbo->kind = (tile_flags & 0x00007f00) >> 8;
 243                 nvbo->comp = (tile_flags & 0x00030000) >> 16;
 244                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 245                         kfree(nvbo);
 246                         return ERR_PTR(-EINVAL);
 247                 }
 248         } else {
 249                 nvbo->zeta = (tile_flags & 0x00000007);
 250         }
 251         nvbo->mode = tile_mode;
 252         nvbo->contig = !(tile_flags & NOUVEAU_GEM_TILE_NONCONTIG);
 253
 254         /* Determine the desirable target GPU page size for the buffer. */
 255         for (i = 0; i < vmm->page_nr; i++) {
 256                 /* Because we cannot currently allow VMM maps to fail
 257                  * during buffer migration, we need to determine page
 258                  * size for the buffer up-front, and pre-allocate its
 259                  * page tables.
 260                  *
 261                  * Skip page sizes that can't support needed domains.
 262                  */
 263                 if (cli->device.info.family > NV_DEVICE_INFO_V0_CURIE &&
 264                     (domain & NOUVEAU_GEM_DOMAIN_VRAM) && !vmm->page[i].vram)
 265                         continue;
 266                 if ((domain & NOUVEAU_GEM_DOMAIN_GART) &&
 267                     (!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))
 268                         continue;
 269
 270                 /* Select this page size if it's the first that supports
 271                  * the potential memory domains, or when it's compatible
 272                  * with the requested compression settings.
 273                  */
 274                 if (pi < 0 || !nvbo->comp || vmm->page[i].comp)
 275                         pi = i;
 276
 277                 /* Stop once the buffer is larger than the current page size. */
 278                 if (*size >= 1ULL << vmm->page[i].shift)
 279                         break;
 280         }
 281
 282         if (WARN_ON(pi < 0))
 283                 return ERR_PTR(-EINVAL);
 284
 285         /* Disable compression if suitable settings couldn't be found. */
 286         if (nvbo->comp && !vmm->page[pi].comp) {
 287                 if (mmu->object.oclass >= NVIF_CLASS_MMU_GF100)
 288                         nvbo->kind = mmu->kind[nvbo->kind];
 289                 nvbo->comp = 0;
 290         }
 291         nvbo->page = vmm->page[pi].shift;
 292
 293         nouveau_bo_fixup_align(nvbo, align, size);
 294
 295         return nvbo;
 296 }
 297
 298 int
 299 nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 domain,
 300                 struct sg_table *sg, struct dma_resv *robj)
 301 {
 302         int type = sg ? ttm_bo_type_sg : ttm_bo_type_device;
 303         size_t acc_size;
 304         int ret;
 305
 306         acc_size = ttm_bo_dma_acc_size(nvbo->bo.bdev, size, sizeof(*nvbo));
 307
 308         nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
 309         nouveau_bo_placement_set(nvbo, domain, 0);
 310         INIT_LIST_HEAD(&nvbo->io_reserve_lru);
 311
 312         ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type,
 313                           &nvbo->placement, align >> PAGE_SHIFT, false,
 314                           acc_size, sg, robj, nouveau_bo_del_ttm);
 315         if (ret) {
 316                 /* ttm will call nouveau_bo_del_ttm if it fails.. */
 317                 return ret;
 318         }
 319
 320         return 0;
 321 }
 322
 323 int
 324 nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align,
 325                uint32_t domain, uint32_t tile_mode, uint32_t tile_flags,
 326                struct sg_table *sg, struct dma_resv *robj,
 327                struct nouveau_bo **pnvbo)
 328 {
 329         struct nouveau_bo *nvbo;
 330         int ret;
 331
 332         nvbo = nouveau_bo_alloc(cli, &size, &align, domain, tile_mode,
 333                                 tile_flags);
 334         if (IS_ERR(nvbo))
 335                 return PTR_ERR(nvbo);
 336
 337         ret = nouveau_bo_init(nvbo, size, align, domain, sg, robj);
 338         if (ret)
 339                 return ret;
 340
 341         *pnvbo = nvbo;
 342         return 0;
 343 }
 344
 345 static void
 346 set_placement_list(struct nouveau_drm *drm, struct ttm_place *pl, unsigned *n,
 347                    uint32_t domain, uint32_t flags)
 348 {
 349         *n = 0;
 350
 351         if (domain & NOUVEAU_GEM_DOMAIN_VRAM) {
 352                 struct nvif_mmu *mmu = &drm->client.mmu;
 353                 const u8 type = mmu->type[drm->ttm.type_vram].type;
 354
 355                 pl[*n].mem_type = TTM_PL_VRAM;
 356                 pl[*n].flags = flags & ~TTM_PL_FLAG_CACHED;
 357
 358                 /* Some BARs do not support being ioremapped WC */
 359                 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
 360                     type & NVIF_MEM_UNCACHED)
 361                         pl[*n].flags &= ~TTM_PL_FLAG_WC;
 362
 363                 (*n)++;
 364         }
 365         if (domain & NOUVEAU_GEM_DOMAIN_GART) {
 366                 pl[*n].mem_type = TTM_PL_TT;
 367                 pl[*n].flags = flags;
 368
 369                 if (drm->agp.bridge)
 370                         pl[*n].flags &= ~TTM_PL_FLAG_CACHED;
 371
 372                 (*n)++;
 373         }
 374         if (domain & NOUVEAU_GEM_DOMAIN_CPU) {
 375                 pl[*n].mem_type = TTM_PL_SYSTEM;
 376                 pl[(*n)++].flags = flags;
 377         }
 378 }
 379
 380 static void
 381 set_placement_range(struct nouveau_bo *nvbo, uint32_t domain)
 382 {
 383         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 384         u32 vram_pages = drm->client.device.info.ram_size >> PAGE_SHIFT;
 385         unsigned i, fpfn, lpfn;
 386
 387         if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CELSIUS &&
 388             nvbo->mode && (domain & NOUVEAU_GEM_DOMAIN_VRAM) &&
 389             nvbo->bo.mem.num_pages < vram_pages / 4) {
 390                 /*
 391                  * Make sure that the color and depth buffers are handled
 392                  * by independent memory controller units. Up to a 9x
 393                  * speed up when alpha-blending and depth-test are enabled
 394                  * at the same time.
 395                  */
 396                 if (nvbo->zeta) {
 397                         fpfn = vram_pages / 2;
 398                         lpfn = ~0;
 399                 } else {
 400                         fpfn = 0;
 401                         lpfn = vram_pages / 2;
 402                 }
 403                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
 404                         nvbo->placements[i].fpfn = fpfn;
 405                         nvbo->placements[i].lpfn = lpfn;
 406                 }
 407                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
 408                         nvbo->busy_placements[i].fpfn = fpfn;
 409                         nvbo->busy_placements[i].lpfn = lpfn;
 410                 }
 411         }
 412 }
 413
 414 void
 415 nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t domain,
 416                          uint32_t busy)
 417 {
 418         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 419         struct ttm_placement *pl = &nvbo->placement;
 420         uint32_t flags = nvbo->force_coherent ? TTM_PL_FLAG_UNCACHED :
 421                                                 TTM_PL_MASK_CACHING;
 422
 423         pl->placement = nvbo->placements;
 424         set_placement_list(drm, nvbo->placements, &pl->num_placement,
 425                            domain, flags);
 426
 427         pl->busy_placement = nvbo->busy_placements;
 428         set_placement_list(drm, nvbo->busy_placements, &pl->num_busy_placement,
 429                            domain | busy, flags);
 430
 431         set_placement_range(nvbo, domain);
 432 }
 433
 434 int
 435 nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t domain, bool contig)
 436 {
 437         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 438         struct ttm_buffer_object *bo = &nvbo->bo;
 439         bool force = false, evict = false;
 440         int ret;
 441
 442         ret = ttm_bo_reserve(bo, false, false, NULL);
 443         if (ret)
 444                 return ret;
 445
 446         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
 447             domain == NOUVEAU_GEM_DOMAIN_VRAM && contig) {
 448                 if (!nvbo->contig) {
 449                         nvbo->contig = true;
 450                         force = true;
 451                         evict = true;
 452                 }
 453         }
 454
 455         if (nvbo->bo.pin_count) {
 456                 bool error = evict;
 457
 458                 switch (bo->mem.mem_type) {
 459                 case TTM_PL_VRAM:
 460                         error |= !(domain & NOUVEAU_GEM_DOMAIN_VRAM);
 461                         break;
 462                 case TTM_PL_TT:
 463                         error |= !(domain & NOUVEAU_GEM_DOMAIN_GART);
 464                 default:
 465                         break;
 466                 }
 467
 468                 if (error) {
 469                         NV_ERROR(drm, "bo %p pinned elsewhere: "
 470                                       "0x%08x vs 0x%08x\n", bo,
 471                                  bo->mem.mem_type, domain);
 472                         ret = -EBUSY;
 473                 }
 474                 ttm_bo_pin(&nvbo->bo);
 475                 goto out;
 476         }
 477
 478         if (evict) {
 479                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
 480                 ret = nouveau_bo_validate(nvbo, false, false);
 481                 if (ret)
 482                         goto out;
 483         }
 484
 485         nouveau_bo_placement_set(nvbo, domain, 0);
 486         ret = nouveau_bo_validate(nvbo, false, false);
 487         if (ret)
 488                 goto out;
 489
 490         ttm_bo_pin(&nvbo->bo);
 491
 492         switch (bo->mem.mem_type) {
 493         case TTM_PL_VRAM:
 494                 drm->gem.vram_available -= bo->mem.size;
 495                 break;
 496         case TTM_PL_TT:
 497                 drm->gem.gart_available -= bo->mem.size;
 498                 break;
 499         default:
 500                 break;
 501         }
 502
 503 out:
 504         if (force && ret)
 505                 nvbo->contig = false;
 506         ttm_bo_unreserve(bo);
 507         return ret;
 508 }
 509
 510 int
 511 nouveau_bo_unpin(struct nouveau_bo *nvbo)
 512 {
 513         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 514         struct ttm_buffer_object *bo = &nvbo->bo;
 515         int ret;
 516
 517         ret = ttm_bo_reserve(bo, false, false, NULL);
 518         if (ret)
 519                 return ret;
 520
 521         ttm_bo_unpin(&nvbo->bo);
 522         if (!nvbo->bo.pin_count) {
 523                 switch (bo->mem.mem_type) {
 524                 case TTM_PL_VRAM:
 525                         drm->gem.vram_available += bo->mem.size;
 526                         break;
 527                 case TTM_PL_TT:
 528                         drm->gem.gart_available += bo->mem.size;
 529                         break;
 530                 default:
 531                         break;
 532                 }
 533         }
 534
 535         ttm_bo_unreserve(bo);
 536         return 0;
 537 }
 538
 539 int
 540 nouveau_bo_map(struct nouveau_bo *nvbo)
 541 {
 542         int ret;
 543
 544         ret = ttm_bo_reserve(&nvbo->bo, false, false, NULL);
 545         if (ret)
 546                 return ret;
 547
 548         ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
 549
 550         ttm_bo_unreserve(&nvbo->bo);
 551         return ret;
 552 }
 553
 554 void
 555 nouveau_bo_unmap(struct nouveau_bo *nvbo)
 556 {
 557         if (!nvbo)
 558                 return;
 559
 560         ttm_bo_kunmap(&nvbo->kmap);
 561 }
 562
 563 void
 564 nouveau_bo_sync_for_device(struct nouveau_bo *nvbo)
 565 {
 566         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 567         struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
 568         int i;
 569
 570         if (!ttm_dma)
 571                 return;
 572
 573         /* Don't waste time looping if the object is coherent */
 574         if (nvbo->force_coherent)
 575                 return;
 576
 577         for (i = 0; i < ttm_dma->ttm.num_pages; i++)
 578                 dma_sync_single_for_device(drm->dev->dev,
 579                                            ttm_dma->dma_address[i],
 580                                            PAGE_SIZE, DMA_TO_DEVICE);
 581 }
 582
 583 void
 584 nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo)
 585 {
 586         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 587         struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
 588         int i;
 589
 590         if (!ttm_dma)
 591                 return;
 592
 593         /* Don't waste time looping if the object is coherent */
 594         if (nvbo->force_coherent)
 595                 return;
 596
 597         for (i = 0; i < ttm_dma->ttm.num_pages; i++)
 598                 dma_sync_single_for_cpu(drm->dev->dev, ttm_dma->dma_address[i],
 599                                         PAGE_SIZE, DMA_FROM_DEVICE);
 600 }
 601
 602 void nouveau_bo_add_io_reserve_lru(struct ttm_buffer_object *bo)
 603 {
 604         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 605         struct nouveau_bo *nvbo = nouveau_bo(bo);
 606
 607         mutex_lock(&drm->ttm.io_reserve_mutex);
 608         list_move_tail(&nvbo->io_reserve_lru, &drm->ttm.io_reserve_lru);
 609         mutex_unlock(&drm->ttm.io_reserve_mutex);
 610 }
 611
 612 void nouveau_bo_del_io_reserve_lru(struct ttm_buffer_object *bo)
 613 {
 614         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 615         struct nouveau_bo *nvbo = nouveau_bo(bo);
 616
 617         mutex_lock(&drm->ttm.io_reserve_mutex);
 618         list_del_init(&nvbo->io_reserve_lru);
 619         mutex_unlock(&drm->ttm.io_reserve_mutex);
 620 }
 621
 622 int
 623 nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
 624                     bool no_wait_gpu)
 625 {
 626         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 627         int ret;
 628
 629         ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, &ctx);
 630         if (ret)
 631                 return ret;
 632
 633         nouveau_bo_sync_for_device(nvbo);
 634
 635         return 0;
 636 }
 637
 638 void
 639 nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
 640 {
 641         bool is_iomem;
 642         u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 643
 644         mem += index;
 645
 646         if (is_iomem)
 647                 iowrite16_native(val, (void __force __iomem *)mem);
 648         else
 649                 *mem = val;
 650 }
 651
 652 u32
 653 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
 654 {
 655         bool is_iomem;
 656         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 657
 658         mem += index;
 659
 660         if (is_iomem)
 661                 return ioread32_native((void __force __iomem *)mem);
 662         else
 663                 return *mem;
 664 }
 665
 666 void
 667 nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
 668 {
 669         bool is_iomem;
 670         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 671
 672         mem += index;
 673
 674         if (is_iomem)
 675                 iowrite32_native(val, (void __force __iomem *)mem);
 676         else
 677                 *mem = val;
 678 }
 679
 680 static struct ttm_tt *
 681 nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags)
 682 {
 683 #if IS_ENABLED(CONFIG_AGP)
 684         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 685
 686         if (drm->agp.bridge) {
 687                 return ttm_agp_tt_create(bo, drm->agp.bridge, page_flags);
 688         }
 689 #endif
 690
 691         return nouveau_sgdma_create_ttm(bo, page_flags);
 692 }
 693
 694 static int
 695 nouveau_ttm_tt_bind(struct ttm_bo_device *bdev, struct ttm_tt *ttm,
 696                     struct ttm_resource *reg)
 697 {
 698 #if IS_ENABLED(CONFIG_AGP)
 699         struct nouveau_drm *drm = nouveau_bdev(bdev);
 700 #endif
 701         if (!reg)
 702                 return -EINVAL;
 703 #if IS_ENABLED(CONFIG_AGP)
 704         if (drm->agp.bridge)
 705                 return ttm_agp_bind(ttm, reg);
 706 #endif
 707         return nouveau_sgdma_bind(bdev, ttm, reg);
 708 }
 709
 710 static void
 711 nouveau_ttm_tt_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 712 {
 713 #if IS_ENABLED(CONFIG_AGP)
 714         struct nouveau_drm *drm = nouveau_bdev(bdev);
 715
 716         if (drm->agp.bridge) {
 717                 ttm_agp_unbind(ttm);
 718                 return;
 719         }
 720 #endif
 721         nouveau_sgdma_unbind(bdev, ttm);
 722 }
 723
 724 static void
 725 nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
 726 {
 727         struct nouveau_bo *nvbo = nouveau_bo(bo);
 728
 729         switch (bo->mem.mem_type) {
 730         case TTM_PL_VRAM:
 731                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART,
 732                                          NOUVEAU_GEM_DOMAIN_CPU);
 733                 break;
 734         default:
 735                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_CPU, 0);
 736                 break;
 737         }
 738
 739         *pl = nvbo->placement;
 740 }
 741
 742 static int
 743 nouveau_bo_move_prep(struct nouveau_drm *drm, struct ttm_buffer_object *bo,
 744                      struct ttm_resource *reg)
 745 {
 746         struct nouveau_mem *old_mem = nouveau_mem(&bo->mem);
 747         struct nouveau_mem *new_mem = nouveau_mem(reg);
 748         struct nvif_vmm *vmm = &drm->client.vmm.vmm;
 749         int ret;
 750
 751         ret = nvif_vmm_get(vmm, LAZY, false, old_mem->mem.page, 0,
 752                            old_mem->mem.size, &old_mem->vma[0]);
 753         if (ret)
 754                 return ret;
 755
 756         ret = nvif_vmm_get(vmm, LAZY, false, new_mem->mem.page, 0,
 757                            new_mem->mem.size, &old_mem->vma[1]);
 758         if (ret)
 759                 goto done;
 760
 761         ret = nouveau_mem_map(old_mem, vmm, &old_mem->vma[0]);
 762         if (ret)
 763                 goto done;
 764
 765         ret = nouveau_mem_map(new_mem, vmm, &old_mem->vma[1]);
 766 done:
 767         if (ret) {
 768                 nvif_vmm_put(vmm, &old_mem->vma[1]);
 769                 nvif_vmm_put(vmm, &old_mem->vma[0]);
 770         }
 771         return 0;
 772 }
 773
 774 static int
 775 nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict,
 776                      struct ttm_operation_ctx *ctx,
 777                      struct ttm_resource *new_reg)
 778 {
 779         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 780         struct nouveau_channel *chan = drm->ttm.chan;
 781         struct nouveau_cli *cli = (void *)chan->user.client;
 782         struct nouveau_fence *fence;
 783         int ret;
 784
 785         /* create temporary vmas for the transfer and attach them to the
 786          * old nvkm_mem node, these will get cleaned up after ttm has
 787          * destroyed the ttm_resource
 788          */
 789         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 790                 ret = nouveau_bo_move_prep(drm, bo, new_reg);
 791                 if (ret)
 792                         return ret;
 793         }
 794
 795         mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING);
 796         ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, ctx->interruptible);
 797         if (ret == 0) {
 798                 ret = drm->ttm.move(chan, bo, &bo->mem, new_reg);
 799                 if (ret == 0) {
 800                         ret = nouveau_fence_new(chan, false, &fence);
 801                         if (ret == 0) {
 802                                 ret = ttm_bo_move_accel_cleanup(bo,
 803                                                                 &fence->base,
 804                                                                 evict, false,
 805                                                                 new_reg);
 806                                 nouveau_fence_unref(&fence);
 807                         }
 808                 }
 809         }
 810         mutex_unlock(&cli->mutex);
 811         return ret;
 812 }
 813
 814 void
 815 nouveau_bo_move_init(struct nouveau_drm *drm)
 816 {
 817         static const struct _method_table {
 818                 const char *name;
 819                 int engine;
 820                 s32 oclass;
 821                 int (*exec)(struct nouveau_channel *,
 822                             struct ttm_buffer_object *,
 823                             struct ttm_resource *, struct ttm_resource *);
 824                 int (*init)(struct nouveau_channel *, u32 handle);
 825         } _methods[] = {
 826                 {  "COPY", 4, 0xc5b5, nve0_bo_move_copy, nve0_bo_move_init },
 827                 {  "GRCE", 0, 0xc5b5, nve0_bo_move_copy, nvc0_bo_move_init },
 828                 {  "COPY", 4, 0xc3b5, nve0_bo_move_copy, nve0_bo_move_init },
 829                 {  "GRCE", 0, 0xc3b5, nve0_bo_move_copy, nvc0_bo_move_init },
 830                 {  "COPY", 4, 0xc1b5, nve0_bo_move_copy, nve0_bo_move_init },
 831                 {  "GRCE", 0, 0xc1b5, nve0_bo_move_copy, nvc0_bo_move_init },
 832                 {  "COPY", 4, 0xc0b5, nve0_bo_move_copy, nve0_bo_move_init },
 833                 {  "GRCE", 0, 0xc0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 834                 {  "COPY", 4, 0xb0b5, nve0_bo_move_copy, nve0_bo_move_init },
 835                 {  "GRCE", 0, 0xb0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 836                 {  "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
 837                 {  "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 838                 { "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },
 839                 { "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },
 840                 {  "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },
 841                 { "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },
 842                 {  "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },
 843                 {  "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },
 844                 {  "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },
 845                 {},
 846         };
 847         const struct _method_table *mthd = _methods;
 848         const char *name = "CPU";
 849         int ret;
 850
 851         do {
 852                 struct nouveau_channel *chan;
 853
 854                 if (mthd->engine)
 855                         chan = drm->cechan;
 856                 else
 857                         chan = drm->channel;
 858                 if (chan == NULL)
 859                         continue;
 860
 861                 ret = nvif_object_ctor(&chan->user, "ttmBoMove",
 862                                        mthd->oclass | (mthd->engine << 16),
 863                                        mthd->oclass, NULL, 0,
 864                                        &drm->ttm.copy);
 865                 if (ret == 0) {
 866                         ret = mthd->init(chan, drm->ttm.copy.handle);
 867                         if (ret) {
 868                                 nvif_object_dtor(&drm->ttm.copy);
 869                                 continue;
 870                         }
 871
 872                         drm->ttm.move = mthd->exec;
 873                         drm->ttm.chan = chan;
 874                         name = mthd->name;
 875                         break;
 876                 }
 877         } while ((++mthd)->exec);
 878
 879         NV_INFO(drm, "MM: using %s for buffer copies\n", name);
 880 }
 881
 882 static int
 883 nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict,
 884                       struct ttm_operation_ctx *ctx,
 885                       struct ttm_resource *new_reg)
 886 {
 887         struct ttm_place placement_memtype = {
 888                 .fpfn = 0,
 889                 .lpfn = 0,
 890                 .mem_type = TTM_PL_TT,
 891                 .flags = TTM_PL_MASK_CACHING
 892         };
 893         struct ttm_placement placement;
 894         struct ttm_resource tmp_reg;
 895         int ret;
 896
 897         placement.num_placement = placement.num_busy_placement = 1;
 898         placement.placement = placement.busy_placement = &placement_memtype;
 899
 900         tmp_reg = *new_reg;
 901         tmp_reg.mm_node = NULL;
 902         ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, ctx);
 903         if (ret)
 904                 return ret;
 905
 906         ret = ttm_tt_populate(bo->bdev, bo->ttm, ctx);
 907         if (ret)
 908                 goto out;
 909
 910         ret = nouveau_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_reg);
 911         if (ret)
 912                 goto out;
 913
 914         ret = nouveau_bo_move_m2mf(bo, true, ctx, &tmp_reg);
 915         if (ret)
 916                 goto out;
 917
 918         ret = ttm_bo_move_ttm(bo, ctx, new_reg);
 919 out:
 920         ttm_resource_free(bo, &tmp_reg);
 921         return ret;
 922 }
 923
 924 static int
 925 nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict,
 926                       struct ttm_operation_ctx *ctx,
 927                       struct ttm_resource *new_reg)
 928 {
 929         struct ttm_place placement_memtype = {
 930                 .fpfn = 0,
 931                 .lpfn = 0,
 932                 .mem_type = TTM_PL_TT,
 933                 .flags = TTM_PL_MASK_CACHING
 934         };
 935         struct ttm_placement placement;
 936         struct ttm_resource tmp_reg;
 937         int ret;
 938
 939         placement.num_placement = placement.num_busy_placement = 1;
 940         placement.placement = placement.busy_placement = &placement_memtype;
 941
 942         tmp_reg = *new_reg;
 943         tmp_reg.mm_node = NULL;
 944         ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, ctx);
 945         if (ret)
 946                 return ret;
 947
 948         ret = ttm_bo_move_ttm(bo, ctx, &tmp_reg);
 949         if (ret)
 950                 goto out;
 951
 952         ret = nouveau_bo_move_m2mf(bo, true, ctx, new_reg);
 953         if (ret)
 954                 goto out;
 955
 956 out:
 957         ttm_resource_free(bo, &tmp_reg);
 958         return ret;
 959 }
 960
 961 static void
 962 nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, bool evict,
 963                      struct ttm_resource *new_reg)
 964 {
 965         struct nouveau_mem *mem = new_reg ? nouveau_mem(new_reg) : NULL;
 966         struct nouveau_bo *nvbo = nouveau_bo(bo);
 967         struct nouveau_vma *vma;
 968
 969         /* ttm can now (stupidly) pass the driver bos it didn't create... */
 970         if (bo->destroy != nouveau_bo_del_ttm)
 971                 return;
 972
 973         nouveau_bo_del_io_reserve_lru(bo);
 974
 975         if (mem && new_reg->mem_type != TTM_PL_SYSTEM &&
 976             mem->mem.page == nvbo->page) {
 977                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 978                         nouveau_vma_map(vma, mem);
 979                 }
 980         } else {
 981                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 982                         WARN_ON(ttm_bo_wait(bo, false, false));
 983                         nouveau_vma_unmap(vma);
 984                 }
 985         }
 986
 987         if (new_reg) {
 988                 if (new_reg->mm_node)
 989                         nvbo->offset = (new_reg->start << PAGE_SHIFT);
 990                 else
 991                         nvbo->offset = 0;
 992         }
 993
 994 }
 995
 996 static int
 997 nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_resource *new_reg,
 998                    struct nouveau_drm_tile **new_tile)
 999 {
1000         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1001         struct drm_device *dev = drm->dev;
1002         struct nouveau_bo *nvbo = nouveau_bo(bo);
1003         u64 offset = new_reg->start << PAGE_SHIFT;
1004
1005         *new_tile = NULL;
1006         if (new_reg->mem_type != TTM_PL_VRAM)
1007                 return 0;
1008
1009         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {
1010                 *new_tile = nv10_bo_set_tiling(dev, offset, new_reg->size,
1011                                                nvbo->mode, nvbo->zeta);
1012         }
1013
1014         return 0;
1015 }
1016
1017 static void
1018 nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
1019                       struct nouveau_drm_tile *new_tile,
1020                       struct nouveau_drm_tile **old_tile)
1021 {
1022         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1023         struct drm_device *dev = drm->dev;
1024         struct dma_fence *fence = dma_resv_get_excl(bo->base.resv);
1025
1026         nv10_bo_put_tile_region(dev, *old_tile, fence);
1027         *old_tile = new_tile;
1028 }
1029
1030 static int
1031 nouveau_bo_move(struct ttm_buffer_object *bo, bool evict,
1032                 struct ttm_operation_ctx *ctx,
1033                 struct ttm_resource *new_reg)
1034 {
1035         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1036         struct nouveau_bo *nvbo = nouveau_bo(bo);
1037         struct ttm_resource *old_reg = &bo->mem;
1038         struct nouveau_drm_tile *new_tile = NULL;
1039         int ret = 0;
1040
1041         ret = ttm_bo_wait_ctx(bo, ctx);
1042         if (ret)
1043                 return ret;
1044
1045         if (nvbo->bo.pin_count)
1046                 NV_WARN(drm, "Moving pinned object %p!\n", nvbo);
1047
1048         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1049                 ret = nouveau_bo_vm_bind(bo, new_reg, &new_tile);
1050                 if (ret)
1051                         return ret;
1052         }
1053
1054         /* Fake bo copy. */
1055         if (old_reg->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
1056                 ttm_bo_move_null(bo, new_reg);
1057                 goto out;
1058         }
1059
1060         if (old_reg->mem_type == TTM_PL_SYSTEM &&
1061             new_reg->mem_type == TTM_PL_TT) {
1062                 ttm_bo_move_null(bo, new_reg);
1063                 goto out;
1064         }
1065
1066         if (old_reg->mem_type == TTM_PL_TT &&
1067             new_reg->mem_type == TTM_PL_SYSTEM) {
1068                 ret = ttm_bo_move_ttm(bo, ctx, new_reg);
1069                 goto out;
1070         }
1071
1072         /* Hardware assisted copy. */
1073         if (drm->ttm.move) {
1074                 if (new_reg->mem_type == TTM_PL_SYSTEM)
1075                         ret = nouveau_bo_move_flipd(bo, evict, ctx,
1076                                                     new_reg);
1077                 else if (old_reg->mem_type == TTM_PL_SYSTEM)
1078                         ret = nouveau_bo_move_flips(bo, evict, ctx,
1079                                                     new_reg);
1080                 else
1081                         ret = nouveau_bo_move_m2mf(bo, evict, ctx,
1082                                                    new_reg);
1083                 if (!ret)
1084                         goto out;
1085         }
1086
1087         /* Fallback to software copy. */
1088         ret = ttm_bo_move_memcpy(bo, ctx, new_reg);
1089
1090 out:
1091         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1092                 if (ret)
1093                         nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
1094                 else
1095                         nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
1096         }
1097
1098         return ret;
1099 }
1100
1101 static int
1102 nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
1103 {
1104         struct nouveau_bo *nvbo = nouveau_bo(bo);
1105
1106         return drm_vma_node_verify_access(&nvbo->bo.base.vma_node,
1107                                           filp->private_data);
1108 }
1109
1110 static void
1111 nouveau_ttm_io_mem_free_locked(struct nouveau_drm *drm,
1112                                struct ttm_resource *reg)
1113 {
1114         struct nouveau_mem *mem = nouveau_mem(reg);
1115
1116         if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1117                 switch (reg->mem_type) {
1118                 case TTM_PL_TT:
1119                         if (mem->kind)
1120                                 nvif_object_unmap_handle(&mem->mem.object);
1121                         break;
1122                 case TTM_PL_VRAM:
1123                         nvif_object_unmap_handle(&mem->mem.object);
1124                         break;
1125                 default:
1126                         break;
1127                 }
1128         }
1129 }
1130
1131 static int
1132 nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *reg)
1133 {
1134         struct nouveau_drm *drm = nouveau_bdev(bdev);
1135         struct nvkm_device *device = nvxx_device(&drm->client.device);
1136         struct nouveau_mem *mem = nouveau_mem(reg);
1137         int ret;
1138
1139         mutex_lock(&drm->ttm.io_reserve_mutex);
1140 retry:
1141         switch (reg->mem_type) {
1142         case TTM_PL_SYSTEM:
1143                 /* System memory */
1144                 ret = 0;
1145                 goto out;
1146         case TTM_PL_TT:
1147 #if IS_ENABLED(CONFIG_AGP)
1148                 if (drm->agp.bridge) {
1149                         reg->bus.offset = (reg->start << PAGE_SHIFT) +
1150                                 drm->agp.base;
1151                         reg->bus.is_iomem = !drm->agp.cma;
1152                 }
1153 #endif
1154                 if (drm->client.mem->oclass < NVIF_CLASS_MEM_NV50 ||
1155                     !mem->kind) {
1156                         /* untiled */
1157                         ret = 0;
1158                         break;
1159                 }
1160                 fallthrough;    /* tiled memory */
1161         case TTM_PL_VRAM:
1162                 reg->bus.offset = (reg->start << PAGE_SHIFT) +
1163                         device->func->resource_addr(device, 1);
1164                 reg->bus.is_iomem = true;
1165                 if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1166                         union {
1167                                 struct nv50_mem_map_v0 nv50;
1168                                 struct gf100_mem_map_v0 gf100;
1169                         } args;
1170                         u64 handle, length;
1171                         u32 argc = 0;
1172
1173                         switch (mem->mem.object.oclass) {
1174                         case NVIF_CLASS_MEM_NV50:
1175                                 args.nv50.version = 0;
1176                                 args.nv50.ro = 0;
1177                                 args.nv50.kind = mem->kind;
1178                                 args.nv50.comp = mem->comp;
1179                                 argc = sizeof(args.nv50);
1180                                 break;
1181                         case NVIF_CLASS_MEM_GF100:
1182                                 args.gf100.version = 0;
1183                                 args.gf100.ro = 0;
1184                                 args.gf100.kind = mem->kind;
1185                                 argc = sizeof(args.gf100);
1186                                 break;
1187                         default:
1188                                 WARN_ON(1);
1189                                 break;
1190                         }
1191
1192                         ret = nvif_object_map_handle(&mem->mem.object,
1193                                                      &args, argc,
1194                                                      &handle, &length);
1195                         if (ret != 1) {
1196                                 if (WARN_ON(ret == 0))
1197                                         ret = -EINVAL;
1198                                 goto out;
1199                         }
1200
1201                         reg->bus.offset = handle;
1202                         ret = 0;
1203                 }
1204                 break;
1205         default:
1206                 ret = -EINVAL;
1207         }
1208
1209 out:
1210         if (ret == -ENOSPC) {
1211                 struct nouveau_bo *nvbo;
1212
1213                 nvbo = list_first_entry_or_null(&drm->ttm.io_reserve_lru,
1214                                                 typeof(*nvbo),
1215                                                 io_reserve_lru);
1216                 if (nvbo) {
1217                         list_del_init(&nvbo->io_reserve_lru);
1218                         drm_vma_node_unmap(&nvbo->bo.base.vma_node,
1219                                            bdev->dev_mapping);
1220                         nouveau_ttm_io_mem_free_locked(drm, &nvbo->bo.mem);
1221                         goto retry;
1222                 }
1223
1224         }
1225         mutex_unlock(&drm->ttm.io_reserve_mutex);
1226         return ret;
1227 }
1228
1229 static void
1230 nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_resource *reg)
1231 {
1232         struct nouveau_drm *drm = nouveau_bdev(bdev);
1233
1234         mutex_lock(&drm->ttm.io_reserve_mutex);
1235         nouveau_ttm_io_mem_free_locked(drm, reg);
1236         mutex_unlock(&drm->ttm.io_reserve_mutex);
1237 }
1238
1239 vm_fault_t nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
1240 {
1241         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1242         struct nouveau_bo *nvbo = nouveau_bo(bo);
1243         struct nvkm_device *device = nvxx_device(&drm->client.device);
1244         u32 mappable = device->func->resource_size(device, 1) >> PAGE_SHIFT;
1245         int i, ret;
1246
1247         /* as long as the bo isn't in vram, and isn't tiled, we've got
1248          * nothing to do here.
1249          */
1250         if (bo->mem.mem_type != TTM_PL_VRAM) {
1251                 if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA ||
1252                     !nvbo->kind)
1253                         return 0;
1254
1255                 if (bo->mem.mem_type != TTM_PL_SYSTEM)
1256                         return 0;
1257
1258                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
1259
1260         } else {
1261                 /* make sure bo is in mappable vram */
1262                 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA ||
1263                     bo->mem.start + bo->mem.num_pages < mappable)
1264                         return 0;
1265
1266                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
1267                         nvbo->placements[i].fpfn = 0;
1268                         nvbo->placements[i].lpfn = mappable;
1269                 }
1270
1271                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
1272                         nvbo->busy_placements[i].fpfn = 0;
1273                         nvbo->busy_placements[i].lpfn = mappable;
1274                 }
1275
1276                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_VRAM, 0);
1277         }
1278
1279         ret = nouveau_bo_validate(nvbo, false, false);
1280         if (unlikely(ret == -EBUSY || ret == -ERESTARTSYS))
1281                 return VM_FAULT_NOPAGE;
1282         else if (unlikely(ret))
1283                 return VM_FAULT_SIGBUS;
1284
1285         ttm_bo_move_to_lru_tail_unlocked(bo);
1286         return 0;
1287 }
1288
1289 static int
1290 nouveau_ttm_tt_populate(struct ttm_bo_device *bdev,
1291                         struct ttm_tt *ttm, struct ttm_operation_ctx *ctx)
1292 {
1293         struct ttm_dma_tt *ttm_dma = (void *)ttm;
1294         struct nouveau_drm *drm;
1295         struct device *dev;
1296         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1297
1298         if (ttm_tt_is_populated(ttm))
1299                 return 0;
1300
1301         if (slave && ttm->sg) {
1302                 /* make userspace faulting work */
1303                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
1304                                                  ttm_dma->dma_address, ttm->num_pages);
1305                 ttm_tt_set_populated(ttm);
1306                 return 0;
1307         }
1308
1309         drm = nouveau_bdev(bdev);
1310         dev = drm->dev->dev;
1311
1312 #if IS_ENABLED(CONFIG_AGP)
1313         if (drm->agp.bridge) {
1314                 return ttm_pool_populate(ttm, ctx);
1315         }
1316 #endif
1317
1318 #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1319         if (swiotlb_nr_tbl()) {
1320                 return ttm_dma_populate((void *)ttm, dev, ctx);
1321         }
1322 #endif
1323         return ttm_populate_and_map_pages(dev, ttm_dma, ctx);
1324 }
1325
1326 static void
1327 nouveau_ttm_tt_unpopulate(struct ttm_bo_device *bdev,
1328                           struct ttm_tt *ttm)
1329 {
1330         struct ttm_dma_tt *ttm_dma = (void *)ttm;
1331         struct nouveau_drm *drm;
1332         struct device *dev;
1333         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1334
1335         if (slave)
1336                 return;
1337
1338         drm = nouveau_bdev(bdev);
1339         dev = drm->dev->dev;
1340
1341 #if IS_ENABLED(CONFIG_AGP)
1342         if (drm->agp.bridge) {
1343                 ttm_pool_unpopulate(ttm);
1344                 return;
1345         }
1346 #endif
1347
1348 #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1349         if (swiotlb_nr_tbl()) {
1350                 ttm_dma_unpopulate((void *)ttm, dev);
1351                 return;
1352         }
1353 #endif
1354
1355         ttm_unmap_and_unpopulate_pages(dev, ttm_dma);
1356 }
1357
1358 static void
1359 nouveau_ttm_tt_destroy(struct ttm_bo_device *bdev,
1360                        struct ttm_tt *ttm)
1361 {
1362 #if IS_ENABLED(CONFIG_AGP)
1363         struct nouveau_drm *drm = nouveau_bdev(bdev);
1364         if (drm->agp.bridge) {
1365                 ttm_agp_unbind(ttm);
1366                 ttm_tt_destroy_common(bdev, ttm);
1367                 ttm_agp_destroy(ttm);
1368                 return;
1369         }
1370 #endif
1371         nouveau_sgdma_destroy(bdev, ttm);
1372 }
1373
1374 void
1375 nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence, bool exclusive)
1376 {
1377         struct dma_resv *resv = nvbo->bo.base.resv;
1378
1379         if (exclusive)
1380                 dma_resv_add_excl_fence(resv, &fence->base);
1381         else if (fence)
1382                 dma_resv_add_shared_fence(resv, &fence->base);
1383 }
1384
1385 struct ttm_bo_driver nouveau_bo_driver = {
1386         .ttm_tt_create = &nouveau_ttm_tt_create,
1387         .ttm_tt_populate = &nouveau_ttm_tt_populate,
1388         .ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate,
1389         .ttm_tt_bind = &nouveau_ttm_tt_bind,
1390         .ttm_tt_unbind = &nouveau_ttm_tt_unbind,
1391         .ttm_tt_destroy = &nouveau_ttm_tt_destroy,
1392         .eviction_valuable = ttm_bo_eviction_valuable,
1393         .evict_flags = nouveau_bo_evict_flags,
1394         .move_notify = nouveau_bo_move_ntfy,
1395         .move = nouveau_bo_move,
1396         .verify_access = nouveau_bo_verify_access,
1397         .io_mem_reserve = &nouveau_ttm_io_mem_reserve,
1398         .io_mem_free = &nouveau_ttm_io_mem_free,
1399 };