drivers/gpu/drm/nouveau/nouveau_bo.c

   1 /*
   2  * Copyright 2007 Dave Airlied
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24 /*
  25  * Authors: Dave Airlied <airlied@linux.ie>
  26  *          Ben Skeggs   <darktama@iinet.net.au>
  27  *          Jeremy Kolb  <jkolb@brandeis.edu>
  28  */
  29
  30 #include <linux/dma-mapping.h>
  31 #include <linux/swiotlb.h>
  32
  33 #include "nouveau_drv.h"
  34 #include "nouveau_chan.h"
  35 #include "nouveau_fence.h"
  36
  37 #include "nouveau_bo.h"
  38 #include "nouveau_ttm.h"
  39 #include "nouveau_gem.h"
  40 #include "nouveau_mem.h"
  41 #include "nouveau_vmm.h"
  42
  43 #include <nvif/class.h>
  44 #include <nvif/if500b.h>
  45 #include <nvif/if900b.h>
  46
  47 static int nouveau_ttm_tt_bind(struct ttm_bo_device *bdev, struct ttm_tt *ttm,
  48                                struct ttm_resource *reg);
  49
  50 /*
  51  * NV10-NV40 tiling helpers
  52  */
  53
  54 static void
  55 nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
  56                            u32 addr, u32 size, u32 pitch, u32 flags)
  57 {
  58         struct nouveau_drm *drm = nouveau_drm(dev);
  59         int i = reg - drm->tile.reg;
  60         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
  61         struct nvkm_fb_tile *tile = &fb->tile.region[i];
  62
  63         nouveau_fence_unref(&reg->fence);
  64
  65         if (tile->pitch)
  66                 nvkm_fb_tile_fini(fb, i, tile);
  67
  68         if (pitch)
  69                 nvkm_fb_tile_init(fb, i, addr, size, pitch, flags, tile);
  70
  71         nvkm_fb_tile_prog(fb, i, tile);
  72 }
  73
  74 static struct nouveau_drm_tile *
  75 nv10_bo_get_tile_region(struct drm_device *dev, int i)
  76 {
  77         struct nouveau_drm *drm = nouveau_drm(dev);
  78         struct nouveau_drm_tile *tile = &drm->tile.reg[i];
  79
  80         spin_lock(&drm->tile.lock);
  81
  82         if (!tile->used &&
  83             (!tile->fence || nouveau_fence_done(tile->fence)))
  84                 tile->used = true;
  85         else
  86                 tile = NULL;
  87
  88         spin_unlock(&drm->tile.lock);
  89         return tile;
  90 }
  91
  92 static void
  93 nv10_bo_put_tile_region(struct drm_device *dev, struct nouveau_drm_tile *tile,
  94                         struct dma_fence *fence)
  95 {
  96         struct nouveau_drm *drm = nouveau_drm(dev);
  97
  98         if (tile) {
  99                 spin_lock(&drm->tile.lock);
 100                 tile->fence = (struct nouveau_fence *)dma_fence_get(fence);
 101                 tile->used = false;
 102                 spin_unlock(&drm->tile.lock);
 103         }
 104 }
 105
 106 static struct nouveau_drm_tile *
 107 nv10_bo_set_tiling(struct drm_device *dev, u32 addr,
 108                    u32 size, u32 pitch, u32 zeta)
 109 {
 110         struct nouveau_drm *drm = nouveau_drm(dev);
 111         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
 112         struct nouveau_drm_tile *tile, *found = NULL;
 113         int i;
 114
 115         for (i = 0; i < fb->tile.regions; i++) {
 116                 tile = nv10_bo_get_tile_region(dev, i);
 117
 118                 if (pitch && !found) {
 119                         found = tile;
 120                         continue;
 121
 122                 } else if (tile && fb->tile.region[i].pitch) {
 123                         /* Kill an unused tile region. */
 124                         nv10_bo_update_tile_region(dev, tile, 0, 0, 0, 0);
 125                 }
 126
 127                 nv10_bo_put_tile_region(dev, tile, NULL);
 128         }
 129
 130         if (found)
 131                 nv10_bo_update_tile_region(dev, found, addr, size, pitch, zeta);
 132         return found;
 133 }
 134
 135 static void
 136 nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
 137 {
 138         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 139         struct drm_device *dev = drm->dev;
 140         struct nouveau_bo *nvbo = nouveau_bo(bo);
 141
 142         WARN_ON(nvbo->bo.pin_count > 0);
 143         nouveau_bo_del_io_reserve_lru(bo);
 144         nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
 145
 146         /*
 147          * If nouveau_bo_new() allocated this buffer, the GEM object was never
 148          * initialized, so don't attempt to release it.
 149          */
 150         if (bo->base.dev)
 151                 drm_gem_object_release(&bo->base);
 152
 153         kfree(nvbo);
 154 }
 155
 156 static inline u64
 157 roundup_64(u64 x, u32 y)
 158 {
 159         x += y - 1;
 160         do_div(x, y);
 161         return x * y;
 162 }
 163
 164 static void
 165 nouveau_bo_fixup_align(struct nouveau_bo *nvbo, int *align, u64 *size)
 166 {
 167         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 168         struct nvif_device *device = &drm->client.device;
 169
 170         if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
 171                 if (nvbo->mode) {
 172                         if (device->info.chipset >= 0x40) {
 173                                 *align = 65536;
 174                                 *size = roundup_64(*size, 64 * nvbo->mode);
 175
 176                         } else if (device->info.chipset >= 0x30) {
 177                                 *align = 32768;
 178                                 *size = roundup_64(*size, 64 * nvbo->mode);
 179
 180                         } else if (device->info.chipset >= 0x20) {
 181                                 *align = 16384;
 182                                 *size = roundup_64(*size, 64 * nvbo->mode);
 183
 184                         } else if (device->info.chipset >= 0x10) {
 185                                 *align = 16384;
 186                                 *size = roundup_64(*size, 32 * nvbo->mode);
 187                         }
 188                 }
 189         } else {
 190                 *size = roundup_64(*size, (1 << nvbo->page));
 191                 *align = max((1 <<  nvbo->page), *align);
 192         }
 193
 194         *size = roundup_64(*size, PAGE_SIZE);
 195 }
 196
 197 struct nouveau_bo *
 198 nouveau_bo_alloc(struct nouveau_cli *cli, u64 *size, int *align, u32 domain,
 199                  u32 tile_mode, u32 tile_flags)
 200 {
 201         struct nouveau_drm *drm = cli->drm;
 202         struct nouveau_bo *nvbo;
 203         struct nvif_mmu *mmu = &cli->mmu;
 204         struct nvif_vmm *vmm = cli->svm.cli ? &cli->svm.vmm : &cli->vmm.vmm;
 205         int i, pi = -1;
 206
 207         if (!*size) {
 208                 NV_WARN(drm, "skipped size %016llx\n", *size);
 209                 return ERR_PTR(-EINVAL);
 210         }
 211
 212         nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
 213         if (!nvbo)
 214                 return ERR_PTR(-ENOMEM);
 215         INIT_LIST_HEAD(&nvbo->head);
 216         INIT_LIST_HEAD(&nvbo->entry);
 217         INIT_LIST_HEAD(&nvbo->vma_list);
 218         nvbo->bo.bdev = &drm->ttm.bdev;
 219
 220         /* This is confusing, and doesn't actually mean we want an uncached
 221          * mapping, but is what NOUVEAU_GEM_DOMAIN_COHERENT gets translated
 222          * into in nouveau_gem_new().
 223          */
 224         if (domain & NOUVEAU_GEM_DOMAIN_COHERENT) {
 225                 /* Determine if we can get a cache-coherent map, forcing
 226                  * uncached mapping if we can't.
 227                  */
 228                 if (!nouveau_drm_use_coherent_gpu_mapping(drm))
 229                         nvbo->force_coherent = true;
 230         }
 231
 232         if (cli->device.info.family >= NV_DEVICE_INFO_V0_FERMI) {
 233                 nvbo->kind = (tile_flags & 0x0000ff00) >> 8;
 234                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 235                         kfree(nvbo);
 236                         return ERR_PTR(-EINVAL);
 237                 }
 238
 239                 nvbo->comp = mmu->kind[nvbo->kind] != nvbo->kind;
 240         } else
 241         if (cli->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 242                 nvbo->kind = (tile_flags & 0x00007f00) >> 8;
 243                 nvbo->comp = (tile_flags & 0x00030000) >> 16;
 244                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 245                         kfree(nvbo);
 246                         return ERR_PTR(-EINVAL);
 247                 }
 248         } else {
 249                 nvbo->zeta = (tile_flags & 0x00000007);
 250         }
 251         nvbo->mode = tile_mode;
 252         nvbo->contig = !(tile_flags & NOUVEAU_GEM_TILE_NONCONTIG);
 253
 254         /* Determine the desirable target GPU page size for the buffer. */
 255         for (i = 0; i < vmm->page_nr; i++) {
 256                 /* Because we cannot currently allow VMM maps to fail
 257                  * during buffer migration, we need to determine page
 258                  * size for the buffer up-front, and pre-allocate its
 259                  * page tables.
 260                  *
 261                  * Skip page sizes that can't support needed domains.
 262                  */
 263                 if (cli->device.info.family > NV_DEVICE_INFO_V0_CURIE &&
 264                     (domain & NOUVEAU_GEM_DOMAIN_VRAM) && !vmm->page[i].vram)
 265                         continue;
 266                 if ((domain & NOUVEAU_GEM_DOMAIN_GART) &&
 267                     (!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))
 268                         continue;
 269
 270                 /* Select this page size if it's the first that supports
 271                  * the potential memory domains, or when it's compatible
 272                  * with the requested compression settings.
 273                  */
 274                 if (pi < 0 || !nvbo->comp || vmm->page[i].comp)
 275                         pi = i;
 276
 277                 /* Stop once the buffer is larger than the current page size. */
 278                 if (*size >= 1ULL << vmm->page[i].shift)
 279                         break;
 280         }
 281
 282         if (WARN_ON(pi < 0))
 283                 return ERR_PTR(-EINVAL);
 284
 285         /* Disable compression if suitable settings couldn't be found. */
 286         if (nvbo->comp && !vmm->page[pi].comp) {
 287                 if (mmu->object.oclass >= NVIF_CLASS_MMU_GF100)
 288                         nvbo->kind = mmu->kind[nvbo->kind];
 289                 nvbo->comp = 0;
 290         }
 291         nvbo->page = vmm->page[pi].shift;
 292
 293         nouveau_bo_fixup_align(nvbo, align, size);
 294
 295         return nvbo;
 296 }
 297
 298 int
 299 nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 domain,
 300                 struct sg_table *sg, struct dma_resv *robj)
 301 {
 302         int type = sg ? ttm_bo_type_sg : ttm_bo_type_device;
 303         size_t acc_size;
 304         int ret;
 305
 306         acc_size = ttm_bo_dma_acc_size(nvbo->bo.bdev, size, sizeof(*nvbo));
 307
 308         nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
 309         nouveau_bo_placement_set(nvbo, domain, 0);
 310         INIT_LIST_HEAD(&nvbo->io_reserve_lru);
 311
 312         ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type,
 313                           &nvbo->placement, align >> PAGE_SHIFT, false,
 314                           acc_size, sg, robj, nouveau_bo_del_ttm);
 315         if (ret) {
 316                 /* ttm will call nouveau_bo_del_ttm if it fails.. */
 317                 return ret;
 318         }
 319
 320         return 0;
 321 }
 322
 323 int
 324 nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align,
 325                uint32_t domain, uint32_t tile_mode, uint32_t tile_flags,
 326                struct sg_table *sg, struct dma_resv *robj,
 327                struct nouveau_bo **pnvbo)
 328 {
 329         struct nouveau_bo *nvbo;
 330         int ret;
 331
 332         nvbo = nouveau_bo_alloc(cli, &size, &align, domain, tile_mode,
 333                                 tile_flags);
 334         if (IS_ERR(nvbo))
 335                 return PTR_ERR(nvbo);
 336
 337         ret = nouveau_bo_init(nvbo, size, align, domain, sg, robj);
 338         if (ret)
 339                 return ret;
 340
 341         *pnvbo = nvbo;
 342         return 0;
 343 }
 344
 345 static void
 346 set_placement_list(struct ttm_place *pl, unsigned *n, uint32_t domain)
 347 {
 348         *n = 0;
 349
 350         if (domain & NOUVEAU_GEM_DOMAIN_VRAM) {
 351                 pl[*n].mem_type = TTM_PL_VRAM;
 352                 pl[*n].flags = 0;
 353                 (*n)++;
 354         }
 355         if (domain & NOUVEAU_GEM_DOMAIN_GART) {
 356                 pl[*n].mem_type = TTM_PL_TT;
 357                 pl[*n].flags = 0;
 358                 (*n)++;
 359         }
 360         if (domain & NOUVEAU_GEM_DOMAIN_CPU) {
 361                 pl[*n].mem_type = TTM_PL_SYSTEM;
 362                 pl[(*n)++].flags = 0;
 363         }
 364 }
 365
 366 static void
 367 set_placement_range(struct nouveau_bo *nvbo, uint32_t domain)
 368 {
 369         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 370         u32 vram_pages = drm->client.device.info.ram_size >> PAGE_SHIFT;
 371         unsigned i, fpfn, lpfn;
 372
 373         if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CELSIUS &&
 374             nvbo->mode && (domain & NOUVEAU_GEM_DOMAIN_VRAM) &&
 375             nvbo->bo.mem.num_pages < vram_pages / 4) {
 376                 /*
 377                  * Make sure that the color and depth buffers are handled
 378                  * by independent memory controller units. Up to a 9x
 379                  * speed up when alpha-blending and depth-test are enabled
 380                  * at the same time.
 381                  */
 382                 if (nvbo->zeta) {
 383                         fpfn = vram_pages / 2;
 384                         lpfn = ~0;
 385                 } else {
 386                         fpfn = 0;
 387                         lpfn = vram_pages / 2;
 388                 }
 389                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
 390                         nvbo->placements[i].fpfn = fpfn;
 391                         nvbo->placements[i].lpfn = lpfn;
 392                 }
 393                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
 394                         nvbo->busy_placements[i].fpfn = fpfn;
 395                         nvbo->busy_placements[i].lpfn = lpfn;
 396                 }
 397         }
 398 }
 399
 400 void
 401 nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t domain,
 402                          uint32_t busy)
 403 {
 404         struct ttm_placement *pl = &nvbo->placement;
 405
 406         pl->placement = nvbo->placements;
 407         set_placement_list(nvbo->placements, &pl->num_placement, domain);
 408
 409         pl->busy_placement = nvbo->busy_placements;
 410         set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
 411                            domain | busy);
 412
 413         set_placement_range(nvbo, domain);
 414 }
 415
 416 int
 417 nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t domain, bool contig)
 418 {
 419         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 420         struct ttm_buffer_object *bo = &nvbo->bo;
 421         bool force = false, evict = false;
 422         int ret;
 423
 424         ret = ttm_bo_reserve(bo, false, false, NULL);
 425         if (ret)
 426                 return ret;
 427
 428         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
 429             domain == NOUVEAU_GEM_DOMAIN_VRAM && contig) {
 430                 if (!nvbo->contig) {
 431                         nvbo->contig = true;
 432                         force = true;
 433                         evict = true;
 434                 }
 435         }
 436
 437         if (nvbo->bo.pin_count) {
 438                 bool error = evict;
 439
 440                 switch (bo->mem.mem_type) {
 441                 case TTM_PL_VRAM:
 442                         error |= !(domain & NOUVEAU_GEM_DOMAIN_VRAM);
 443                         break;
 444                 case TTM_PL_TT:
 445                         error |= !(domain & NOUVEAU_GEM_DOMAIN_GART);
 446                 default:
 447                         break;
 448                 }
 449
 450                 if (error) {
 451                         NV_ERROR(drm, "bo %p pinned elsewhere: "
 452                                       "0x%08x vs 0x%08x\n", bo,
 453                                  bo->mem.mem_type, domain);
 454                         ret = -EBUSY;
 455                 }
 456                 ttm_bo_pin(&nvbo->bo);
 457                 goto out;
 458         }
 459
 460         if (evict) {
 461                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
 462                 ret = nouveau_bo_validate(nvbo, false, false);
 463                 if (ret)
 464                         goto out;
 465         }
 466
 467         nouveau_bo_placement_set(nvbo, domain, 0);
 468         ret = nouveau_bo_validate(nvbo, false, false);
 469         if (ret)
 470                 goto out;
 471
 472         ttm_bo_pin(&nvbo->bo);
 473
 474         switch (bo->mem.mem_type) {
 475         case TTM_PL_VRAM:
 476                 drm->gem.vram_available -= bo->mem.size;
 477                 break;
 478         case TTM_PL_TT:
 479                 drm->gem.gart_available -= bo->mem.size;
 480                 break;
 481         default:
 482                 break;
 483         }
 484
 485 out:
 486         if (force && ret)
 487                 nvbo->contig = false;
 488         ttm_bo_unreserve(bo);
 489         return ret;
 490 }
 491
 492 int
 493 nouveau_bo_unpin(struct nouveau_bo *nvbo)
 494 {
 495         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 496         struct ttm_buffer_object *bo = &nvbo->bo;
 497         int ret;
 498
 499         ret = ttm_bo_reserve(bo, false, false, NULL);
 500         if (ret)
 501                 return ret;
 502
 503         ttm_bo_unpin(&nvbo->bo);
 504         if (!nvbo->bo.pin_count) {
 505                 switch (bo->mem.mem_type) {
 506                 case TTM_PL_VRAM:
 507                         drm->gem.vram_available += bo->mem.size;
 508                         break;
 509                 case TTM_PL_TT:
 510                         drm->gem.gart_available += bo->mem.size;
 511                         break;
 512                 default:
 513                         break;
 514                 }
 515         }
 516
 517         ttm_bo_unreserve(bo);
 518         return 0;
 519 }
 520
 521 int
 522 nouveau_bo_map(struct nouveau_bo *nvbo)
 523 {
 524         int ret;
 525
 526         ret = ttm_bo_reserve(&nvbo->bo, false, false, NULL);
 527         if (ret)
 528                 return ret;
 529
 530         ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
 531
 532         ttm_bo_unreserve(&nvbo->bo);
 533         return ret;
 534 }
 535
 536 void
 537 nouveau_bo_unmap(struct nouveau_bo *nvbo)
 538 {
 539         if (!nvbo)
 540                 return;
 541
 542         ttm_bo_kunmap(&nvbo->kmap);
 543 }
 544
 545 void
 546 nouveau_bo_sync_for_device(struct nouveau_bo *nvbo)
 547 {
 548         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 549         struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
 550         int i;
 551
 552         if (!ttm_dma)
 553                 return;
 554
 555         /* Don't waste time looping if the object is coherent */
 556         if (nvbo->force_coherent)
 557                 return;
 558
 559         for (i = 0; i < ttm_dma->ttm.num_pages; i++)
 560                 dma_sync_single_for_device(drm->dev->dev,
 561                                            ttm_dma->dma_address[i],
 562                                            PAGE_SIZE, DMA_TO_DEVICE);
 563 }
 564
 565 void
 566 nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo)
 567 {
 568         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 569         struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
 570         int i;
 571
 572         if (!ttm_dma)
 573                 return;
 574
 575         /* Don't waste time looping if the object is coherent */
 576         if (nvbo->force_coherent)
 577                 return;
 578
 579         for (i = 0; i < ttm_dma->ttm.num_pages; i++)
 580                 dma_sync_single_for_cpu(drm->dev->dev, ttm_dma->dma_address[i],
 581                                         PAGE_SIZE, DMA_FROM_DEVICE);
 582 }
 583
 584 void nouveau_bo_add_io_reserve_lru(struct ttm_buffer_object *bo)
 585 {
 586         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 587         struct nouveau_bo *nvbo = nouveau_bo(bo);
 588
 589         mutex_lock(&drm->ttm.io_reserve_mutex);
 590         list_move_tail(&nvbo->io_reserve_lru, &drm->ttm.io_reserve_lru);
 591         mutex_unlock(&drm->ttm.io_reserve_mutex);
 592 }
 593
 594 void nouveau_bo_del_io_reserve_lru(struct ttm_buffer_object *bo)
 595 {
 596         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 597         struct nouveau_bo *nvbo = nouveau_bo(bo);
 598
 599         mutex_lock(&drm->ttm.io_reserve_mutex);
 600         list_del_init(&nvbo->io_reserve_lru);
 601         mutex_unlock(&drm->ttm.io_reserve_mutex);
 602 }
 603
 604 int
 605 nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
 606                     bool no_wait_gpu)
 607 {
 608         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 609         int ret;
 610
 611         ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, &ctx);
 612         if (ret)
 613                 return ret;
 614
 615         nouveau_bo_sync_for_device(nvbo);
 616
 617         return 0;
 618 }
 619
 620 void
 621 nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
 622 {
 623         bool is_iomem;
 624         u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 625
 626         mem += index;
 627
 628         if (is_iomem)
 629                 iowrite16_native(val, (void __force __iomem *)mem);
 630         else
 631                 *mem = val;
 632 }
 633
 634 u32
 635 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
 636 {
 637         bool is_iomem;
 638         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 639
 640         mem += index;
 641
 642         if (is_iomem)
 643                 return ioread32_native((void __force __iomem *)mem);
 644         else
 645                 return *mem;
 646 }
 647
 648 void
 649 nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
 650 {
 651         bool is_iomem;
 652         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 653
 654         mem += index;
 655
 656         if (is_iomem)
 657                 iowrite32_native(val, (void __force __iomem *)mem);
 658         else
 659                 *mem = val;
 660 }
 661
 662 static struct ttm_tt *
 663 nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags)
 664 {
 665 #if IS_ENABLED(CONFIG_AGP)
 666         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 667
 668         if (drm->agp.bridge) {
 669                 return ttm_agp_tt_create(bo, drm->agp.bridge, page_flags);
 670         }
 671 #endif
 672
 673         return nouveau_sgdma_create_ttm(bo, page_flags);
 674 }
 675
 676 static int
 677 nouveau_ttm_tt_bind(struct ttm_bo_device *bdev, struct ttm_tt *ttm,
 678                     struct ttm_resource *reg)
 679 {
 680 #if IS_ENABLED(CONFIG_AGP)
 681         struct nouveau_drm *drm = nouveau_bdev(bdev);
 682 #endif
 683         if (!reg)
 684                 return -EINVAL;
 685 #if IS_ENABLED(CONFIG_AGP)
 686         if (drm->agp.bridge)
 687                 return ttm_agp_bind(ttm, reg);
 688 #endif
 689         return nouveau_sgdma_bind(bdev, ttm, reg);
 690 }
 691
 692 static void
 693 nouveau_ttm_tt_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 694 {
 695 #if IS_ENABLED(CONFIG_AGP)
 696         struct nouveau_drm *drm = nouveau_bdev(bdev);
 697
 698         if (drm->agp.bridge) {
 699                 ttm_agp_unbind(ttm);
 700                 return;
 701         }
 702 #endif
 703         nouveau_sgdma_unbind(bdev, ttm);
 704 }
 705
 706 static void
 707 nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
 708 {
 709         struct nouveau_bo *nvbo = nouveau_bo(bo);
 710
 711         switch (bo->mem.mem_type) {
 712         case TTM_PL_VRAM:
 713                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART,
 714                                          NOUVEAU_GEM_DOMAIN_CPU);
 715                 break;
 716         default:
 717                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_CPU, 0);
 718                 break;
 719         }
 720
 721         *pl = nvbo->placement;
 722 }
 723
 724 static int
 725 nouveau_bo_move_prep(struct nouveau_drm *drm, struct ttm_buffer_object *bo,
 726                      struct ttm_resource *reg)
 727 {
 728         struct nouveau_mem *old_mem = nouveau_mem(&bo->mem);
 729         struct nouveau_mem *new_mem = nouveau_mem(reg);
 730         struct nvif_vmm *vmm = &drm->client.vmm.vmm;
 731         int ret;
 732
 733         ret = nvif_vmm_get(vmm, LAZY, false, old_mem->mem.page, 0,
 734                            old_mem->mem.size, &old_mem->vma[0]);
 735         if (ret)
 736                 return ret;
 737
 738         ret = nvif_vmm_get(vmm, LAZY, false, new_mem->mem.page, 0,
 739                            new_mem->mem.size, &old_mem->vma[1]);
 740         if (ret)
 741                 goto done;
 742
 743         ret = nouveau_mem_map(old_mem, vmm, &old_mem->vma[0]);
 744         if (ret)
 745                 goto done;
 746
 747         ret = nouveau_mem_map(new_mem, vmm, &old_mem->vma[1]);
 748 done:
 749         if (ret) {
 750                 nvif_vmm_put(vmm, &old_mem->vma[1]);
 751                 nvif_vmm_put(vmm, &old_mem->vma[0]);
 752         }
 753         return 0;
 754 }
 755
 756 static int
 757 nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict,
 758                      struct ttm_operation_ctx *ctx,
 759                      struct ttm_resource *new_reg)
 760 {
 761         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 762         struct nouveau_channel *chan = drm->ttm.chan;
 763         struct nouveau_cli *cli = (void *)chan->user.client;
 764         struct nouveau_fence *fence;
 765         int ret;
 766
 767         /* create temporary vmas for the transfer and attach them to the
 768          * old nvkm_mem node, these will get cleaned up after ttm has
 769          * destroyed the ttm_resource
 770          */
 771         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 772                 ret = nouveau_bo_move_prep(drm, bo, new_reg);
 773                 if (ret)
 774                         return ret;
 775         }
 776
 777         mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING);
 778         ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, ctx->interruptible);
 779         if (ret == 0) {
 780                 ret = drm->ttm.move(chan, bo, &bo->mem, new_reg);
 781                 if (ret == 0) {
 782                         ret = nouveau_fence_new(chan, false, &fence);
 783                         if (ret == 0) {
 784                                 ret = ttm_bo_move_accel_cleanup(bo,
 785                                                                 &fence->base,
 786                                                                 evict, false,
 787                                                                 new_reg);
 788                                 nouveau_fence_unref(&fence);
 789                         }
 790                 }
 791         }
 792         mutex_unlock(&cli->mutex);
 793         return ret;
 794 }
 795
 796 void
 797 nouveau_bo_move_init(struct nouveau_drm *drm)
 798 {
 799         static const struct _method_table {
 800                 const char *name;
 801                 int engine;
 802                 s32 oclass;
 803                 int (*exec)(struct nouveau_channel *,
 804                             struct ttm_buffer_object *,
 805                             struct ttm_resource *, struct ttm_resource *);
 806                 int (*init)(struct nouveau_channel *, u32 handle);
 807         } _methods[] = {
 808                 {  "COPY", 4, 0xc5b5, nve0_bo_move_copy, nve0_bo_move_init },
 809                 {  "GRCE", 0, 0xc5b5, nve0_bo_move_copy, nvc0_bo_move_init },
 810                 {  "COPY", 4, 0xc3b5, nve0_bo_move_copy, nve0_bo_move_init },
 811                 {  "GRCE", 0, 0xc3b5, nve0_bo_move_copy, nvc0_bo_move_init },
 812                 {  "COPY", 4, 0xc1b5, nve0_bo_move_copy, nve0_bo_move_init },
 813                 {  "GRCE", 0, 0xc1b5, nve0_bo_move_copy, nvc0_bo_move_init },
 814                 {  "COPY", 4, 0xc0b5, nve0_bo_move_copy, nve0_bo_move_init },
 815                 {  "GRCE", 0, 0xc0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 816                 {  "COPY", 4, 0xb0b5, nve0_bo_move_copy, nve0_bo_move_init },
 817                 {  "GRCE", 0, 0xb0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 818                 {  "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
 819                 {  "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 820                 { "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },
 821                 { "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },
 822                 {  "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },
 823                 { "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },
 824                 {  "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },
 825                 {  "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },
 826                 {  "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },
 827                 {},
 828         };
 829         const struct _method_table *mthd = _methods;
 830         const char *name = "CPU";
 831         int ret;
 832
 833         do {
 834                 struct nouveau_channel *chan;
 835
 836                 if (mthd->engine)
 837                         chan = drm->cechan;
 838                 else
 839                         chan = drm->channel;
 840                 if (chan == NULL)
 841                         continue;
 842
 843                 ret = nvif_object_ctor(&chan->user, "ttmBoMove",
 844                                        mthd->oclass | (mthd->engine << 16),
 845                                        mthd->oclass, NULL, 0,
 846                                        &drm->ttm.copy);
 847                 if (ret == 0) {
 848                         ret = mthd->init(chan, drm->ttm.copy.handle);
 849                         if (ret) {
 850                                 nvif_object_dtor(&drm->ttm.copy);
 851                                 continue;
 852                         }
 853
 854                         drm->ttm.move = mthd->exec;
 855                         drm->ttm.chan = chan;
 856                         name = mthd->name;
 857                         break;
 858                 }
 859         } while ((++mthd)->exec);
 860
 861         NV_INFO(drm, "MM: using %s for buffer copies\n", name);
 862 }
 863
 864 static int
 865 nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict,
 866                       struct ttm_operation_ctx *ctx,
 867                       struct ttm_resource *new_reg)
 868 {
 869         struct ttm_place placement_memtype = {
 870                 .fpfn = 0,
 871                 .lpfn = 0,
 872                 .mem_type = TTM_PL_TT,
 873                 .flags = 0
 874         };
 875         struct ttm_placement placement;
 876         struct ttm_resource tmp_reg;
 877         int ret;
 878
 879         placement.num_placement = placement.num_busy_placement = 1;
 880         placement.placement = placement.busy_placement = &placement_memtype;
 881
 882         tmp_reg = *new_reg;
 883         tmp_reg.mm_node = NULL;
 884         ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, ctx);
 885         if (ret)
 886                 return ret;
 887
 888         ret = ttm_tt_populate(bo->bdev, bo->ttm, ctx);
 889         if (ret)
 890                 goto out;
 891
 892         ret = nouveau_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_reg);
 893         if (ret)
 894                 goto out;
 895
 896         ret = nouveau_bo_move_m2mf(bo, true, ctx, &tmp_reg);
 897         if (ret)
 898                 goto out;
 899
 900         ret = ttm_bo_move_to_system(bo, ctx);
 901         if (ret)
 902                 goto out;
 903
 904         ttm_bo_assign_mem(bo, &tmp_reg);
 905 out:
 906         ttm_resource_free(bo, &tmp_reg);
 907         return ret;
 908 }
 909
 910 static int
 911 nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict,
 912                       struct ttm_operation_ctx *ctx,
 913                       struct ttm_resource *new_reg)
 914 {
 915         struct ttm_place placement_memtype = {
 916                 .fpfn = 0,
 917                 .lpfn = 0,
 918                 .mem_type = TTM_PL_TT,
 919                 .flags = 0
 920         };
 921         struct ttm_placement placement;
 922         struct ttm_resource tmp_reg;
 923         int ret;
 924
 925         placement.num_placement = placement.num_busy_placement = 1;
 926         placement.placement = placement.busy_placement = &placement_memtype;
 927
 928         tmp_reg = *new_reg;
 929         tmp_reg.mm_node = NULL;
 930         ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, ctx);
 931         if (ret)
 932                 return ret;
 933
 934         ret = ttm_bo_move_to_new_tt_mem(bo, ctx, &tmp_reg);
 935         if (ret)
 936                 goto out;
 937
 938         ttm_bo_assign_mem(bo, &tmp_reg);
 939         ret = nouveau_bo_move_m2mf(bo, true, ctx, new_reg);
 940         if (ret)
 941                 goto out;
 942
 943 out:
 944         ttm_resource_free(bo, &tmp_reg);
 945         return ret;
 946 }
 947
 948 static void
 949 nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, bool evict,
 950                      struct ttm_resource *new_reg)
 951 {
 952         struct nouveau_mem *mem = new_reg ? nouveau_mem(new_reg) : NULL;
 953         struct nouveau_bo *nvbo = nouveau_bo(bo);
 954         struct nouveau_vma *vma;
 955
 956         /* ttm can now (stupidly) pass the driver bos it didn't create... */
 957         if (bo->destroy != nouveau_bo_del_ttm)
 958                 return;
 959
 960         nouveau_bo_del_io_reserve_lru(bo);
 961
 962         if (mem && new_reg->mem_type != TTM_PL_SYSTEM &&
 963             mem->mem.page == nvbo->page) {
 964                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 965                         nouveau_vma_map(vma, mem);
 966                 }
 967         } else {
 968                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 969                         WARN_ON(ttm_bo_wait(bo, false, false));
 970                         nouveau_vma_unmap(vma);
 971                 }
 972         }
 973
 974         if (new_reg) {
 975                 if (new_reg->mm_node)
 976                         nvbo->offset = (new_reg->start << PAGE_SHIFT);
 977                 else
 978                         nvbo->offset = 0;
 979         }
 980
 981 }
 982
 983 static int
 984 nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_resource *new_reg,
 985                    struct nouveau_drm_tile **new_tile)
 986 {
 987         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 988         struct drm_device *dev = drm->dev;
 989         struct nouveau_bo *nvbo = nouveau_bo(bo);
 990         u64 offset = new_reg->start << PAGE_SHIFT;
 991
 992         *new_tile = NULL;
 993         if (new_reg->mem_type != TTM_PL_VRAM)
 994                 return 0;
 995
 996         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {
 997                 *new_tile = nv10_bo_set_tiling(dev, offset, new_reg->size,
 998                                                nvbo->mode, nvbo->zeta);
 999         }
1000
1001         return 0;
1002 }
1003
1004 static void
1005 nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
1006                       struct nouveau_drm_tile *new_tile,
1007                       struct nouveau_drm_tile **old_tile)
1008 {
1009         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1010         struct drm_device *dev = drm->dev;
1011         struct dma_fence *fence = dma_resv_get_excl(bo->base.resv);
1012
1013         nv10_bo_put_tile_region(dev, *old_tile, fence);
1014         *old_tile = new_tile;
1015 }
1016
1017 static int
1018 nouveau_bo_move(struct ttm_buffer_object *bo, bool evict,
1019                 struct ttm_operation_ctx *ctx,
1020                 struct ttm_resource *new_reg)
1021 {
1022         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1023         struct nouveau_bo *nvbo = nouveau_bo(bo);
1024         struct ttm_resource *old_reg = &bo->mem;
1025         struct nouveau_drm_tile *new_tile = NULL;
1026         int ret = 0;
1027
1028         ret = ttm_bo_wait_ctx(bo, ctx);
1029         if (ret)
1030                 return ret;
1031
1032         if (nvbo->bo.pin_count)
1033                 NV_WARN(drm, "Moving pinned object %p!\n", nvbo);
1034
1035         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1036                 ret = nouveau_bo_vm_bind(bo, new_reg, &new_tile);
1037                 if (ret)
1038                         return ret;
1039         }
1040
1041         /* Fake bo copy. */
1042         if (old_reg->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
1043                 ttm_bo_move_null(bo, new_reg);
1044                 goto out;
1045         }
1046
1047         if (old_reg->mem_type == TTM_PL_SYSTEM &&
1048             new_reg->mem_type == TTM_PL_TT) {
1049                 ttm_bo_move_null(bo, new_reg);
1050                 goto out;
1051         }
1052
1053         if (old_reg->mem_type == TTM_PL_TT &&
1054             new_reg->mem_type == TTM_PL_SYSTEM) {
1055                 ret = ttm_bo_move_to_system(bo, ctx);
1056                 if (ret)
1057                         return ret;
1058                 ttm_bo_assign_mem(bo, new_reg);
1059                 goto out;
1060         }
1061
1062         /* Hardware assisted copy. */
1063         if (drm->ttm.move) {
1064                 if (new_reg->mem_type == TTM_PL_SYSTEM)
1065                         ret = nouveau_bo_move_flipd(bo, evict, ctx,
1066                                                     new_reg);
1067                 else if (old_reg->mem_type == TTM_PL_SYSTEM)
1068                         ret = nouveau_bo_move_flips(bo, evict, ctx,
1069                                                     new_reg);
1070                 else
1071                         ret = nouveau_bo_move_m2mf(bo, evict, ctx,
1072                                                    new_reg);
1073                 if (!ret)
1074                         goto out;
1075         }
1076
1077         /* Fallback to software copy. */
1078         ret = ttm_bo_move_memcpy(bo, ctx, new_reg);
1079
1080 out:
1081         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1082                 if (ret)
1083                         nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
1084                 else
1085                         nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
1086         }
1087
1088         return ret;
1089 }
1090
1091 static int
1092 nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
1093 {
1094         struct nouveau_bo *nvbo = nouveau_bo(bo);
1095
1096         return drm_vma_node_verify_access(&nvbo->bo.base.vma_node,
1097                                           filp->private_data);
1098 }
1099
1100 static void
1101 nouveau_ttm_io_mem_free_locked(struct nouveau_drm *drm,
1102                                struct ttm_resource *reg)
1103 {
1104         struct nouveau_mem *mem = nouveau_mem(reg);
1105
1106         if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1107                 switch (reg->mem_type) {
1108                 case TTM_PL_TT:
1109                         if (mem->kind)
1110                                 nvif_object_unmap_handle(&mem->mem.object);
1111                         break;
1112                 case TTM_PL_VRAM:
1113                         nvif_object_unmap_handle(&mem->mem.object);
1114                         break;
1115                 default:
1116                         break;
1117                 }
1118         }
1119 }
1120
1121 static int
1122 nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *reg)
1123 {
1124         struct nouveau_drm *drm = nouveau_bdev(bdev);
1125         struct nvkm_device *device = nvxx_device(&drm->client.device);
1126         struct nouveau_mem *mem = nouveau_mem(reg);
1127         struct nvif_mmu *mmu = &drm->client.mmu;
1128         const u8 type = mmu->type[drm->ttm.type_vram].type;
1129         int ret;
1130
1131         mutex_lock(&drm->ttm.io_reserve_mutex);
1132 retry:
1133         switch (reg->mem_type) {
1134         case TTM_PL_SYSTEM:
1135                 /* System memory */
1136                 ret = 0;
1137                 goto out;
1138         case TTM_PL_TT:
1139 #if IS_ENABLED(CONFIG_AGP)
1140                 if (drm->agp.bridge) {
1141                         reg->bus.offset = (reg->start << PAGE_SHIFT) +
1142                                 drm->agp.base;
1143                         reg->bus.is_iomem = !drm->agp.cma;
1144                         reg->bus.caching = ttm_write_combined;
1145                 }
1146 #endif
1147                 if (drm->client.mem->oclass < NVIF_CLASS_MEM_NV50 ||
1148                     !mem->kind) {
1149                         /* untiled */
1150                         ret = 0;
1151                         break;
1152                 }
1153                 fallthrough;    /* tiled memory */
1154         case TTM_PL_VRAM:
1155                 reg->bus.offset = (reg->start << PAGE_SHIFT) +
1156                         device->func->resource_addr(device, 1);
1157                 reg->bus.is_iomem = true;
1158
1159                 /* Some BARs do not support being ioremapped WC */
1160                 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
1161                     type & NVIF_MEM_UNCACHED)
1162                         reg->bus.caching = ttm_uncached;
1163                 else
1164                         reg->bus.caching = ttm_write_combined;
1165
1166                 if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1167                         union {
1168                                 struct nv50_mem_map_v0 nv50;
1169                                 struct gf100_mem_map_v0 gf100;
1170                         } args;
1171                         u64 handle, length;
1172                         u32 argc = 0;
1173
1174                         switch (mem->mem.object.oclass) {
1175                         case NVIF_CLASS_MEM_NV50:
1176                                 args.nv50.version = 0;
1177                                 args.nv50.ro = 0;
1178                                 args.nv50.kind = mem->kind;
1179                                 args.nv50.comp = mem->comp;
1180                                 argc = sizeof(args.nv50);
1181                                 break;
1182                         case NVIF_CLASS_MEM_GF100:
1183                                 args.gf100.version = 0;
1184                                 args.gf100.ro = 0;
1185                                 args.gf100.kind = mem->kind;
1186                                 argc = sizeof(args.gf100);
1187                                 break;
1188                         default:
1189                                 WARN_ON(1);
1190                                 break;
1191                         }
1192
1193                         ret = nvif_object_map_handle(&mem->mem.object,
1194                                                      &args, argc,
1195                                                      &handle, &length);
1196                         if (ret != 1) {
1197                                 if (WARN_ON(ret == 0))
1198                                         ret = -EINVAL;
1199                                 goto out;
1200                         }
1201
1202                         reg->bus.offset = handle;
1203                         ret = 0;
1204                 }
1205                 break;
1206         default:
1207                 ret = -EINVAL;
1208         }
1209
1210 out:
1211         if (ret == -ENOSPC) {
1212                 struct nouveau_bo *nvbo;
1213
1214                 nvbo = list_first_entry_or_null(&drm->ttm.io_reserve_lru,
1215                                                 typeof(*nvbo),
1216                                                 io_reserve_lru);
1217                 if (nvbo) {
1218                         list_del_init(&nvbo->io_reserve_lru);
1219                         drm_vma_node_unmap(&nvbo->bo.base.vma_node,
1220                                            bdev->dev_mapping);
1221                         nouveau_ttm_io_mem_free_locked(drm, &nvbo->bo.mem);
1222                         goto retry;
1223                 }
1224
1225         }
1226         mutex_unlock(&drm->ttm.io_reserve_mutex);
1227         return ret;
1228 }
1229
1230 static void
1231 nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_resource *reg)
1232 {
1233         struct nouveau_drm *drm = nouveau_bdev(bdev);
1234
1235         mutex_lock(&drm->ttm.io_reserve_mutex);
1236         nouveau_ttm_io_mem_free_locked(drm, reg);
1237         mutex_unlock(&drm->ttm.io_reserve_mutex);
1238 }
1239
1240 vm_fault_t nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
1241 {
1242         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1243         struct nouveau_bo *nvbo = nouveau_bo(bo);
1244         struct nvkm_device *device = nvxx_device(&drm->client.device);
1245         u32 mappable = device->func->resource_size(device, 1) >> PAGE_SHIFT;
1246         int i, ret;
1247
1248         /* as long as the bo isn't in vram, and isn't tiled, we've got
1249          * nothing to do here.
1250          */
1251         if (bo->mem.mem_type != TTM_PL_VRAM) {
1252                 if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA ||
1253                     !nvbo->kind)
1254                         return 0;
1255
1256                 if (bo->mem.mem_type != TTM_PL_SYSTEM)
1257                         return 0;
1258
1259                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
1260
1261         } else {
1262                 /* make sure bo is in mappable vram */
1263                 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA ||
1264                     bo->mem.start + bo->mem.num_pages < mappable)
1265                         return 0;
1266
1267                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
1268                         nvbo->placements[i].fpfn = 0;
1269                         nvbo->placements[i].lpfn = mappable;
1270                 }
1271
1272                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
1273                         nvbo->busy_placements[i].fpfn = 0;
1274                         nvbo->busy_placements[i].lpfn = mappable;
1275                 }
1276
1277                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_VRAM, 0);
1278         }
1279
1280         ret = nouveau_bo_validate(nvbo, false, false);
1281         if (unlikely(ret == -EBUSY || ret == -ERESTARTSYS))
1282                 return VM_FAULT_NOPAGE;
1283         else if (unlikely(ret))
1284                 return VM_FAULT_SIGBUS;
1285
1286         ttm_bo_move_to_lru_tail_unlocked(bo);
1287         return 0;
1288 }
1289
1290 static int
1291 nouveau_ttm_tt_populate(struct ttm_bo_device *bdev,
1292                         struct ttm_tt *ttm, struct ttm_operation_ctx *ctx)
1293 {
1294         struct ttm_dma_tt *ttm_dma = (void *)ttm;
1295         struct nouveau_drm *drm;
1296         struct device *dev;
1297         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1298
1299         if (ttm_tt_is_populated(ttm))
1300                 return 0;
1301
1302         if (slave && ttm->sg) {
1303                 /* make userspace faulting work */
1304                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
1305                                                  ttm_dma->dma_address, ttm->num_pages);
1306                 ttm_tt_set_populated(ttm);
1307                 return 0;
1308         }
1309
1310         drm = nouveau_bdev(bdev);
1311         dev = drm->dev->dev;
1312
1313 #if IS_ENABLED(CONFIG_AGP)
1314         if (drm->agp.bridge) {
1315                 return ttm_pool_populate(ttm, ctx);
1316         }
1317 #endif
1318
1319 #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1320         if (swiotlb_nr_tbl()) {
1321                 return ttm_dma_populate((void *)ttm, dev, ctx);
1322         }
1323 #endif
1324         return ttm_populate_and_map_pages(dev, ttm_dma, ctx);
1325 }
1326
1327 static void
1328 nouveau_ttm_tt_unpopulate(struct ttm_bo_device *bdev,
1329                           struct ttm_tt *ttm)
1330 {
1331         struct ttm_dma_tt *ttm_dma = (void *)ttm;
1332         struct nouveau_drm *drm;
1333         struct device *dev;
1334         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1335
1336         if (slave)
1337                 return;
1338
1339         drm = nouveau_bdev(bdev);
1340         dev = drm->dev->dev;
1341
1342 #if IS_ENABLED(CONFIG_AGP)
1343         if (drm->agp.bridge) {
1344                 ttm_pool_unpopulate(ttm);
1345                 return;
1346         }
1347 #endif
1348
1349 #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1350         if (swiotlb_nr_tbl()) {
1351                 ttm_dma_unpopulate((void *)ttm, dev);
1352                 return;
1353         }
1354 #endif
1355
1356         ttm_unmap_and_unpopulate_pages(dev, ttm_dma);
1357 }
1358
1359 static void
1360 nouveau_ttm_tt_destroy(struct ttm_bo_device *bdev,
1361                        struct ttm_tt *ttm)
1362 {
1363 #if IS_ENABLED(CONFIG_AGP)
1364         struct nouveau_drm *drm = nouveau_bdev(bdev);
1365         if (drm->agp.bridge) {
1366                 ttm_agp_unbind(ttm);
1367                 ttm_tt_destroy_common(bdev, ttm);
1368                 ttm_agp_destroy(ttm);
1369                 return;
1370         }
1371 #endif
1372         nouveau_sgdma_destroy(bdev, ttm);
1373 }
1374
1375 void
1376 nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence, bool exclusive)
1377 {
1378         struct dma_resv *resv = nvbo->bo.base.resv;
1379
1380         if (exclusive)
1381                 dma_resv_add_excl_fence(resv, &fence->base);
1382         else if (fence)
1383                 dma_resv_add_shared_fence(resv, &fence->base);
1384 }
1385
1386 struct ttm_bo_driver nouveau_bo_driver = {
1387         .ttm_tt_create = &nouveau_ttm_tt_create,
1388         .ttm_tt_populate = &nouveau_ttm_tt_populate,
1389         .ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate,
1390         .ttm_tt_bind = &nouveau_ttm_tt_bind,
1391         .ttm_tt_unbind = &nouveau_ttm_tt_unbind,
1392         .ttm_tt_destroy = &nouveau_ttm_tt_destroy,
1393         .eviction_valuable = ttm_bo_eviction_valuable,
1394         .evict_flags = nouveau_bo_evict_flags,
1395         .move_notify = nouveau_bo_move_ntfy,
1396         .move = nouveau_bo_move,
1397         .verify_access = nouveau_bo_verify_access,
1398         .io_mem_reserve = &nouveau_ttm_io_mem_reserve,
1399         .io_mem_free = &nouveau_ttm_io_mem_free,
1400 };