drivers/gpu/drm/msm/dp/dp_panel.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
   4  */
   5
   6 #include "dp_panel.h"
   7
   8 #include <drm/drm_connector.h>
   9 #include <drm/drm_edid.h>
  10 #include <drm/drm_print.h>
  11
  12 struct dp_panel_private {
  13         struct device *dev;
  14         struct drm_device *drm_dev;
  15         struct dp_panel dp_panel;
  16         struct drm_dp_aux *aux;
  17         struct dp_link *link;
  18         struct dp_catalog *catalog;
  19         bool panel_on;
  20         bool aux_cfg_update_done;
  21 };
  22
  23 static void dp_panel_read_psr_cap(struct dp_panel_private *panel)
  24 {
  25         ssize_t rlen;
  26         struct dp_panel *dp_panel;
  27
  28         dp_panel = &panel->dp_panel;
  29
  30         /* edp sink */
  31         if (dp_panel->dpcd[DP_EDP_CONFIGURATION_CAP]) {
  32                 rlen = drm_dp_dpcd_read(panel->aux, DP_PSR_SUPPORT,
  33                                 &dp_panel->psr_cap, sizeof(dp_panel->psr_cap));
  34                 if (rlen == sizeof(dp_panel->psr_cap)) {
  35                         drm_dbg_dp(panel->drm_dev,
  36                                 "psr version: 0x%x, psr_cap: 0x%x\n",
  37                                 dp_panel->psr_cap.version,
  38                                 dp_panel->psr_cap.capabilities);
  39                 } else
  40                         DRM_ERROR("failed to read psr info, rlen=%zd\n", rlen);
  41         }
  42 }
  43
  44 static int dp_panel_read_dpcd(struct dp_panel *dp_panel)
  45 {
  46         int rc = 0;
  47         size_t len;
  48         ssize_t rlen;
  49         struct dp_panel_private *panel;
  50         struct dp_link_info *link_info;
  51         u8 *dpcd, major = 0, minor = 0, temp;
  52         u32 offset = DP_DPCD_REV;
  53
  54         dpcd = dp_panel->dpcd;
  55
  56         panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
  57         link_info = &dp_panel->link_info;
  58
  59         rlen = drm_dp_dpcd_read(panel->aux, offset,
  60                         dpcd, (DP_RECEIVER_CAP_SIZE + 1));
  61         if (rlen < (DP_RECEIVER_CAP_SIZE + 1)) {
  62                 DRM_ERROR("dpcd read failed, rlen=%zd\n", rlen);
  63                 if (rlen == -ETIMEDOUT)
  64                         rc = rlen;
  65                 else
  66                         rc = -EINVAL;
  67
  68                 goto end;
  69         }
  70
  71         temp = dpcd[DP_TRAINING_AUX_RD_INTERVAL];
  72
  73         /* check for EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT */
  74         if (temp & BIT(7)) {
  75                 drm_dbg_dp(panel->drm_dev,
  76                                 "using EXTENDED_RECEIVER_CAPABILITY_FIELD\n");
  77                 offset = DPRX_EXTENDED_DPCD_FIELD;
  78         }
  79
  80         rlen = drm_dp_dpcd_read(panel->aux, offset,
  81                 dpcd, (DP_RECEIVER_CAP_SIZE + 1));
  82         if (rlen < (DP_RECEIVER_CAP_SIZE + 1)) {
  83                 DRM_ERROR("dpcd read failed, rlen=%zd\n", rlen);
  84                 if (rlen == -ETIMEDOUT)
  85                         rc = rlen;
  86                 else
  87                         rc = -EINVAL;
  88
  89                 goto end;
  90         }
  91
  92         link_info->revision = dpcd[DP_DPCD_REV];
  93         major = (link_info->revision >> 4) & 0x0f;
  94         minor = link_info->revision & 0x0f;
  95
  96         link_info->rate = drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]);
  97         link_info->num_lanes = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
  98
  99         /* Limit data lanes from data-lanes of endpoint property of dtsi */
 100         if (link_info->num_lanes > dp_panel->max_dp_lanes)
 101                 link_info->num_lanes = dp_panel->max_dp_lanes;
 102
 103         /* Limit link rate from link-frequencies of endpoint property of dtsi */
 104         if (link_info->rate > dp_panel->max_dp_link_rate)
 105                 link_info->rate = dp_panel->max_dp_link_rate;
 106
 107         drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor);
 108         drm_dbg_dp(panel->drm_dev, "link_rate=%d\n", link_info->rate);
 109         drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes);
 110
 111         if (drm_dp_enhanced_frame_cap(dpcd))
 112                 link_info->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
 113
 114         dp_panel->dfp_present = dpcd[DP_DOWNSTREAMPORT_PRESENT];
 115         dp_panel->dfp_present &= DP_DWN_STRM_PORT_PRESENT;
 116
 117         if (dp_panel->dfp_present && (dpcd[DP_DPCD_REV] > 0x10)) {
 118                 dp_panel->ds_port_cnt = dpcd[DP_DOWN_STREAM_PORT_COUNT];
 119                 dp_panel->ds_port_cnt &= DP_PORT_COUNT_MASK;
 120                 len = DP_DOWNSTREAM_PORTS * DP_DOWNSTREAM_CAP_SIZE;
 121
 122                 rlen = drm_dp_dpcd_read(panel->aux,
 123                         DP_DOWNSTREAM_PORT_0, dp_panel->ds_cap_info, len);
 124                 if (rlen < len) {
 125                         DRM_ERROR("ds port status failed, rlen=%zd\n", rlen);
 126                         rc = -EINVAL;
 127                         goto end;
 128                 }
 129         }
 130
 131         dp_panel_read_psr_cap(panel);
 132 end:
 133         return rc;
 134 }
 135
 136 static u32 dp_panel_get_supported_bpp(struct dp_panel *dp_panel,
 137                 u32 mode_edid_bpp, u32 mode_pclk_khz)
 138 {
 139         struct dp_link_info *link_info;
 140         const u32 max_supported_bpp = 30, min_supported_bpp = 18;
 141         u32 bpp = 0, data_rate_khz = 0;
 142
 143         bpp = min_t(u32, mode_edid_bpp, max_supported_bpp);
 144
 145         link_info = &dp_panel->link_info;
 146         data_rate_khz = link_info->num_lanes * link_info->rate * 8;
 147
 148         while (bpp > min_supported_bpp) {
 149                 if (mode_pclk_khz * bpp <= data_rate_khz)
 150                         break;
 151                 bpp -= 6;
 152         }
 153
 154         return bpp;
 155 }
 156
 157 static int dp_panel_update_modes(struct drm_connector *connector,
 158         struct edid *edid)
 159 {
 160         int rc = 0;
 161
 162         if (edid) {
 163                 rc = drm_connector_update_edid_property(connector, edid);
 164                 if (rc) {
 165                         DRM_ERROR("failed to update edid property %d\n", rc);
 166                         return rc;
 167                 }
 168                 rc = drm_add_edid_modes(connector, edid);
 169                 return rc;
 170         }
 171
 172         rc = drm_connector_update_edid_property(connector, NULL);
 173         if (rc)
 174                 DRM_ERROR("failed to update edid property %d\n", rc);
 175
 176         return rc;
 177 }
 178
 179 int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
 180         struct drm_connector *connector)
 181 {
 182         int rc = 0, bw_code;
 183         int rlen, count;
 184         struct dp_panel_private *panel;
 185
 186         if (!dp_panel || !connector) {
 187                 DRM_ERROR("invalid input\n");
 188                 return -EINVAL;
 189         }
 190
 191         panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
 192
 193         rc = dp_panel_read_dpcd(dp_panel);
 194         if (rc) {
 195                 DRM_ERROR("read dpcd failed %d\n", rc);
 196                 return rc;
 197         }
 198
 199         bw_code = drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate);
 200         if (!is_link_rate_valid(bw_code) ||
 201                         !is_lane_count_valid(dp_panel->link_info.num_lanes) ||
 202                         (bw_code > dp_panel->max_bw_code)) {
 203                 DRM_ERROR("Illegal link rate=%d lane=%d\n", dp_panel->link_info.rate,
 204                                 dp_panel->link_info.num_lanes);
 205                 return -EINVAL;
 206         }
 207
 208         if (dp_panel->dfp_present) {
 209                 rlen = drm_dp_dpcd_read(panel->aux, DP_SINK_COUNT,
 210                                 &count, 1);
 211                 if (rlen == 1) {
 212                         count = DP_GET_SINK_COUNT(count);
 213                         if (!count) {
 214                                 DRM_ERROR("no downstream ports connected\n");
 215                                 panel->link->sink_count = 0;
 216                                 rc = -ENOTCONN;
 217                                 goto end;
 218                         }
 219                 }
 220         }
 221
 222         kfree(dp_panel->edid);
 223         dp_panel->edid = NULL;
 224
 225         dp_panel->edid = drm_get_edid(connector,
 226                                               &panel->aux->ddc);
 227         if (!dp_panel->edid) {
 228                 DRM_ERROR("panel edid read failed\n");
 229                 /* check edid read fail is due to unplug */
 230                 if (!dp_catalog_link_is_connected(panel->catalog)) {
 231                         rc = -ETIMEDOUT;
 232                         goto end;
 233                 }
 234         }
 235
 236         if (panel->aux_cfg_update_done) {
 237                 drm_dbg_dp(panel->drm_dev,
 238                                 "read DPCD with updated AUX config\n");
 239                 rc = dp_panel_read_dpcd(dp_panel);
 240                 bw_code = drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate);
 241                 if (rc || !is_link_rate_valid(bw_code) ||
 242                         !is_lane_count_valid(dp_panel->link_info.num_lanes)
 243                         || (bw_code > dp_panel->max_bw_code)) {
 244                         DRM_ERROR("read dpcd failed %d\n", rc);
 245                         return rc;
 246                 }
 247                 panel->aux_cfg_update_done = false;
 248         }
 249 end:
 250         return rc;
 251 }
 252
 253 u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel,
 254                 u32 mode_edid_bpp, u32 mode_pclk_khz)
 255 {
 256         struct dp_panel_private *panel;
 257         u32 bpp;
 258
 259         if (!dp_panel || !mode_edid_bpp || !mode_pclk_khz) {
 260                 DRM_ERROR("invalid input\n");
 261                 return 0;
 262         }
 263
 264         panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
 265
 266         if (dp_panel->video_test)
 267                 bpp = dp_link_bit_depth_to_bpp(
 268                                 panel->link->test_video.test_bit_depth);
 269         else
 270                 bpp = dp_panel_get_supported_bpp(dp_panel, mode_edid_bpp,
 271                                 mode_pclk_khz);
 272
 273         return bpp;
 274 }
 275
 276 int dp_panel_get_modes(struct dp_panel *dp_panel,
 277         struct drm_connector *connector)
 278 {
 279         if (!dp_panel) {
 280                 DRM_ERROR("invalid input\n");
 281                 return -EINVAL;
 282         }
 283
 284         if (dp_panel->edid)
 285                 return dp_panel_update_modes(connector, dp_panel->edid);
 286
 287         return 0;
 288 }
 289
 290 static u8 dp_panel_get_edid_checksum(struct edid *edid)
 291 {
 292         edid += edid->extensions;
 293
 294         return edid->checksum;
 295 }
 296
 297 void dp_panel_handle_sink_request(struct dp_panel *dp_panel)
 298 {
 299         struct dp_panel_private *panel;
 300
 301         if (!dp_panel) {
 302                 DRM_ERROR("invalid input\n");
 303                 return;
 304         }
 305
 306         panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
 307
 308         if (panel->link->sink_request & DP_TEST_LINK_EDID_READ) {
 309                 u8 checksum;
 310
 311                 if (dp_panel->edid)
 312                         checksum = dp_panel_get_edid_checksum(dp_panel->edid);
 313                 else
 314                         checksum = dp_panel->connector->real_edid_checksum;
 315
 316                 dp_link_send_edid_checksum(panel->link, checksum);
 317                 dp_link_send_test_response(panel->link);
 318         }
 319 }
 320
 321 void dp_panel_tpg_config(struct dp_panel *dp_panel, bool enable)
 322 {
 323         struct dp_catalog *catalog;
 324         struct dp_panel_private *panel;
 325
 326         if (!dp_panel) {
 327                 DRM_ERROR("invalid input\n");
 328                 return;
 329         }
 330
 331         panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
 332         catalog = panel->catalog;
 333
 334         if (!panel->panel_on) {
 335                 drm_dbg_dp(panel->drm_dev,
 336                                 "DP panel not enabled, handle TPG on next on\n");
 337                 return;
 338         }
 339
 340         if (!enable) {
 341                 dp_catalog_panel_tpg_disable(catalog);
 342                 return;
 343         }
 344
 345         drm_dbg_dp(panel->drm_dev, "calling catalog tpg_enable\n");
 346         dp_catalog_panel_tpg_enable(catalog, &panel->dp_panel.dp_mode.drm_mode);
 347 }
 348
 349 void dp_panel_dump_regs(struct dp_panel *dp_panel)
 350 {
 351         struct dp_catalog *catalog;
 352         struct dp_panel_private *panel;
 353
 354         panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
 355         catalog = panel->catalog;
 356
 357         dp_catalog_dump_regs(catalog);
 358 }
 359
 360 int dp_panel_timing_cfg(struct dp_panel *dp_panel)
 361 {
 362         u32 data, total_ver, total_hor;
 363         struct dp_catalog *catalog;
 364         struct dp_panel_private *panel;
 365         struct drm_display_mode *drm_mode;
 366
 367         panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
 368         catalog = panel->catalog;
 369         drm_mode = &panel->dp_panel.dp_mode.drm_mode;
 370
 371         drm_dbg_dp(panel->drm_dev, "width=%d hporch= %d %d %d\n",
 372                 drm_mode->hdisplay, drm_mode->htotal - drm_mode->hsync_end,
 373                 drm_mode->hsync_start - drm_mode->hdisplay,
 374                 drm_mode->hsync_end - drm_mode->hsync_start);
 375
 376         drm_dbg_dp(panel->drm_dev, "height=%d vporch= %d %d %d\n",
 377                 drm_mode->vdisplay, drm_mode->vtotal - drm_mode->vsync_end,
 378                 drm_mode->vsync_start - drm_mode->vdisplay,
 379                 drm_mode->vsync_end - drm_mode->vsync_start);
 380
 381         total_hor = drm_mode->htotal;
 382
 383         total_ver = drm_mode->vtotal;
 384
 385         data = total_ver;
 386         data <<= 16;
 387         data |= total_hor;
 388
 389         catalog->total = data;
 390
 391         data = (drm_mode->vtotal - drm_mode->vsync_start);
 392         data <<= 16;
 393         data |= (drm_mode->htotal - drm_mode->hsync_start);
 394
 395         catalog->sync_start = data;
 396
 397         data = drm_mode->vsync_end - drm_mode->vsync_start;
 398         data <<= 16;
 399         data |= (panel->dp_panel.dp_mode.v_active_low << 31);
 400         data |= drm_mode->hsync_end - drm_mode->hsync_start;
 401         data |= (panel->dp_panel.dp_mode.h_active_low << 15);
 402
 403         catalog->width_blanking = data;
 404
 405         data = drm_mode->vdisplay;
 406         data <<= 16;
 407         data |= drm_mode->hdisplay;
 408
 409         catalog->dp_active = data;
 410
 411         dp_catalog_panel_timing_cfg(catalog);
 412         panel->panel_on = true;
 413
 414         return 0;
 415 }
 416
 417 int dp_panel_init_panel_info(struct dp_panel *dp_panel)
 418 {
 419         struct drm_display_mode *drm_mode;
 420         struct dp_panel_private *panel;
 421
 422         drm_mode = &dp_panel->dp_mode.drm_mode;
 423
 424         panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
 425
 426         /*
 427          * print resolution info as this is a result
 428          * of user initiated action of cable connection
 429          */
 430         drm_dbg_dp(panel->drm_dev, "SET NEW RESOLUTION:\n");
 431         drm_dbg_dp(panel->drm_dev, "%dx%d@%dfps\n",
 432                 drm_mode->hdisplay, drm_mode->vdisplay, drm_mode_vrefresh(drm_mode));
 433         drm_dbg_dp(panel->drm_dev,
 434                         "h_porches(back|front|width) = (%d|%d|%d)\n",
 435                         drm_mode->htotal - drm_mode->hsync_end,
 436                         drm_mode->hsync_start - drm_mode->hdisplay,
 437                         drm_mode->hsync_end - drm_mode->hsync_start);
 438         drm_dbg_dp(panel->drm_dev,
 439                         "v_porches(back|front|width) = (%d|%d|%d)\n",
 440                         drm_mode->vtotal - drm_mode->vsync_end,
 441                         drm_mode->vsync_start - drm_mode->vdisplay,
 442                         drm_mode->vsync_end - drm_mode->vsync_start);
 443         drm_dbg_dp(panel->drm_dev, "pixel clock (KHz)=(%d)\n",
 444                                 drm_mode->clock);
 445         drm_dbg_dp(panel->drm_dev, "bpp = %d\n", dp_panel->dp_mode.bpp);
 446
 447         dp_panel->dp_mode.bpp = max_t(u32, 18,
 448                                 min_t(u32, dp_panel->dp_mode.bpp, 30));
 449         drm_dbg_dp(panel->drm_dev, "updated bpp = %d\n",
 450                                 dp_panel->dp_mode.bpp);
 451
 452         return 0;
 453 }
 454
 455 struct dp_panel *dp_panel_get(struct dp_panel_in *in)
 456 {
 457         struct dp_panel_private *panel;
 458         struct dp_panel *dp_panel;
 459
 460         if (!in->dev || !in->catalog || !in->aux || !in->link) {
 461                 DRM_ERROR("invalid input\n");
 462                 return ERR_PTR(-EINVAL);
 463         }
 464
 465         panel = devm_kzalloc(in->dev, sizeof(*panel), GFP_KERNEL);
 466         if (!panel)
 467                 return ERR_PTR(-ENOMEM);
 468
 469         panel->dev = in->dev;
 470         panel->aux = in->aux;
 471         panel->catalog = in->catalog;
 472         panel->link = in->link;
 473
 474         dp_panel = &panel->dp_panel;
 475         dp_panel->max_bw_code = DP_LINK_BW_8_1;
 476         panel->aux_cfg_update_done = false;
 477
 478         return dp_panel;
 479 }
 480
 481 void dp_panel_put(struct dp_panel *dp_panel)
 482 {
 483         if (!dp_panel)
 484                 return;
 485
 486         kfree(dp_panel->edid);
 487 }