1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
6 #include <linux/delay.h>
7 #include <drm/drm_print.h>
18 DP_AUX_ERR_NACK_DEFER,
22 struct dp_aux_private {
24 struct dp_catalog *catalog;
27 struct completion comp;
29 enum msm_dp_aux_err aux_error_num;
41 struct drm_dp_aux dp_aux;
44 #define MAX_AUX_RETRIES 5
46 static ssize_t dp_aux_write(struct dp_aux_private *aux,
47 struct drm_dp_aux_msg *msg)
52 u8 *msgdata = msg->buffer;
53 int const AUX_CMD_FIFO_LEN = 128;
62 * cmd fifo only has depth of 144 bytes
63 * limit buf length to 128 bytes here
65 if (len > AUX_CMD_FIFO_LEN - 4) {
66 DRM_ERROR("buf size greater than allowed size of 128 bytes\n");
70 /* Pack cmd and write to HW */
71 data[0] = (msg->address >> 16) & 0xf; /* addr[19:16] */
73 data[0] |= BIT(4); /* R/W */
75 data[1] = msg->address >> 8; /* addr[15:8] */
76 data[2] = msg->address; /* addr[7:0] */
77 data[3] = msg->size - 1; /* len[7:0] */
79 for (i = 0; i < len + 4; i++) {
80 reg = (i < 4) ? data[i] : msgdata[i - 4];
81 reg <<= DP_AUX_DATA_OFFSET;
82 reg &= DP_AUX_DATA_MASK;
83 reg |= DP_AUX_DATA_WRITE;
84 /* index = 0, write */
86 reg |= DP_AUX_DATA_INDEX_WRITE;
87 aux->catalog->aux_data = reg;
88 dp_catalog_aux_write_data(aux->catalog);
91 dp_catalog_aux_clear_trans(aux->catalog, false);
92 dp_catalog_aux_clear_hw_interrupts(aux->catalog);
94 reg = 0; /* Transaction number == 1 */
95 if (!aux->native) { /* i2c */
96 reg |= DP_AUX_TRANS_CTRL_I2C;
98 if (aux->no_send_addr)
99 reg |= DP_AUX_TRANS_CTRL_NO_SEND_ADDR;
101 if (aux->no_send_stop)
102 reg |= DP_AUX_TRANS_CTRL_NO_SEND_STOP;
105 reg |= DP_AUX_TRANS_CTRL_GO;
106 aux->catalog->aux_data = reg;
107 dp_catalog_aux_write_trans(aux->catalog);
112 static ssize_t dp_aux_cmd_fifo_tx(struct dp_aux_private *aux,
113 struct drm_dp_aux_msg *msg)
116 unsigned long time_left;
118 reinit_completion(&aux->comp);
120 ret = dp_aux_write(aux, msg);
124 time_left = wait_for_completion_timeout(&aux->comp,
125 msecs_to_jiffies(250));
132 static ssize_t dp_aux_cmd_fifo_rx(struct dp_aux_private *aux,
133 struct drm_dp_aux_msg *msg)
140 dp_catalog_aux_clear_trans(aux->catalog, true);
142 data = DP_AUX_DATA_INDEX_WRITE; /* INDEX_WRITE */
143 data |= DP_AUX_DATA_READ; /* read */
145 aux->catalog->aux_data = data;
146 dp_catalog_aux_write_data(aux->catalog);
150 /* discard first byte */
151 data = dp_catalog_aux_read_data(aux->catalog);
153 for (i = 0; i < len; i++) {
154 data = dp_catalog_aux_read_data(aux->catalog);
155 *dp++ = (u8)((data >> DP_AUX_DATA_OFFSET) & 0xff);
157 actual_i = (data >> DP_AUX_DATA_INDEX_OFFSET) & 0xFF;
165 static void dp_aux_update_offset_and_segment(struct dp_aux_private *aux,
166 struct drm_dp_aux_msg *input_msg)
168 u32 edid_address = 0x50;
169 u32 segment_address = 0x30;
170 bool i2c_read = input_msg->request &
171 (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ);
174 if (aux->native || i2c_read || ((input_msg->address != edid_address) &&
175 (input_msg->address != segment_address)))
179 data = input_msg->buffer;
180 if (input_msg->address == segment_address)
181 aux->segment = *data;
187 * dp_aux_transfer_helper() - helper function for EDID read transactions
189 * @aux: DP AUX private structure
190 * @input_msg: input message from DRM upstream APIs
191 * @send_seg: send the segment to sink
195 * This helper function is used to fix EDID reads for non-compliant
196 * sinks that do not handle the i2c middle-of-transaction flag correctly.
198 static void dp_aux_transfer_helper(struct dp_aux_private *aux,
199 struct drm_dp_aux_msg *input_msg,
202 struct drm_dp_aux_msg helper_msg;
203 u32 message_size = 0x10;
204 u32 segment_address = 0x30;
205 u32 const edid_block_length = 0x80;
206 bool i2c_mot = input_msg->request & DP_AUX_I2C_MOT;
207 bool i2c_read = input_msg->request &
208 (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ);
210 if (!i2c_mot || !i2c_read || (input_msg->size == 0))
214 * Sending the segment value and EDID offset will be performed
215 * from the DRM upstream EDID driver for each block. Avoid
216 * duplicate AUX transactions related to this while reading the
217 * first 16 bytes of each block.
219 if (!(aux->offset % edid_block_length) || !send_seg)
223 aux->cmd_busy = true;
224 aux->no_send_addr = true;
225 aux->no_send_stop = true;
228 * Send the segment address for every i2c read in which the
229 * middle-of-tranaction flag is set. This is required to support EDID
230 * reads of more than 2 blocks as the segment address is reset to 0
231 * since we are overriding the middle-of-transaction flag for read
236 memset(&helper_msg, 0, sizeof(helper_msg));
237 helper_msg.address = segment_address;
238 helper_msg.buffer = &aux->segment;
240 dp_aux_cmd_fifo_tx(aux, &helper_msg);
244 * Send the offset address for every i2c read in which the
245 * middle-of-transaction flag is set. This will ensure that the sink
246 * will update its read pointer and return the correct portion of the
247 * EDID buffer in the subsequent i2c read trasntion triggered in the
248 * native AUX transfer function.
250 memset(&helper_msg, 0, sizeof(helper_msg));
251 helper_msg.address = input_msg->address;
252 helper_msg.buffer = &aux->offset;
254 dp_aux_cmd_fifo_tx(aux, &helper_msg);
257 aux->offset += message_size;
258 if (aux->offset == 0x80 || aux->offset == 0x100)
259 aux->segment = 0x0; /* reset segment at end of block */
263 * This function does the real job to process an AUX transaction.
264 * It will call aux_reset() function to reset the AUX channel,
265 * if the waiting is timeout.
267 static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
268 struct drm_dp_aux_msg *msg)
271 int const aux_cmd_native_max = 16;
272 int const aux_cmd_i2c_max = 128;
273 struct dp_aux_private *aux;
275 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
277 aux->native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ);
279 /* Ignore address only message */
280 if (msg->size == 0 || !msg->buffer) {
281 msg->reply = aux->native ?
282 DP_AUX_NATIVE_REPLY_ACK : DP_AUX_I2C_REPLY_ACK;
286 /* msg sanity check */
287 if ((aux->native && msg->size > aux_cmd_native_max) ||
288 msg->size > aux_cmd_i2c_max) {
289 DRM_ERROR("%s: invalid msg: size(%zu), request(%x)\n",
290 __func__, msg->size, msg->request);
294 mutex_lock(&aux->mutex);
301 * For eDP it's important to give a reasonably long wait here for HPD
302 * to be asserted. This is because the panel driver may have _just_
303 * turned on the panel and then tried to do an AUX transfer. The panel
304 * driver has no way of knowing when the panel is ready, so it's up
305 * to us to wait. For DP we never get into this situation so let's
306 * avoid ever doing the extra long wait for DP.
309 ret = dp_catalog_aux_wait_for_hpd_connect_state(aux->catalog);
311 DRM_DEBUG_DP("Panel not ready for aux transactions\n");
316 dp_aux_update_offset_and_segment(aux, msg);
317 dp_aux_transfer_helper(aux, msg, true);
319 aux->read = msg->request & (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ);
320 aux->cmd_busy = true;
323 aux->no_send_addr = true;
324 aux->no_send_stop = false;
326 aux->no_send_addr = true;
327 aux->no_send_stop = true;
330 ret = dp_aux_cmd_fifo_tx(aux, msg);
334 if (!(aux->retry_cnt % MAX_AUX_RETRIES))
335 dp_catalog_aux_update_cfg(aux->catalog);
337 /* reset aux if link is in connected state */
338 if (dp_catalog_link_is_connected(aux->catalog))
339 dp_catalog_aux_reset(aux->catalog);
342 switch (aux->aux_error_num) {
343 case DP_AUX_ERR_NONE:
345 ret = dp_aux_cmd_fifo_rx(aux, msg);
346 msg->reply = aux->native ? DP_AUX_NATIVE_REPLY_ACK : DP_AUX_I2C_REPLY_ACK;
348 case DP_AUX_ERR_DEFER:
349 msg->reply = aux->native ? DP_AUX_NATIVE_REPLY_DEFER : DP_AUX_I2C_REPLY_DEFER;
352 case DP_AUX_ERR_ADDR:
353 case DP_AUX_ERR_NACK:
354 case DP_AUX_ERR_NACK_DEFER:
355 msg->reply = aux->native ? DP_AUX_NATIVE_REPLY_NACK : DP_AUX_I2C_REPLY_NACK;
357 case DP_AUX_ERR_TOUT:
363 aux->cmd_busy = false;
366 mutex_unlock(&aux->mutex);
371 irqreturn_t dp_aux_isr(struct drm_dp_aux *dp_aux)
374 struct dp_aux_private *aux;
377 DRM_ERROR("invalid input\n");
381 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
383 isr = dp_catalog_aux_get_irq(aux->catalog);
385 /* no interrupts pending, return immediately */
389 if (!aux->cmd_busy) {
390 DRM_ERROR("Unexpected DP AUX IRQ %#010x when not busy\n", isr);
395 * The logic below assumes only one error bit is set (other than "done"
396 * which can apparently be set at the same time as some of the other
397 * bits). Warn if more than one get set so we know we need to improve
400 if (hweight32(isr & ~DP_INTR_AUX_XFER_DONE) > 1)
401 DRM_WARN("Some DP AUX interrupts unhandled: %#010x\n", isr);
403 if (isr & DP_INTR_AUX_ERROR) {
404 aux->aux_error_num = DP_AUX_ERR_PHY;
405 dp_catalog_aux_clear_hw_interrupts(aux->catalog);
406 } else if (isr & DP_INTR_NACK_DEFER) {
407 aux->aux_error_num = DP_AUX_ERR_NACK_DEFER;
408 } else if (isr & DP_INTR_WRONG_ADDR) {
409 aux->aux_error_num = DP_AUX_ERR_ADDR;
410 } else if (isr & DP_INTR_TIMEOUT) {
411 aux->aux_error_num = DP_AUX_ERR_TOUT;
412 } else if (!aux->native && (isr & DP_INTR_I2C_NACK)) {
413 aux->aux_error_num = DP_AUX_ERR_NACK;
414 } else if (!aux->native && (isr & DP_INTR_I2C_DEFER)) {
415 if (isr & DP_INTR_AUX_XFER_DONE)
416 aux->aux_error_num = DP_AUX_ERR_NACK;
418 aux->aux_error_num = DP_AUX_ERR_DEFER;
419 } else if (isr & DP_INTR_AUX_XFER_DONE) {
420 aux->aux_error_num = DP_AUX_ERR_NONE;
422 DRM_WARN("Unexpected interrupt: %#010x\n", isr);
426 complete(&aux->comp);
431 void dp_aux_reconfig(struct drm_dp_aux *dp_aux)
433 struct dp_aux_private *aux;
435 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
437 dp_catalog_aux_update_cfg(aux->catalog);
438 dp_catalog_aux_reset(aux->catalog);
441 void dp_aux_init(struct drm_dp_aux *dp_aux)
443 struct dp_aux_private *aux;
446 DRM_ERROR("invalid input\n");
450 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
452 mutex_lock(&aux->mutex);
454 dp_catalog_aux_enable(aux->catalog, true);
458 mutex_unlock(&aux->mutex);
461 void dp_aux_deinit(struct drm_dp_aux *dp_aux)
463 struct dp_aux_private *aux;
465 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
467 mutex_lock(&aux->mutex);
469 aux->initted = false;
470 dp_catalog_aux_enable(aux->catalog, false);
472 mutex_unlock(&aux->mutex);
475 int dp_aux_register(struct drm_dp_aux *dp_aux)
477 struct dp_aux_private *aux;
481 DRM_ERROR("invalid input\n");
485 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
487 aux->dp_aux.name = "dpu_dp_aux";
488 aux->dp_aux.dev = aux->dev;
489 aux->dp_aux.transfer = dp_aux_transfer;
490 ret = drm_dp_aux_register(&aux->dp_aux);
492 DRM_ERROR("%s: failed to register drm aux: %d\n", __func__,
500 void dp_aux_unregister(struct drm_dp_aux *dp_aux)
502 drm_dp_aux_unregister(dp_aux);
505 struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catalog,
508 struct dp_aux_private *aux;
511 DRM_ERROR("invalid input\n");
512 return ERR_PTR(-ENODEV);
515 aux = devm_kzalloc(dev, sizeof(*aux), GFP_KERNEL);
517 return ERR_PTR(-ENOMEM);
519 init_completion(&aux->comp);
520 aux->cmd_busy = false;
521 aux->is_edp = is_edp;
522 mutex_init(&aux->mutex);
525 aux->catalog = catalog;
531 void dp_aux_put(struct drm_dp_aux *dp_aux)
533 struct dp_aux_private *aux;
538 aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
540 mutex_destroy(&aux->mutex);
542 devm_kfree(aux->dev, aux);