1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
9 #include <linux/list.h>
12 #include "dpu_hw_top.h"
14 struct dpu_global_state;
17 * struct dpu_rm - DPU dynamic hardware resource manager
18 * @pingpong_blks: array of pingpong hardware resources
19 * @mixer_blks: array of layer mixer hardware resources
20 * @ctl_blks: array of ctl hardware resources
21 * @hw_intf: array of intf hardware resources
22 * @hw_wb: array of wb hardware resources
23 * @dspp_blks: array of dspp hardware resources
24 * @hw_sspp: array of sspp hardware resources
27 struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0];
28 struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0];
29 struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0];
30 struct dpu_hw_intf *hw_intf[INTF_MAX - INTF_0];
31 struct dpu_hw_wb *hw_wb[WB_MAX - WB_0];
32 struct dpu_hw_blk *dspp_blks[DSPP_MAX - DSPP_0];
33 struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0];
34 struct dpu_hw_blk *dsc_blks[DSC_MAX - DSC_0];
35 struct dpu_hw_sspp *hw_sspp[SSPP_MAX - SSPP_NONE];
39 * dpu_rm_init - Read hardware catalog and create reservation tracking objects
41 * @rm: DPU Resource Manager handle
42 * @cat: Pointer to hardware catalog
43 * @mmio: mapped register io address of MDP
44 * @Return: 0 on Success otherwise -ERROR
46 int dpu_rm_init(struct dpu_rm *rm,
47 const struct dpu_mdss_cfg *cat,
51 * dpu_rm_destroy - Free all memory allocated by dpu_rm_init
52 * @rm: DPU Resource Manager handle
53 * @Return: 0 on Success otherwise -ERROR
55 int dpu_rm_destroy(struct dpu_rm *rm);
58 * dpu_rm_reserve - Given a CRTC->Encoder->Connector display chain, analyze
59 * the use connections and user requirements, specified through related
60 * topology control properties, and reserve hardware blocks to that
62 * HW blocks can then be accessed through dpu_rm_get_* functions.
63 * HW Reservations should be released via dpu_rm_release_hw.
64 * @rm: DPU Resource Manager handle
65 * @drm_enc: DRM Encoder handle
66 * @crtc_state: Proposed Atomic DRM CRTC State handle
67 * @topology: Pointer to topology info for the display
68 * @Return: 0 on Success otherwise -ERROR
70 int dpu_rm_reserve(struct dpu_rm *rm,
71 struct dpu_global_state *global_state,
72 struct drm_encoder *drm_enc,
73 struct drm_crtc_state *crtc_state,
74 struct msm_display_topology topology);
77 * dpu_rm_reserve - Given the encoder for the display chain, release any
78 * HW blocks previously reserved for that use case.
79 * @rm: DPU Resource Manager handle
80 * @enc: DRM Encoder handle
81 * @Return: 0 on Success otherwise -ERROR
83 void dpu_rm_release(struct dpu_global_state *global_state,
84 struct drm_encoder *enc);
87 * Get hw resources of the given type that are assigned to this encoder.
89 int dpu_rm_get_assigned_resources(struct dpu_rm *rm,
90 struct dpu_global_state *global_state, uint32_t enc_id,
91 enum dpu_hw_blk_type type, struct dpu_hw_blk **blks, int blks_size);
94 * dpu_rm_get_intf - Return a struct dpu_hw_intf instance given it's index.
95 * @rm: DPU Resource Manager handle
96 * @intf_idx: INTF's index
98 static inline struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx)
100 return rm->hw_intf[intf_idx - INTF_0];
104 * dpu_rm_get_wb - Return a struct dpu_hw_wb instance given it's index.
105 * @rm: DPU Resource Manager handle
108 static inline struct dpu_hw_wb *dpu_rm_get_wb(struct dpu_rm *rm, enum dpu_wb wb_idx)
110 return rm->hw_wb[wb_idx - WB_0];
114 * dpu_rm_get_sspp - Return a struct dpu_hw_sspp instance given it's index.
115 * @rm: DPU Resource Manager handle
116 * @sspp_idx: SSPP index
118 static inline struct dpu_hw_sspp *dpu_rm_get_sspp(struct dpu_rm *rm, enum dpu_sspp sspp_idx)
120 return rm->hw_sspp[sspp_idx - SSPP_NONE];
123 #endif /* __DPU_RM_H__ */