1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
8 #include "dpu_hw_catalog.h"
9 #include "dpu_hw_mdss.h"
10 #include "dpu_hw_util.h"
15 * struct traffic_shaper_cfg: traffic shaper configuration
16 * @en : enable/disable traffic shaper
17 * @rd_client : true if read client; false if write client
18 * @client_id : client identifier
19 * @bpc_denom : denominator of byte per clk
20 * @bpc_numer : numerator of byte per clk
22 struct traffic_shaper_cfg {
31 * struct split_pipe_cfg - pipe configuration for dual display panels
32 * @en : Enable/disable dual pipe configuration
33 * @mode : Panel interface mode
34 * @intf : Interface id for main control path
35 * @split_flush_en: Allows both the paths to be flushed when master path is
38 struct split_pipe_cfg {
40 enum dpu_intf_mode mode;
46 * struct dpu_danger_safe_status: danger and safe status signals
47 * @mdp: top level status
48 * @sspp: source pipe status
50 struct dpu_danger_safe_status {
56 * struct dpu_vsync_source_cfg - configure vsync source and configure the
57 * watchdog timers if required.
58 * @pp_count: number of ping pongs active
59 * @frame_rate: Display frame rate
60 * @ppnumber: ping pong index array
61 * @vsync_source: vsync source selection
63 struct dpu_vsync_source_cfg {
66 u32 ppnumber[PINGPONG_MAX];
71 * struct dpu_hw_mdp_ops - interface to the MDP TOP Hw driver functions
72 * Assumption is these functions will be called after clocks are enabled.
73 * @setup_split_pipe : Programs the pipe control registers
74 * @setup_pp_split : Programs the pp split control registers
75 * @setup_traffic_shaper : programs traffic shaper control
77 struct dpu_hw_mdp_ops {
78 /** setup_split_pipe() : Registers are not double buffered, thisk
79 * function should be called before timing control enable
80 * @mdp : mdp top context driver
81 * @cfg : upper and lower part of pipe configuration
83 void (*setup_split_pipe)(struct dpu_hw_mdp *mdp,
84 struct split_pipe_cfg *p);
87 * setup_traffic_shaper() : Setup traffic shaper control
88 * @mdp : mdp top context driver
89 * @cfg : traffic shaper configuration
91 void (*setup_traffic_shaper)(struct dpu_hw_mdp *mdp,
92 struct traffic_shaper_cfg *cfg);
95 * setup_clk_force_ctrl - set clock force control
96 * @mdp: mdp top context driver
97 * @clk_ctrl: clock to be controlled
98 * @enable: force on enable
99 * @return: if the clock is forced-on by this function
101 bool (*setup_clk_force_ctrl)(struct dpu_hw_mdp *mdp,
102 enum dpu_clk_ctrl_type clk_ctrl, bool enable);
105 * get_danger_status - get danger status
106 * @mdp: mdp top context driver
107 * @status: Pointer to danger safe status
109 void (*get_danger_status)(struct dpu_hw_mdp *mdp,
110 struct dpu_danger_safe_status *status);
113 * setup_vsync_source - setup vsync source configuration details
114 * @mdp: mdp top context driver
115 * @cfg: vsync source selection configuration
117 void (*setup_vsync_source)(struct dpu_hw_mdp *mdp,
118 struct dpu_vsync_source_cfg *cfg);
121 * get_safe_status - get safe status
122 * @mdp: mdp top context driver
123 * @status: Pointer to danger safe status
125 void (*get_safe_status)(struct dpu_hw_mdp *mdp,
126 struct dpu_danger_safe_status *status);
129 * intf_audio_select - select the external interface for audio
130 * @mdp: mdp top context driver
132 void (*intf_audio_select)(struct dpu_hw_mdp *mdp);
136 struct dpu_hw_blk base;
137 struct dpu_hw_blk_reg_map hw;
140 const struct dpu_mdp_cfg *caps;
143 struct dpu_hw_mdp_ops ops;
147 * dpu_hw_mdptop_init - initializes the top driver for the passed config
148 * @cfg: MDP TOP configuration from catalog
149 * @addr: Mapped register io address of MDP
150 * @m: Pointer to mdss catalog data
152 struct dpu_hw_mdp *dpu_hw_mdptop_init(const struct dpu_mdp_cfg *cfg,
154 const struct dpu_mdss_cfg *m);
156 void dpu_hw_mdp_destroy(struct dpu_hw_mdp *mdp);
158 #endif /*_DPU_HW_TOP_H */