drm/mediatek: Add mt8186 dpi compatibles and platform data
[platform/kernel/linux-starfive.git] / drivers / gpu / drm / mediatek / mtk_drm_drv.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2015 MediaTek Inc.
4  * Author: YT SHEN <yt.shen@mediatek.com>
5  */
6
7 #include <linux/clk.h>
8 #include <linux/clk-provider.h>
9 #include <linux/component.h>
10 #include <linux/iommu.h>
11 #include <linux/module.h>
12 #include <linux/of_address.h>
13 #include <linux/of_platform.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/dma-mapping.h>
16
17 #include <drm/drm_atomic.h>
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_drv.h>
20 #include <drm/drm_fbdev_generic.h>
21 #include <drm/drm_fourcc.h>
22 #include <drm/drm_gem.h>
23 #include <drm/drm_gem_dma_helper.h>
24 #include <drm/drm_gem_framebuffer_helper.h>
25 #include <drm/drm_of.h>
26 #include <drm/drm_probe_helper.h>
27 #include <drm/drm_vblank.h>
28
29 #include "mtk_drm_crtc.h"
30 #include "mtk_drm_ddp_comp.h"
31 #include "mtk_drm_drv.h"
32 #include "mtk_drm_gem.h"
33
34 #define DRIVER_NAME "mediatek"
35 #define DRIVER_DESC "Mediatek SoC DRM"
36 #define DRIVER_DATE "20150513"
37 #define DRIVER_MAJOR 1
38 #define DRIVER_MINOR 0
39
40 static const struct drm_mode_config_helper_funcs mtk_drm_mode_config_helpers = {
41         .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
42 };
43
44 static struct drm_framebuffer *
45 mtk_drm_mode_fb_create(struct drm_device *dev,
46                        struct drm_file *file,
47                        const struct drm_mode_fb_cmd2 *cmd)
48 {
49         const struct drm_format_info *info = drm_get_format_info(dev, cmd);
50
51         if (info->num_planes != 1)
52                 return ERR_PTR(-EINVAL);
53
54         return drm_gem_fb_create(dev, file, cmd);
55 }
56
57 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
58         .fb_create = mtk_drm_mode_fb_create,
59         .atomic_check = drm_atomic_helper_check,
60         .atomic_commit = drm_atomic_helper_commit,
61 };
62
63 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
64         DDP_COMPONENT_OVL0,
65         DDP_COMPONENT_RDMA0,
66         DDP_COMPONENT_COLOR0,
67         DDP_COMPONENT_BLS,
68         DDP_COMPONENT_DSI0,
69 };
70
71 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
72         DDP_COMPONENT_RDMA1,
73         DDP_COMPONENT_DPI0,
74 };
75
76 static const enum mtk_ddp_comp_id mt7623_mtk_ddp_main[] = {
77         DDP_COMPONENT_OVL0,
78         DDP_COMPONENT_RDMA0,
79         DDP_COMPONENT_COLOR0,
80         DDP_COMPONENT_BLS,
81         DDP_COMPONENT_DPI0,
82 };
83
84 static const enum mtk_ddp_comp_id mt7623_mtk_ddp_ext[] = {
85         DDP_COMPONENT_RDMA1,
86         DDP_COMPONENT_DSI0,
87 };
88
89 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
90         DDP_COMPONENT_OVL0,
91         DDP_COMPONENT_COLOR0,
92         DDP_COMPONENT_AAL0,
93         DDP_COMPONENT_OD0,
94         DDP_COMPONENT_RDMA0,
95         DDP_COMPONENT_DPI0,
96         DDP_COMPONENT_PWM0,
97 };
98
99 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
100         DDP_COMPONENT_OVL1,
101         DDP_COMPONENT_COLOR1,
102         DDP_COMPONENT_AAL1,
103         DDP_COMPONENT_OD1,
104         DDP_COMPONENT_RDMA1,
105         DDP_COMPONENT_DPI1,
106         DDP_COMPONENT_PWM1,
107 };
108
109 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
110         DDP_COMPONENT_RDMA2,
111         DDP_COMPONENT_DSI3,
112         DDP_COMPONENT_PWM2,
113 };
114
115 static enum mtk_ddp_comp_id mt8167_mtk_ddp_main[] = {
116         DDP_COMPONENT_OVL0,
117         DDP_COMPONENT_COLOR0,
118         DDP_COMPONENT_CCORR,
119         DDP_COMPONENT_AAL0,
120         DDP_COMPONENT_GAMMA,
121         DDP_COMPONENT_DITHER0,
122         DDP_COMPONENT_RDMA0,
123         DDP_COMPONENT_DSI0,
124 };
125
126 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
127         DDP_COMPONENT_OVL0,
128         DDP_COMPONENT_COLOR0,
129         DDP_COMPONENT_AAL0,
130         DDP_COMPONENT_OD0,
131         DDP_COMPONENT_RDMA0,
132         DDP_COMPONENT_UFOE,
133         DDP_COMPONENT_DSI0,
134         DDP_COMPONENT_PWM0,
135 };
136
137 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
138         DDP_COMPONENT_OVL1,
139         DDP_COMPONENT_COLOR1,
140         DDP_COMPONENT_GAMMA,
141         DDP_COMPONENT_RDMA1,
142         DDP_COMPONENT_DPI0,
143 };
144
145 static const enum mtk_ddp_comp_id mt8183_mtk_ddp_main[] = {
146         DDP_COMPONENT_OVL0,
147         DDP_COMPONENT_OVL_2L0,
148         DDP_COMPONENT_RDMA0,
149         DDP_COMPONENT_COLOR0,
150         DDP_COMPONENT_CCORR,
151         DDP_COMPONENT_AAL0,
152         DDP_COMPONENT_GAMMA,
153         DDP_COMPONENT_DITHER0,
154         DDP_COMPONENT_DSI0,
155 };
156
157 static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = {
158         DDP_COMPONENT_OVL_2L1,
159         DDP_COMPONENT_RDMA1,
160         DDP_COMPONENT_DPI0,
161 };
162
163 static const enum mtk_ddp_comp_id mt8186_mtk_ddp_main[] = {
164         DDP_COMPONENT_OVL0,
165         DDP_COMPONENT_RDMA0,
166         DDP_COMPONENT_COLOR0,
167         DDP_COMPONENT_CCORR,
168         DDP_COMPONENT_AAL0,
169         DDP_COMPONENT_GAMMA,
170         DDP_COMPONENT_POSTMASK0,
171         DDP_COMPONENT_DITHER0,
172         DDP_COMPONENT_DSI0,
173 };
174
175 static const enum mtk_ddp_comp_id mt8186_mtk_ddp_ext[] = {
176         DDP_COMPONENT_OVL_2L0,
177         DDP_COMPONENT_RDMA1,
178         DDP_COMPONENT_DPI0,
179 };
180
181 static const enum mtk_ddp_comp_id mt8192_mtk_ddp_main[] = {
182         DDP_COMPONENT_OVL0,
183         DDP_COMPONENT_OVL_2L0,
184         DDP_COMPONENT_RDMA0,
185         DDP_COMPONENT_COLOR0,
186         DDP_COMPONENT_CCORR,
187         DDP_COMPONENT_AAL0,
188         DDP_COMPONENT_GAMMA,
189         DDP_COMPONENT_POSTMASK0,
190         DDP_COMPONENT_DITHER0,
191         DDP_COMPONENT_DSI0,
192 };
193
194 static const enum mtk_ddp_comp_id mt8192_mtk_ddp_ext[] = {
195         DDP_COMPONENT_OVL_2L2,
196         DDP_COMPONENT_RDMA4,
197         DDP_COMPONENT_DPI0,
198 };
199
200 static const enum mtk_ddp_comp_id mt8195_mtk_ddp_main[] = {
201         DDP_COMPONENT_OVL0,
202         DDP_COMPONENT_RDMA0,
203         DDP_COMPONENT_COLOR0,
204         DDP_COMPONENT_CCORR,
205         DDP_COMPONENT_AAL0,
206         DDP_COMPONENT_GAMMA,
207         DDP_COMPONENT_DITHER0,
208         DDP_COMPONENT_DSC0,
209         DDP_COMPONENT_MERGE0,
210         DDP_COMPONENT_DP_INTF0,
211 };
212
213 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
214         .main_path = mt2701_mtk_ddp_main,
215         .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
216         .ext_path = mt2701_mtk_ddp_ext,
217         .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext),
218         .shadow_register = true,
219 };
220
221 static const struct mtk_mmsys_match_data mt2701_mmsys_match_data = {
222         .num_drv_data = 1,
223         .drv_data = {
224                 &mt2701_mmsys_driver_data,
225         },
226 };
227
228 static const struct mtk_mmsys_driver_data mt7623_mmsys_driver_data = {
229         .main_path = mt7623_mtk_ddp_main,
230         .main_len = ARRAY_SIZE(mt7623_mtk_ddp_main),
231         .ext_path = mt7623_mtk_ddp_ext,
232         .ext_len = ARRAY_SIZE(mt7623_mtk_ddp_ext),
233         .shadow_register = true,
234 };
235
236 static const struct mtk_mmsys_match_data mt7623_mmsys_match_data = {
237         .num_drv_data = 1,
238         .drv_data = {
239                 &mt7623_mmsys_driver_data,
240         },
241 };
242
243 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
244         .main_path = mt2712_mtk_ddp_main,
245         .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main),
246         .ext_path = mt2712_mtk_ddp_ext,
247         .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext),
248         .third_path = mt2712_mtk_ddp_third,
249         .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third),
250 };
251
252 static const struct mtk_mmsys_match_data mt2712_mmsys_match_data = {
253         .num_drv_data = 1,
254         .drv_data = {
255                 &mt2712_mmsys_driver_data,
256         },
257 };
258
259 static const struct mtk_mmsys_driver_data mt8167_mmsys_driver_data = {
260         .main_path = mt8167_mtk_ddp_main,
261         .main_len = ARRAY_SIZE(mt8167_mtk_ddp_main),
262 };
263
264 static const struct mtk_mmsys_match_data mt8167_mmsys_match_data = {
265         .num_drv_data = 1,
266         .drv_data = {
267                 &mt8167_mmsys_driver_data,
268         },
269 };
270
271 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
272         .main_path = mt8173_mtk_ddp_main,
273         .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
274         .ext_path = mt8173_mtk_ddp_ext,
275         .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
276 };
277
278 static const struct mtk_mmsys_match_data mt8173_mmsys_match_data = {
279         .num_drv_data = 1,
280         .drv_data = {
281                 &mt8173_mmsys_driver_data,
282         },
283 };
284
285 static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
286         .main_path = mt8183_mtk_ddp_main,
287         .main_len = ARRAY_SIZE(mt8183_mtk_ddp_main),
288         .ext_path = mt8183_mtk_ddp_ext,
289         .ext_len = ARRAY_SIZE(mt8183_mtk_ddp_ext),
290 };
291
292 static const struct mtk_mmsys_match_data mt8183_mmsys_match_data = {
293         .num_drv_data = 1,
294         .drv_data = {
295                 &mt8183_mmsys_driver_data,
296         },
297 };
298
299 static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = {
300         .main_path = mt8186_mtk_ddp_main,
301         .main_len = ARRAY_SIZE(mt8186_mtk_ddp_main),
302         .ext_path = mt8186_mtk_ddp_ext,
303         .ext_len = ARRAY_SIZE(mt8186_mtk_ddp_ext),
304 };
305
306 static const struct mtk_mmsys_match_data mt8186_mmsys_match_data = {
307         .num_drv_data = 1,
308         .drv_data = {
309                 &mt8186_mmsys_driver_data,
310         },
311 };
312
313 static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
314         .main_path = mt8192_mtk_ddp_main,
315         .main_len = ARRAY_SIZE(mt8192_mtk_ddp_main),
316         .ext_path = mt8192_mtk_ddp_ext,
317         .ext_len = ARRAY_SIZE(mt8192_mtk_ddp_ext),
318 };
319
320 static const struct mtk_mmsys_match_data mt8192_mmsys_match_data = {
321         .num_drv_data = 1,
322         .drv_data = {
323                 &mt8192_mmsys_driver_data,
324         },
325 };
326
327 static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {
328         .io_start = 0x1c01a000,
329         .main_path = mt8195_mtk_ddp_main,
330         .main_len = ARRAY_SIZE(mt8195_mtk_ddp_main),
331 };
332
333 static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = {
334         .io_start = 0x1c100000,
335 };
336
337 static const struct mtk_mmsys_match_data mt8195_mmsys_match_data = {
338         .num_drv_data = 1,
339         .drv_data = {
340                 &mt8195_vdosys0_driver_data,
341                 &mt8195_vdosys1_driver_data,
342         },
343 };
344
345 static int mtk_drm_kms_init(struct drm_device *drm)
346 {
347         struct mtk_drm_private *private = drm->dev_private;
348         struct platform_device *pdev;
349         struct device_node *np;
350         struct device *dma_dev;
351         int ret;
352
353         if (drm_firmware_drivers_only())
354                 return -ENODEV;
355
356         if (!iommu_present(&platform_bus_type))
357                 return -EPROBE_DEFER;
358
359         pdev = of_find_device_by_node(private->mutex_node);
360         if (!pdev) {
361                 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n",
362                         private->mutex_node);
363                 of_node_put(private->mutex_node);
364                 return -EPROBE_DEFER;
365         }
366         private->mutex_dev = &pdev->dev;
367
368         ret = drmm_mode_config_init(drm);
369         if (ret)
370                 goto put_mutex_dev;
371
372         drm->mode_config.min_width = 64;
373         drm->mode_config.min_height = 64;
374
375         /*
376          * set max width and height as default value(4096x4096).
377          * this value would be used to check framebuffer size limitation
378          * at drm_mode_addfb().
379          */
380         drm->mode_config.max_width = 4096;
381         drm->mode_config.max_height = 4096;
382         drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
383         drm->mode_config.helper_private = &mtk_drm_mode_config_helpers;
384
385         ret = component_bind_all(drm->dev, drm);
386         if (ret)
387                 goto put_mutex_dev;
388
389         /*
390          * Ensure internal panels are at the top of the connector list before
391          * crtc creation.
392          */
393         drm_helper_move_panel_connectors_to_head(drm);
394
395         /*
396          * We currently support two fixed data streams, each optional,
397          * and each statically assigned to a crtc:
398          * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
399          */
400         ret = mtk_drm_crtc_create(drm, private->data->main_path,
401                                   private->data->main_len);
402         if (ret < 0)
403                 goto err_component_unbind;
404         /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
405         ret = mtk_drm_crtc_create(drm, private->data->ext_path,
406                                   private->data->ext_len);
407         if (ret < 0)
408                 goto err_component_unbind;
409
410         ret = mtk_drm_crtc_create(drm, private->data->third_path,
411                                   private->data->third_len);
412         if (ret < 0)
413                 goto err_component_unbind;
414
415         /* Use OVL device for all DMA memory allocations */
416         np = private->comp_node[private->data->main_path[0]] ?:
417              private->comp_node[private->data->ext_path[0]];
418         pdev = of_find_device_by_node(np);
419         if (!pdev) {
420                 ret = -ENODEV;
421                 dev_err(drm->dev, "Need at least one OVL device\n");
422                 goto err_component_unbind;
423         }
424
425         dma_dev = &pdev->dev;
426         private->dma_dev = dma_dev;
427
428         /*
429          * Configure the DMA segment size to make sure we get contiguous IOVA
430          * when importing PRIME buffers.
431          */
432         ret = dma_set_max_seg_size(dma_dev, UINT_MAX);
433         if (ret) {
434                 dev_err(dma_dev, "Failed to set DMA segment size\n");
435                 goto err_component_unbind;
436         }
437
438         ret = drm_vblank_init(drm, MAX_CRTC);
439         if (ret < 0)
440                 goto err_component_unbind;
441
442         drm_kms_helper_poll_init(drm);
443         drm_mode_config_reset(drm);
444
445         return 0;
446
447 err_component_unbind:
448         component_unbind_all(drm->dev, drm);
449 put_mutex_dev:
450         put_device(private->mutex_dev);
451         return ret;
452 }
453
454 static void mtk_drm_kms_deinit(struct drm_device *drm)
455 {
456         drm_kms_helper_poll_fini(drm);
457         drm_atomic_helper_shutdown(drm);
458
459         component_unbind_all(drm->dev, drm);
460 }
461
462 DEFINE_DRM_GEM_FOPS(mtk_drm_fops);
463
464 /*
465  * We need to override this because the device used to import the memory is
466  * not dev->dev, as drm_gem_prime_import() expects.
467  */
468 static struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev,
469                                                        struct dma_buf *dma_buf)
470 {
471         struct mtk_drm_private *private = dev->dev_private;
472
473         return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev);
474 }
475
476 static const struct drm_driver mtk_drm_driver = {
477         .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
478
479         .dumb_create = mtk_drm_gem_dumb_create,
480
481         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
482         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
483         .gem_prime_import = mtk_drm_gem_prime_import,
484         .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
485         .gem_prime_mmap = drm_gem_prime_mmap,
486         .fops = &mtk_drm_fops,
487
488         .name = DRIVER_NAME,
489         .desc = DRIVER_DESC,
490         .date = DRIVER_DATE,
491         .major = DRIVER_MAJOR,
492         .minor = DRIVER_MINOR,
493 };
494
495 static int mtk_drm_bind(struct device *dev)
496 {
497         struct mtk_drm_private *private = dev_get_drvdata(dev);
498         struct drm_device *drm;
499         int ret;
500
501         drm = drm_dev_alloc(&mtk_drm_driver, dev);
502         if (IS_ERR(drm))
503                 return PTR_ERR(drm);
504
505         drm->dev_private = private;
506         private->drm = drm;
507
508         ret = mtk_drm_kms_init(drm);
509         if (ret < 0)
510                 goto err_free;
511
512         ret = drm_dev_register(drm, 0);
513         if (ret < 0)
514                 goto err_deinit;
515
516         drm_fbdev_generic_setup(drm, 32);
517
518         return 0;
519
520 err_deinit:
521         mtk_drm_kms_deinit(drm);
522 err_free:
523         drm_dev_put(drm);
524         return ret;
525 }
526
527 static void mtk_drm_unbind(struct device *dev)
528 {
529         struct mtk_drm_private *private = dev_get_drvdata(dev);
530
531         drm_dev_unregister(private->drm);
532         mtk_drm_kms_deinit(private->drm);
533         drm_dev_put(private->drm);
534         private->num_pipes = 0;
535         private->drm = NULL;
536 }
537
538 static const struct component_master_ops mtk_drm_ops = {
539         .bind           = mtk_drm_bind,
540         .unbind         = mtk_drm_unbind,
541 };
542
543 static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
544         { .compatible = "mediatek,mt8167-disp-aal",
545           .data = (void *)MTK_DISP_AAL},
546         { .compatible = "mediatek,mt8173-disp-aal",
547           .data = (void *)MTK_DISP_AAL},
548         { .compatible = "mediatek,mt8183-disp-aal",
549           .data = (void *)MTK_DISP_AAL},
550         { .compatible = "mediatek,mt8192-disp-aal",
551           .data = (void *)MTK_DISP_AAL},
552         { .compatible = "mediatek,mt8167-disp-ccorr",
553           .data = (void *)MTK_DISP_CCORR },
554         { .compatible = "mediatek,mt8183-disp-ccorr",
555           .data = (void *)MTK_DISP_CCORR },
556         { .compatible = "mediatek,mt8192-disp-ccorr",
557           .data = (void *)MTK_DISP_CCORR },
558         { .compatible = "mediatek,mt2701-disp-color",
559           .data = (void *)MTK_DISP_COLOR },
560         { .compatible = "mediatek,mt8167-disp-color",
561           .data = (void *)MTK_DISP_COLOR },
562         { .compatible = "mediatek,mt8173-disp-color",
563           .data = (void *)MTK_DISP_COLOR },
564         { .compatible = "mediatek,mt8167-disp-dither",
565           .data = (void *)MTK_DISP_DITHER },
566         { .compatible = "mediatek,mt8183-disp-dither",
567           .data = (void *)MTK_DISP_DITHER },
568         { .compatible = "mediatek,mt8195-disp-dsc",
569           .data = (void *)MTK_DISP_DSC },
570         { .compatible = "mediatek,mt8167-disp-gamma",
571           .data = (void *)MTK_DISP_GAMMA, },
572         { .compatible = "mediatek,mt8173-disp-gamma",
573           .data = (void *)MTK_DISP_GAMMA, },
574         { .compatible = "mediatek,mt8183-disp-gamma",
575           .data = (void *)MTK_DISP_GAMMA, },
576         { .compatible = "mediatek,mt8195-disp-merge",
577           .data = (void *)MTK_DISP_MERGE },
578         { .compatible = "mediatek,mt2701-disp-mutex",
579           .data = (void *)MTK_DISP_MUTEX },
580         { .compatible = "mediatek,mt2712-disp-mutex",
581           .data = (void *)MTK_DISP_MUTEX },
582         { .compatible = "mediatek,mt8167-disp-mutex",
583           .data = (void *)MTK_DISP_MUTEX },
584         { .compatible = "mediatek,mt8173-disp-mutex",
585           .data = (void *)MTK_DISP_MUTEX },
586         { .compatible = "mediatek,mt8183-disp-mutex",
587           .data = (void *)MTK_DISP_MUTEX },
588         { .compatible = "mediatek,mt8186-disp-mutex",
589           .data = (void *)MTK_DISP_MUTEX },
590         { .compatible = "mediatek,mt8192-disp-mutex",
591           .data = (void *)MTK_DISP_MUTEX },
592         { .compatible = "mediatek,mt8195-disp-mutex",
593           .data = (void *)MTK_DISP_MUTEX },
594         { .compatible = "mediatek,mt8173-disp-od",
595           .data = (void *)MTK_DISP_OD },
596         { .compatible = "mediatek,mt2701-disp-ovl",
597           .data = (void *)MTK_DISP_OVL },
598         { .compatible = "mediatek,mt8167-disp-ovl",
599           .data = (void *)MTK_DISP_OVL },
600         { .compatible = "mediatek,mt8173-disp-ovl",
601           .data = (void *)MTK_DISP_OVL },
602         { .compatible = "mediatek,mt8183-disp-ovl",
603           .data = (void *)MTK_DISP_OVL },
604         { .compatible = "mediatek,mt8192-disp-ovl",
605           .data = (void *)MTK_DISP_OVL },
606         { .compatible = "mediatek,mt8183-disp-ovl-2l",
607           .data = (void *)MTK_DISP_OVL_2L },
608         { .compatible = "mediatek,mt8192-disp-ovl-2l",
609           .data = (void *)MTK_DISP_OVL_2L },
610         { .compatible = "mediatek,mt8192-disp-postmask",
611           .data = (void *)MTK_DISP_POSTMASK },
612         { .compatible = "mediatek,mt2701-disp-pwm",
613           .data = (void *)MTK_DISP_BLS },
614         { .compatible = "mediatek,mt8167-disp-pwm",
615           .data = (void *)MTK_DISP_PWM },
616         { .compatible = "mediatek,mt8173-disp-pwm",
617           .data = (void *)MTK_DISP_PWM },
618         { .compatible = "mediatek,mt2701-disp-rdma",
619           .data = (void *)MTK_DISP_RDMA },
620         { .compatible = "mediatek,mt8167-disp-rdma",
621           .data = (void *)MTK_DISP_RDMA },
622         { .compatible = "mediatek,mt8173-disp-rdma",
623           .data = (void *)MTK_DISP_RDMA },
624         { .compatible = "mediatek,mt8183-disp-rdma",
625           .data = (void *)MTK_DISP_RDMA },
626         { .compatible = "mediatek,mt8195-disp-rdma",
627           .data = (void *)MTK_DISP_RDMA },
628         { .compatible = "mediatek,mt8173-disp-ufoe",
629           .data = (void *)MTK_DISP_UFOE },
630         { .compatible = "mediatek,mt8173-disp-wdma",
631           .data = (void *)MTK_DISP_WDMA },
632         { .compatible = "mediatek,mt2701-dpi",
633           .data = (void *)MTK_DPI },
634         { .compatible = "mediatek,mt8167-dsi",
635           .data = (void *)MTK_DSI },
636         { .compatible = "mediatek,mt8173-dpi",
637           .data = (void *)MTK_DPI },
638         { .compatible = "mediatek,mt8183-dpi",
639           .data = (void *)MTK_DPI },
640         { .compatible = "mediatek,mt8186-dpi",
641           .data = (void *)MTK_DPI },
642         { .compatible = "mediatek,mt8188-dp-intf",
643           .data = (void *)MTK_DP_INTF },
644         { .compatible = "mediatek,mt8192-dpi",
645           .data = (void *)MTK_DPI },
646         { .compatible = "mediatek,mt8195-dp-intf",
647           .data = (void *)MTK_DP_INTF },
648         { .compatible = "mediatek,mt2701-dsi",
649           .data = (void *)MTK_DSI },
650         { .compatible = "mediatek,mt8173-dsi",
651           .data = (void *)MTK_DSI },
652         { .compatible = "mediatek,mt8183-dsi",
653           .data = (void *)MTK_DSI },
654         { .compatible = "mediatek,mt8186-dsi",
655           .data = (void *)MTK_DSI },
656         { }
657 };
658
659 static const struct of_device_id mtk_drm_of_ids[] = {
660         { .compatible = "mediatek,mt2701-mmsys",
661           .data = &mt2701_mmsys_match_data},
662         { .compatible = "mediatek,mt7623-mmsys",
663           .data = &mt7623_mmsys_match_data},
664         { .compatible = "mediatek,mt2712-mmsys",
665           .data = &mt2712_mmsys_match_data},
666         { .compatible = "mediatek,mt8167-mmsys",
667           .data = &mt8167_mmsys_match_data},
668         { .compatible = "mediatek,mt8173-mmsys",
669           .data = &mt8173_mmsys_match_data},
670         { .compatible = "mediatek,mt8183-mmsys",
671           .data = &mt8183_mmsys_match_data},
672         { .compatible = "mediatek,mt8186-mmsys",
673           .data = &mt8186_mmsys_match_data},
674         { .compatible = "mediatek,mt8192-mmsys",
675           .data = &mt8192_mmsys_match_data},
676         { .compatible = "mediatek,mt8195-mmsys",
677           .data = &mt8195_mmsys_match_data},
678         { }
679 };
680 MODULE_DEVICE_TABLE(of, mtk_drm_of_ids);
681
682 static int mtk_drm_find_match_data(struct device *dev,
683                                    const struct mtk_mmsys_match_data *match_data)
684 {
685         int i;
686         struct platform_device *pdev = of_find_device_by_node(dev->parent->of_node);
687         struct resource *res;
688
689         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
690         if (!res) {
691                 dev_err(dev, "failed to get parent resource\n");
692                 return -EINVAL;
693         }
694
695         for (i = 0; i < match_data->num_drv_data; i++)
696                 if (match_data->drv_data[i]->io_start == res->start)
697                         return i;
698
699         return -EINVAL;
700 }
701
702 static int mtk_drm_probe(struct platform_device *pdev)
703 {
704         struct device *dev = &pdev->dev;
705         struct device_node *phandle = dev->parent->of_node;
706         const struct of_device_id *of_id;
707         const struct mtk_mmsys_match_data *match_data;
708         struct mtk_drm_private *private;
709         struct device_node *node;
710         struct component_match *match = NULL;
711         int ret;
712         int i;
713
714         private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
715         if (!private)
716                 return -ENOMEM;
717
718         private->mmsys_dev = dev->parent;
719         if (!private->mmsys_dev) {
720                 dev_err(dev, "Failed to get MMSYS device\n");
721                 return -ENODEV;
722         }
723
724         of_id = of_match_node(mtk_drm_of_ids, phandle);
725         if (!of_id)
726                 return -ENODEV;
727
728         match_data = of_id->data;
729         if (match_data->num_drv_data > 1) {
730                 /* This SoC has multiple mmsys channels */
731                 ret = mtk_drm_find_match_data(dev, match_data);
732                 if (ret < 0) {
733                         dev_err(dev, "Couldn't get match driver data\n");
734                         return ret;
735                 }
736                 private->data = match_data->drv_data[ret];
737         } else {
738                 dev_dbg(dev, "Using single mmsys channel\n");
739                 private->data = match_data->drv_data[0];
740         }
741
742         /* Iterate over sibling DISP function blocks */
743         for_each_child_of_node(phandle->parent, node) {
744                 const struct of_device_id *of_id;
745                 enum mtk_ddp_comp_type comp_type;
746                 int comp_id;
747
748                 of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
749                 if (!of_id)
750                         continue;
751
752                 if (!of_device_is_available(node)) {
753                         dev_dbg(dev, "Skipping disabled component %pOF\n",
754                                 node);
755                         continue;
756                 }
757
758                 comp_type = (enum mtk_ddp_comp_type)of_id->data;
759
760                 if (comp_type == MTK_DISP_MUTEX) {
761                         private->mutex_node = of_node_get(node);
762                         continue;
763                 }
764
765                 comp_id = mtk_ddp_comp_get_id(node, comp_type);
766                 if (comp_id < 0) {
767                         dev_warn(dev, "Skipping unknown component %pOF\n",
768                                  node);
769                         continue;
770                 }
771
772                 private->comp_node[comp_id] = of_node_get(node);
773
774                 /*
775                  * Currently only the AAL, CCORR, COLOR, GAMMA, MERGE, OVL, RDMA, DSI, and DPI
776                  * blocks have separate component platform drivers and initialize their own
777                  * DDP component structure. The others are initialized here.
778                  */
779                 if (comp_type == MTK_DISP_AAL ||
780                     comp_type == MTK_DISP_CCORR ||
781                     comp_type == MTK_DISP_COLOR ||
782                     comp_type == MTK_DISP_GAMMA ||
783                     comp_type == MTK_DISP_MERGE ||
784                     comp_type == MTK_DISP_OVL ||
785                     comp_type == MTK_DISP_OVL_2L ||
786                     comp_type == MTK_DISP_RDMA ||
787                     comp_type == MTK_DP_INTF ||
788                     comp_type == MTK_DPI ||
789                     comp_type == MTK_DSI) {
790                         dev_info(dev, "Adding component match for %pOF\n",
791                                  node);
792                         drm_of_component_match_add(dev, &match, component_compare_of,
793                                                    node);
794                 }
795
796                 ret = mtk_ddp_comp_init(node, &private->ddp_comp[comp_id], comp_id);
797                 if (ret) {
798                         of_node_put(node);
799                         goto err_node;
800                 }
801         }
802
803         if (!private->mutex_node) {
804                 dev_err(dev, "Failed to find disp-mutex node\n");
805                 ret = -ENODEV;
806                 goto err_node;
807         }
808
809         pm_runtime_enable(dev);
810
811         platform_set_drvdata(pdev, private);
812
813         ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
814         if (ret)
815                 goto err_pm;
816
817         return 0;
818
819 err_pm:
820         pm_runtime_disable(dev);
821 err_node:
822         of_node_put(private->mutex_node);
823         for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
824                 of_node_put(private->comp_node[i]);
825         return ret;
826 }
827
828 static int mtk_drm_remove(struct platform_device *pdev)
829 {
830         struct mtk_drm_private *private = platform_get_drvdata(pdev);
831         int i;
832
833         component_master_del(&pdev->dev, &mtk_drm_ops);
834         pm_runtime_disable(&pdev->dev);
835         of_node_put(private->mutex_node);
836         for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
837                 of_node_put(private->comp_node[i]);
838
839         return 0;
840 }
841
842 static int mtk_drm_sys_prepare(struct device *dev)
843 {
844         struct mtk_drm_private *private = dev_get_drvdata(dev);
845         struct drm_device *drm = private->drm;
846
847         return drm_mode_config_helper_suspend(drm);
848 }
849
850 static void mtk_drm_sys_complete(struct device *dev)
851 {
852         struct mtk_drm_private *private = dev_get_drvdata(dev);
853         struct drm_device *drm = private->drm;
854         int ret;
855
856         ret = drm_mode_config_helper_resume(drm);
857         if (ret)
858                 dev_err(dev, "Failed to resume\n");
859 }
860
861 static const struct dev_pm_ops mtk_drm_pm_ops = {
862         .prepare = mtk_drm_sys_prepare,
863         .complete = mtk_drm_sys_complete,
864 };
865
866 static struct platform_driver mtk_drm_platform_driver = {
867         .probe  = mtk_drm_probe,
868         .remove = mtk_drm_remove,
869         .driver = {
870                 .name   = "mediatek-drm",
871                 .pm     = &mtk_drm_pm_ops,
872         },
873 };
874
875 static struct platform_driver * const mtk_drm_drivers[] = {
876         &mtk_disp_aal_driver,
877         &mtk_disp_ccorr_driver,
878         &mtk_disp_color_driver,
879         &mtk_disp_gamma_driver,
880         &mtk_disp_merge_driver,
881         &mtk_disp_ovl_driver,
882         &mtk_disp_rdma_driver,
883         &mtk_dpi_driver,
884         &mtk_drm_platform_driver,
885         &mtk_dsi_driver,
886         &mtk_mdp_rdma_driver,
887 };
888
889 static int __init mtk_drm_init(void)
890 {
891         return platform_register_drivers(mtk_drm_drivers,
892                                          ARRAY_SIZE(mtk_drm_drivers));
893 }
894
895 static void __exit mtk_drm_exit(void)
896 {
897         platform_unregister_drivers(mtk_drm_drivers,
898                                     ARRAY_SIZE(mtk_drm_drivers));
899 }
900
901 module_init(mtk_drm_init);
902 module_exit(mtk_drm_exit);
903
904 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
905 MODULE_DESCRIPTION("Mediatek SoC DRM driver");
906 MODULE_LICENSE("GPL v2");