drivers/gpu/drm/imx/imx-ldb.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX drm driver - LVDS display bridge
   4  *
   5  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/component.h>
  10 #include <linux/mfd/syscon.h>
  11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  12 #include <linux/module.h>
  13 #include <linux/of_device.h>
  14 #include <linux/of_graph.h>
  15 #include <linux/regmap.h>
  16 #include <linux/videodev2.h>
  17
  18 #include <video/of_display_timing.h>
  19 #include <video/of_videomode.h>
  20
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_bridge.h>
  24 #include <drm/drm_fb_helper.h>
  25 #include <drm/drm_of.h>
  26 #include <drm/drm_panel.h>
  27 #include <drm/drm_print.h>
  28 #include <drm/drm_probe_helper.h>
  29
  30 #include "imx-drm.h"
  31
  32 #define DRIVER_NAME "imx-ldb"
  33
  34 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  35 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  36 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  37 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  38 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  39 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  40 #define LDB_SPLIT_MODE_EN               (1 << 4)
  41 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  42 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  43 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  44 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  45 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  46 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  47 #define LDB_BGREF_RMODE_INT             (1 << 15)
  48
  49 struct imx_ldb;
  50
  51 struct imx_ldb_channel {
  52         struct imx_ldb *ldb;
  53         struct drm_connector connector;
  54         struct drm_encoder encoder;
  55
  56         /* Defines what is connected to the ldb, only one at a time */
  57         struct drm_panel *panel;
  58         struct drm_bridge *bridge;
  59
  60         struct device_node *child;
  61         struct i2c_adapter *ddc;
  62         int chno;
  63         void *edid;
  64         int edid_len;
  65         struct drm_display_mode mode;
  66         int mode_valid;
  67         u32 bus_format;
  68         u32 bus_flags;
  69 };
  70
  71 static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
  72 {
  73         return container_of(c, struct imx_ldb_channel, connector);
  74 }
  75
  76 static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
  77 {
  78         return container_of(e, struct imx_ldb_channel, encoder);
  79 }
  80
  81 struct bus_mux {
  82         int reg;
  83         int shift;
  84         int mask;
  85 };
  86
  87 struct imx_ldb {
  88         struct regmap *regmap;
  89         struct device *dev;
  90         struct imx_ldb_channel channel[2];
  91         struct clk *clk[2]; /* our own clock */
  92         struct clk *clk_sel[4]; /* parent of display clock */
  93         struct clk *clk_parent[4]; /* original parent of clk_sel */
  94         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  95         u32 ldb_ctrl;
  96         const struct bus_mux *lvds_mux;
  97 };
  98
  99 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
 100                                       u32 bus_format)
 101 {
 102         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 103         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 104
 105         switch (bus_format) {
 106         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 107                 break;
 108         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 109                 if (imx_ldb_ch->chno == 0 || dual)
 110                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 111                 if (imx_ldb_ch->chno == 1 || dual)
 112                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 113                 break;
 114         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 115                 if (imx_ldb_ch->chno == 0 || dual)
 116                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 117                                          LDB_BIT_MAP_CH0_JEIDA;
 118                 if (imx_ldb_ch->chno == 1 || dual)
 119                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 120                                          LDB_BIT_MAP_CH1_JEIDA;
 121                 break;
 122         }
 123 }
 124
 125 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
 126 {
 127         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 128         int num_modes;
 129
 130         num_modes = drm_panel_get_modes(imx_ldb_ch->panel);
 131         if (num_modes > 0)
 132                 return num_modes;
 133
 134         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 135                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 136
 137         if (imx_ldb_ch->edid) {
 138                 drm_connector_update_edid_property(connector,
 139                                                         imx_ldb_ch->edid);
 140                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 141         }
 142
 143         if (imx_ldb_ch->mode_valid) {
 144                 struct drm_display_mode *mode;
 145
 146                 mode = drm_mode_create(connector->dev);
 147                 if (!mode)
 148                         return -EINVAL;
 149                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 150                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 151                 drm_mode_probed_add(connector, mode);
 152                 num_modes++;
 153         }
 154
 155         return num_modes;
 156 }
 157
 158 static struct drm_encoder *imx_ldb_connector_best_encoder(
 159                 struct drm_connector *connector)
 160 {
 161         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 162
 163         return &imx_ldb_ch->encoder;
 164 }
 165
 166 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 167                 unsigned long serial_clk, unsigned long di_clk)
 168 {
 169         int ret;
 170
 171         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 172                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 173         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 174
 175         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 176                         clk_get_rate(ldb->clk_pll[chno]));
 177
 178         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 179                         clk_get_rate(ldb->clk[chno]),
 180                         (long int)di_clk);
 181         clk_set_rate(ldb->clk[chno], di_clk);
 182
 183         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 184                         clk_get_rate(ldb->clk[chno]));
 185
 186         /* set display clock mux to LDB input clock */
 187         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 188         if (ret)
 189                 dev_err(ldb->dev,
 190                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 191                         chno);
 192 }
 193
 194 static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
 195 {
 196         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 197         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 198         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 199         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 200
 201         drm_panel_prepare(imx_ldb_ch->panel);
 202
 203         if (dual) {
 204                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
 205                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
 206
 207                 clk_prepare_enable(ldb->clk[0]);
 208                 clk_prepare_enable(ldb->clk[1]);
 209         } else {
 210                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
 211         }
 212
 213         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 214                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 215                 if (mux == 0 || ldb->lvds_mux)
 216                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 217                 else if (mux == 1)
 218                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 219         }
 220         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 221                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 222                 if (mux == 1 || ldb->lvds_mux)
 223                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 224                 else if (mux == 0)
 225                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 226         }
 227
 228         if (ldb->lvds_mux) {
 229                 const struct bus_mux *lvds_mux = NULL;
 230
 231                 if (imx_ldb_ch == &ldb->channel[0])
 232                         lvds_mux = &ldb->lvds_mux[0];
 233                 else if (imx_ldb_ch == &ldb->channel[1])
 234                         lvds_mux = &ldb->lvds_mux[1];
 235
 236                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 237                                    mux << lvds_mux->shift);
 238         }
 239
 240         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 241
 242         drm_panel_enable(imx_ldb_ch->panel);
 243 }
 244
 245 static void
 246 imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
 247                                 struct drm_crtc_state *crtc_state,
 248                                 struct drm_connector_state *connector_state)
 249 {
 250         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 251         struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 252         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 253         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 254         unsigned long serial_clk;
 255         unsigned long di_clk = mode->clock * 1000;
 256         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 257         u32 bus_format = imx_ldb_ch->bus_format;
 258
 259         if (mode->clock > 170000) {
 260                 dev_warn(ldb->dev,
 261                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 262         }
 263         if (mode->clock > 85000 && !dual) {
 264                 dev_warn(ldb->dev,
 265                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 266         }
 267
 268         if (dual) {
 269                 serial_clk = 3500UL * mode->clock;
 270                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 271                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 272         } else {
 273                 serial_clk = 7000UL * mode->clock;
 274                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 275                                   di_clk);
 276         }
 277
 278         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 279         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 280                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 281                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 282                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 283                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 284         }
 285         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 286                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 287                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 288                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 289                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 290         }
 291
 292         if (!bus_format) {
 293                 struct drm_connector *connector = connector_state->connector;
 294                 struct drm_display_info *di = &connector->display_info;
 295
 296                 if (di->num_bus_formats)
 297                         bus_format = di->bus_formats[0];
 298         }
 299         imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
 300 }
 301
 302 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 303 {
 304         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 305         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 306         int mux, ret;
 307
 308         drm_panel_disable(imx_ldb_ch->panel);
 309
 310         if (imx_ldb_ch == &ldb->channel[0])
 311                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 312         else if (imx_ldb_ch == &ldb->channel[1])
 313                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 314
 315         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 316
 317         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 318                 clk_disable_unprepare(ldb->clk[0]);
 319                 clk_disable_unprepare(ldb->clk[1]);
 320         }
 321
 322         if (ldb->lvds_mux) {
 323                 const struct bus_mux *lvds_mux = NULL;
 324
 325                 if (imx_ldb_ch == &ldb->channel[0])
 326                         lvds_mux = &ldb->lvds_mux[0];
 327                 else if (imx_ldb_ch == &ldb->channel[1])
 328                         lvds_mux = &ldb->lvds_mux[1];
 329
 330                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 331                 mux &= lvds_mux->mask;
 332                 mux >>= lvds_mux->shift;
 333         } else {
 334                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 335         }
 336
 337         /* set display clock mux back to original input clock */
 338         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 339         if (ret)
 340                 dev_err(ldb->dev,
 341                         "unable to set di%d parent clock to original parent\n",
 342                         mux);
 343
 344         drm_panel_unprepare(imx_ldb_ch->panel);
 345 }
 346
 347 static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 348                                         struct drm_crtc_state *crtc_state,
 349                                         struct drm_connector_state *conn_state)
 350 {
 351         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
 352         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 353         struct drm_display_info *di = &conn_state->connector->display_info;
 354         u32 bus_format = imx_ldb_ch->bus_format;
 355
 356         /* Bus format description in DT overrides connector display info. */
 357         if (!bus_format && di->num_bus_formats) {
 358                 bus_format = di->bus_formats[0];
 359                 imx_crtc_state->bus_flags = di->bus_flags;
 360         } else {
 361                 bus_format = imx_ldb_ch->bus_format;
 362                 imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
 363         }
 364         switch (bus_format) {
 365         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 366                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 367                 break;
 368         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 369         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 370                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 371                 break;
 372         default:
 373                 return -EINVAL;
 374         }
 375
 376         imx_crtc_state->di_hsync_pin = 2;
 377         imx_crtc_state->di_vsync_pin = 3;
 378
 379         return 0;
 380 }
 381
 382
 383 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 384         .fill_modes = drm_helper_probe_single_connector_modes,
 385         .destroy = imx_drm_connector_destroy,
 386         .reset = drm_atomic_helper_connector_reset,
 387         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 388         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 389 };
 390
 391 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 392         .get_modes = imx_ldb_connector_get_modes,
 393         .best_encoder = imx_ldb_connector_best_encoder,
 394 };
 395
 396 static const struct drm_encoder_funcs imx_ldb_encoder_funcs = {
 397         .destroy = imx_drm_encoder_destroy,
 398 };
 399
 400 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 401         .atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
 402         .enable = imx_ldb_encoder_enable,
 403         .disable = imx_ldb_encoder_disable,
 404         .atomic_check = imx_ldb_encoder_atomic_check,
 405 };
 406
 407 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 408 {
 409         char clkname[16];
 410
 411         snprintf(clkname, sizeof(clkname), "di%d", chno);
 412         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 413         if (IS_ERR(ldb->clk[chno]))
 414                 return PTR_ERR(ldb->clk[chno]);
 415
 416         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 417         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 418
 419         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 420 }
 421
 422 static int imx_ldb_register(struct drm_device *drm,
 423         struct imx_ldb_channel *imx_ldb_ch)
 424 {
 425         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 426         struct drm_encoder *encoder = &imx_ldb_ch->encoder;
 427         int ret;
 428
 429         ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
 430         if (ret)
 431                 return ret;
 432
 433         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 434         if (ret)
 435                 return ret;
 436
 437         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 438                 ret = imx_ldb_get_clk(ldb, 1);
 439                 if (ret)
 440                         return ret;
 441         }
 442
 443         drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
 444         drm_encoder_init(drm, encoder, &imx_ldb_encoder_funcs,
 445                          DRM_MODE_ENCODER_LVDS, NULL);
 446
 447         if (imx_ldb_ch->bridge) {
 448                 ret = drm_bridge_attach(&imx_ldb_ch->encoder,
 449                                         imx_ldb_ch->bridge, NULL);
 450                 if (ret) {
 451                         DRM_ERROR("Failed to initialize bridge with drm\n");
 452                         return ret;
 453                 }
 454         } else {
 455                 /*
 456                  * We want to add the connector whenever there is no bridge
 457                  * that brings its own, not only when there is a panel. For
 458                  * historical reasons, the ldb driver can also work without
 459                  * a panel.
 460                  */
 461                 drm_connector_helper_add(&imx_ldb_ch->connector,
 462                                 &imx_ldb_connector_helper_funcs);
 463                 drm_connector_init_with_ddc(drm, &imx_ldb_ch->connector,
 464                                             &imx_ldb_connector_funcs,
 465                                             DRM_MODE_CONNECTOR_LVDS,
 466                                             imx_ldb_ch->ddc);
 467                 drm_connector_attach_encoder(&imx_ldb_ch->connector, encoder);
 468         }
 469
 470         if (imx_ldb_ch->panel) {
 471                 ret = drm_panel_attach(imx_ldb_ch->panel,
 472                                        &imx_ldb_ch->connector);
 473                 if (ret)
 474                         return ret;
 475         }
 476
 477         return 0;
 478 }
 479
 480 enum {
 481         LVDS_BIT_MAP_SPWG,
 482         LVDS_BIT_MAP_JEIDA
 483 };
 484
 485 struct imx_ldb_bit_mapping {
 486         u32 bus_format;
 487         u32 datawidth;
 488         const char * const mapping;
 489 };
 490
 491 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 492         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 493         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 494         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 495 };
 496
 497 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 498 {
 499         const char *bm;
 500         u32 datawidth = 0;
 501         int ret, i;
 502
 503         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 504         if (ret < 0)
 505                 return ret;
 506
 507         of_property_read_u32(np, "fsl,data-width", &datawidth);
 508
 509         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 510                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 511                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 512                         return imx_ldb_bit_mappings[i].bus_format;
 513         }
 514
 515         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 516
 517         return -ENOENT;
 518 }
 519
 520 static struct bus_mux imx6q_lvds_mux[2] = {
 521         {
 522                 .reg = IOMUXC_GPR3,
 523                 .shift = 6,
 524                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 525         }, {
 526                 .reg = IOMUXC_GPR3,
 527                 .shift = 8,
 528                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 529         }
 530 };
 531
 532 /*
 533  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 534  * of_match_device will walk through this list and take the first entry
 535  * matching any of its compatible values. Therefore, the more generic
 536  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 537  */
 538 static const struct of_device_id imx_ldb_dt_ids[] = {
 539         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 540         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 541         { }
 542 };
 543 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 544
 545 static int imx_ldb_panel_ddc(struct device *dev,
 546                 struct imx_ldb_channel *channel, struct device_node *child)
 547 {
 548         struct device_node *ddc_node;
 549         const u8 *edidp;
 550         int ret;
 551
 552         ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 553         if (ddc_node) {
 554                 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 555                 of_node_put(ddc_node);
 556                 if (!channel->ddc) {
 557                         dev_warn(dev, "failed to get ddc i2c adapter\n");
 558                         return -EPROBE_DEFER;
 559                 }
 560         }
 561
 562         if (!channel->ddc) {
 563                 /* if no DDC available, fallback to hardcoded EDID */
 564                 dev_dbg(dev, "no ddc available\n");
 565
 566                 edidp = of_get_property(child, "edid",
 567                                         &channel->edid_len);
 568                 if (edidp) {
 569                         channel->edid = kmemdup(edidp,
 570                                                 channel->edid_len,
 571                                                 GFP_KERNEL);
 572                 } else if (!channel->panel) {
 573                         /* fallback to display-timings node */
 574                         ret = of_get_drm_display_mode(child,
 575                                                       &channel->mode,
 576                                                       &channel->bus_flags,
 577                                                       OF_USE_NATIVE_MODE);
 578                         if (!ret)
 579                                 channel->mode_valid = 1;
 580                 }
 581         }
 582         return 0;
 583 }
 584
 585 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 586 {
 587         struct drm_device *drm = data;
 588         struct device_node *np = dev->of_node;
 589         const struct of_device_id *of_id =
 590                         of_match_device(imx_ldb_dt_ids, dev);
 591         struct device_node *child;
 592         struct imx_ldb *imx_ldb;
 593         int dual;
 594         int ret;
 595         int i;
 596
 597         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 598         if (!imx_ldb)
 599                 return -ENOMEM;
 600
 601         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 602         if (IS_ERR(imx_ldb->regmap)) {
 603                 dev_err(dev, "failed to get parent regmap\n");
 604                 return PTR_ERR(imx_ldb->regmap);
 605         }
 606
 607         /* disable LDB by resetting the control register to POR default */
 608         regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
 609
 610         imx_ldb->dev = dev;
 611
 612         if (of_id)
 613                 imx_ldb->lvds_mux = of_id->data;
 614
 615         dual = of_property_read_bool(np, "fsl,dual-channel");
 616         if (dual)
 617                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 618
 619         /*
 620          * There are three different possible clock mux configurations:
 621          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 622          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 623          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 624          * Map them all to di0_sel...di3_sel.
 625          */
 626         for (i = 0; i < 4; i++) {
 627                 char clkname[16];
 628
 629                 sprintf(clkname, "di%d_sel", i);
 630                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 631                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 632                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 633                         imx_ldb->clk_sel[i] = NULL;
 634                         break;
 635                 }
 636
 637                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 638         }
 639         if (i == 0)
 640                 return ret;
 641
 642         for_each_child_of_node(np, child) {
 643                 struct imx_ldb_channel *channel;
 644                 int bus_format;
 645
 646                 ret = of_property_read_u32(child, "reg", &i);
 647                 if (ret || i < 0 || i > 1) {
 648                         ret = -EINVAL;
 649                         goto free_child;
 650                 }
 651
 652                 if (!of_device_is_available(child))
 653                         continue;
 654
 655                 if (dual && i > 0) {
 656                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 657                         continue;
 658                 }
 659
 660                 channel = &imx_ldb->channel[i];
 661                 channel->ldb = imx_ldb;
 662                 channel->chno = i;
 663
 664                 /*
 665                  * The output port is port@4 with an external 4-port mux or
 666                  * port@2 with the internal 2-port mux.
 667                  */
 668                 ret = drm_of_find_panel_or_bridge(child,
 669                                                   imx_ldb->lvds_mux ? 4 : 2, 0,
 670                                                   &channel->panel, &channel->bridge);
 671                 if (ret && ret != -ENODEV)
 672                         goto free_child;
 673
 674                 /* panel ddc only if there is no bridge */
 675                 if (!channel->bridge) {
 676                         ret = imx_ldb_panel_ddc(dev, channel, child);
 677                         if (ret)
 678                                 goto free_child;
 679                 }
 680
 681                 bus_format = of_get_bus_format(dev, child);
 682                 if (bus_format == -EINVAL) {
 683                         /*
 684                          * If no bus format was specified in the device tree,
 685                          * we can still get it from the connected panel later.
 686                          */
 687                         if (channel->panel && channel->panel->funcs &&
 688                             channel->panel->funcs->get_modes)
 689                                 bus_format = 0;
 690                 }
 691                 if (bus_format < 0) {
 692                         dev_err(dev, "could not determine data mapping: %d\n",
 693                                 bus_format);
 694                         ret = bus_format;
 695                         goto free_child;
 696                 }
 697                 channel->bus_format = bus_format;
 698                 channel->child = child;
 699
 700                 ret = imx_ldb_register(drm, channel);
 701                 if (ret) {
 702                         channel->child = NULL;
 703                         goto free_child;
 704                 }
 705         }
 706
 707         dev_set_drvdata(dev, imx_ldb);
 708
 709         return 0;
 710
 711 free_child:
 712         of_node_put(child);
 713         return ret;
 714 }
 715
 716 static void imx_ldb_unbind(struct device *dev, struct device *master,
 717         void *data)
 718 {
 719         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 720         int i;
 721
 722         for (i = 0; i < 2; i++) {
 723                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 724
 725                 if (channel->panel)
 726                         drm_panel_detach(channel->panel);
 727
 728                 kfree(channel->edid);
 729                 i2c_put_adapter(channel->ddc);
 730         }
 731 }
 732
 733 static const struct component_ops imx_ldb_ops = {
 734         .bind   = imx_ldb_bind,
 735         .unbind = imx_ldb_unbind,
 736 };
 737
 738 static int imx_ldb_probe(struct platform_device *pdev)
 739 {
 740         return component_add(&pdev->dev, &imx_ldb_ops);
 741 }
 742
 743 static int imx_ldb_remove(struct platform_device *pdev)
 744 {
 745         component_del(&pdev->dev, &imx_ldb_ops);
 746         return 0;
 747 }
 748
 749 static struct platform_driver imx_ldb_driver = {
 750         .probe          = imx_ldb_probe,
 751         .remove         = imx_ldb_remove,
 752         .driver         = {
 753                 .of_match_table = imx_ldb_dt_ids,
 754                 .name   = DRIVER_NAME,
 755         },
 756 };
 757
 758 module_platform_driver(imx_ldb_driver);
 759
 760 MODULE_DESCRIPTION("i.MX LVDS driver");
 761 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 762 MODULE_LICENSE("GPL");
 763 MODULE_ALIAS("platform:" DRIVER_NAME);