2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
38 #include "intel_sdvo_regs.h"
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
55 static const char *tv_format_names[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
68 struct intel_encoder base;
70 struct i2c_adapter *i2c;
73 struct i2c_adapter ddc;
75 /* Register for the SDVO device: SDVOB or SDVOC */
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
82 * Capabilities of the SDVO device returned by
83 * intel_sdvo_get_capabilities()
85 struct intel_sdvo_caps caps;
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min, pixel_clock_max;
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
94 uint16_t attached_output;
97 * Hotplug activation bits for this device
99 uint16_t hotplug_active;
102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 uint32_t color_range;
106 bool color_range_auto;
109 * This is set if we're going to treat the device as TV-out.
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
117 /* On different gens SDVOB is at different places. */
120 /* This is for current tv format name */
124 * This is set if we treat the device as HDMI, instead of DVI.
127 bool has_hdmi_monitor;
129 bool rgb_quant_range_selectable;
132 * This is set if we detect output of sdvo device as LVDS and
133 * have a valid fixed mode to use with the panel.
138 * This is sdvo fixed pannel mode pointer
140 struct drm_display_mode *sdvo_lvds_fixed_mode;
142 /* DDC bus used by this SDVO encoder */
146 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
148 uint8_t dtd_sdvo_flags;
151 struct intel_sdvo_connector {
152 struct intel_connector base;
154 /* Mark the type of connector */
155 uint16_t output_flag;
157 enum hdmi_force_audio force_audio;
159 /* This contains all current supported TV format */
160 u8 tv_format_supported[TV_FORMAT_NUM];
161 int format_supported_num;
162 struct drm_property *tv_format;
164 /* add the property for the SDVO-TV */
165 struct drm_property *left;
166 struct drm_property *right;
167 struct drm_property *top;
168 struct drm_property *bottom;
169 struct drm_property *hpos;
170 struct drm_property *vpos;
171 struct drm_property *contrast;
172 struct drm_property *saturation;
173 struct drm_property *hue;
174 struct drm_property *sharpness;
175 struct drm_property *flicker_filter;
176 struct drm_property *flicker_filter_adaptive;
177 struct drm_property *flicker_filter_2d;
178 struct drm_property *tv_chroma_filter;
179 struct drm_property *tv_luma_filter;
180 struct drm_property *dot_crawl;
182 /* add the property for the SDVO-TV/LVDS */
183 struct drm_property *brightness;
185 /* Add variable to record current setting for the above property */
186 u32 left_margin, right_margin, top_margin, bottom_margin;
188 /* this is to get the range of margin.*/
189 u32 max_hscan, max_vscan;
190 u32 max_hpos, cur_hpos;
191 u32 max_vpos, cur_vpos;
192 u32 cur_brightness, max_brightness;
193 u32 cur_contrast, max_contrast;
194 u32 cur_saturation, max_saturation;
195 u32 cur_hue, max_hue;
196 u32 cur_sharpness, max_sharpness;
197 u32 cur_flicker_filter, max_flicker_filter;
198 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
199 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
200 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
201 u32 cur_tv_luma_filter, max_tv_luma_filter;
202 u32 cur_dot_crawl, max_dot_crawl;
205 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
207 return container_of(encoder, struct intel_sdvo, base);
210 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
212 return to_sdvo(intel_attached_encoder(connector));
215 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
217 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
221 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
223 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
224 struct intel_sdvo_connector *intel_sdvo_connector,
227 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
228 struct intel_sdvo_connector *intel_sdvo_connector);
231 * Writes the SDVOB or SDVOC with the given value, but always writes both
232 * SDVOB and SDVOC to work around apparent hardware issues (according to
233 * comments in the BIOS).
235 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
237 struct drm_device *dev = intel_sdvo->base.base.dev;
238 struct drm_i915_private *dev_priv = dev->dev_private;
239 u32 bval = val, cval = val;
242 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
243 I915_WRITE(intel_sdvo->sdvo_reg, val);
244 I915_READ(intel_sdvo->sdvo_reg);
248 if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
249 cval = I915_READ(GEN3_SDVOC);
251 bval = I915_READ(GEN3_SDVOB);
254 * Write the registers twice for luck. Sometimes,
255 * writing them only once doesn't appear to 'stick'.
256 * The BIOS does this too. Yay, magic
258 for (i = 0; i < 2; i++)
260 I915_WRITE(GEN3_SDVOB, bval);
261 I915_READ(GEN3_SDVOB);
262 I915_WRITE(GEN3_SDVOC, cval);
263 I915_READ(GEN3_SDVOC);
267 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
269 struct i2c_msg msgs[] = {
271 .addr = intel_sdvo->slave_addr,
277 .addr = intel_sdvo->slave_addr,
285 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
288 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
292 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
293 /** Mapping of command numbers to names, for debug output */
294 static const struct _sdvo_cmd_name {
297 } sdvo_cmd_names[] = {
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
342 /* Add the op code for SDVO enhancements */
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
411 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
413 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
414 const void *args, int args_len)
418 char buffer[BUF_LEN];
420 #define BUF_PRINT(args...) \
421 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
424 for (i = 0; i < args_len; i++) {
425 BUF_PRINT("%02X ", ((u8 *)args)[i]);
430 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
431 if (cmd == sdvo_cmd_names[i].cmd) {
432 BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
436 if (i == ARRAY_SIZE(sdvo_cmd_names)) {
437 BUF_PRINT("(%02X)", cmd);
439 BUG_ON(pos >= BUF_LEN - 1);
443 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
446 static const char *cmd_status_names[] = {
452 "Target not specified",
453 "Scaling not supported"
456 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
457 const void *args, int args_len)
460 struct i2c_msg *msgs;
463 /* Would be simpler to allocate both in one go ? */
464 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
468 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
474 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
476 for (i = 0; i < args_len; i++) {
477 msgs[i].addr = intel_sdvo->slave_addr;
480 msgs[i].buf = buf + 2 *i;
481 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
482 buf[2*i + 1] = ((u8*)args)[i];
484 msgs[i].addr = intel_sdvo->slave_addr;
487 msgs[i].buf = buf + 2*i;
488 buf[2*i + 0] = SDVO_I2C_OPCODE;
491 /* the following two are to read the response */
492 status = SDVO_I2C_CMD_STATUS;
493 msgs[i+1].addr = intel_sdvo->slave_addr;
496 msgs[i+1].buf = &status;
498 msgs[i+2].addr = intel_sdvo->slave_addr;
499 msgs[i+2].flags = I2C_M_RD;
501 msgs[i+2].buf = &status;
503 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
505 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
510 /* failure in I2C transfer */
511 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
521 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
522 void *response, int response_len)
524 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
528 char buffer[BUF_LEN];
532 * The documentation states that all commands will be
533 * processed within 15µs, and that we need only poll
534 * the status byte a maximum of 3 times in order for the
535 * command to be complete.
537 * Check 5 times in case the hardware failed to read the docs.
539 * Also beware that the first response by many devices is to
540 * reply PENDING and stall for time. TVs are notorious for
541 * requiring longer than specified to complete their replies.
542 * Originally (in the DDX long ago), the delay was only ever 15ms
543 * with an additional delay of 30ms applied for TVs added later after
544 * many experiments. To accommodate both sets of delays, we do a
545 * sequence of slow checks if the device is falling behind and fails
546 * to reply within 5*15µs.
548 if (!intel_sdvo_read_byte(intel_sdvo,
553 while ((status == SDVO_CMD_STATUS_PENDING ||
554 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
560 if (!intel_sdvo_read_byte(intel_sdvo,
566 #define BUF_PRINT(args...) \
567 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
569 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
570 BUF_PRINT("(%s)", cmd_status_names[status]);
572 BUF_PRINT("(??? %d)", status);
574 if (status != SDVO_CMD_STATUS_SUCCESS)
577 /* Read the command response */
578 for (i = 0; i < response_len; i++) {
579 if (!intel_sdvo_read_byte(intel_sdvo,
580 SDVO_I2C_RETURN_0 + i,
581 &((u8 *)response)[i]))
583 BUF_PRINT(" %02X", ((u8 *)response)[i]);
585 BUG_ON(pos >= BUF_LEN - 1);
589 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
593 DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
597 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
599 if (mode->clock >= 100000)
601 else if (mode->clock >= 50000)
607 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
610 /* This must be the immediately preceding write before the i2c xfer */
611 return intel_sdvo_write_cmd(intel_sdvo,
612 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
616 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
618 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
621 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
625 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
627 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
630 return intel_sdvo_read_response(intel_sdvo, value, len);
633 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
635 struct intel_sdvo_set_target_input_args targets = {0};
636 return intel_sdvo_set_value(intel_sdvo,
637 SDVO_CMD_SET_TARGET_INPUT,
638 &targets, sizeof(targets));
642 * Return whether each input is trained.
644 * This function is making an assumption about the layout of the response,
645 * which should be checked against the docs.
647 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
649 struct intel_sdvo_get_trained_inputs_response response;
651 BUILD_BUG_ON(sizeof(response) != 1);
652 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
653 &response, sizeof(response)))
656 *input_1 = response.input0_trained;
657 *input_2 = response.input1_trained;
661 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
664 return intel_sdvo_set_value(intel_sdvo,
665 SDVO_CMD_SET_ACTIVE_OUTPUTS,
666 &outputs, sizeof(outputs));
669 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
672 return intel_sdvo_get_value(intel_sdvo,
673 SDVO_CMD_GET_ACTIVE_OUTPUTS,
674 outputs, sizeof(*outputs));
677 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
680 u8 state = SDVO_ENCODER_STATE_ON;
683 case DRM_MODE_DPMS_ON:
684 state = SDVO_ENCODER_STATE_ON;
686 case DRM_MODE_DPMS_STANDBY:
687 state = SDVO_ENCODER_STATE_STANDBY;
689 case DRM_MODE_DPMS_SUSPEND:
690 state = SDVO_ENCODER_STATE_SUSPEND;
692 case DRM_MODE_DPMS_OFF:
693 state = SDVO_ENCODER_STATE_OFF;
697 return intel_sdvo_set_value(intel_sdvo,
698 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
701 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
705 struct intel_sdvo_pixel_clock_range clocks;
707 BUILD_BUG_ON(sizeof(clocks) != 4);
708 if (!intel_sdvo_get_value(intel_sdvo,
709 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
710 &clocks, sizeof(clocks)))
713 /* Convert the values from units of 10 kHz to kHz. */
714 *clock_min = clocks.min * 10;
715 *clock_max = clocks.max * 10;
719 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
722 return intel_sdvo_set_value(intel_sdvo,
723 SDVO_CMD_SET_TARGET_OUTPUT,
724 &outputs, sizeof(outputs));
727 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
728 struct intel_sdvo_dtd *dtd)
730 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
731 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
734 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
735 struct intel_sdvo_dtd *dtd)
737 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
738 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
741 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
742 struct intel_sdvo_dtd *dtd)
744 return intel_sdvo_set_timing(intel_sdvo,
745 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
748 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
749 struct intel_sdvo_dtd *dtd)
751 return intel_sdvo_set_timing(intel_sdvo,
752 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
755 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
756 struct intel_sdvo_dtd *dtd)
758 return intel_sdvo_get_timing(intel_sdvo,
759 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
763 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
768 struct intel_sdvo_preferred_input_timing_args args;
770 memset(&args, 0, sizeof(args));
773 args.height = height;
776 if (intel_sdvo->is_lvds &&
777 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
778 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
781 return intel_sdvo_set_value(intel_sdvo,
782 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
783 &args, sizeof(args));
786 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
787 struct intel_sdvo_dtd *dtd)
789 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
790 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
791 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
792 &dtd->part1, sizeof(dtd->part1)) &&
793 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
794 &dtd->part2, sizeof(dtd->part2));
797 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
799 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
802 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
803 const struct drm_display_mode *mode)
805 uint16_t width, height;
806 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
807 uint16_t h_sync_offset, v_sync_offset;
810 memset(dtd, 0, sizeof(*dtd));
812 width = mode->hdisplay;
813 height = mode->vdisplay;
815 /* do some mode translations */
816 h_blank_len = mode->htotal - mode->hdisplay;
817 h_sync_len = mode->hsync_end - mode->hsync_start;
819 v_blank_len = mode->vtotal - mode->vdisplay;
820 v_sync_len = mode->vsync_end - mode->vsync_start;
822 h_sync_offset = mode->hsync_start - mode->hdisplay;
823 v_sync_offset = mode->vsync_start - mode->vdisplay;
825 mode_clock = mode->clock;
827 dtd->part1.clock = mode_clock;
829 dtd->part1.h_active = width & 0xff;
830 dtd->part1.h_blank = h_blank_len & 0xff;
831 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
832 ((h_blank_len >> 8) & 0xf);
833 dtd->part1.v_active = height & 0xff;
834 dtd->part1.v_blank = v_blank_len & 0xff;
835 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
836 ((v_blank_len >> 8) & 0xf);
838 dtd->part2.h_sync_off = h_sync_offset & 0xff;
839 dtd->part2.h_sync_width = h_sync_len & 0xff;
840 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
842 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
843 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
844 ((v_sync_len & 0x30) >> 4);
846 dtd->part2.dtd_flags = 0x18;
847 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
848 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
849 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
850 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
851 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
852 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
854 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
857 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
858 const struct intel_sdvo_dtd *dtd)
860 struct drm_display_mode mode = {};
862 mode.hdisplay = dtd->part1.h_active;
863 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
864 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
865 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
866 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
867 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
868 mode.htotal = mode.hdisplay + dtd->part1.h_blank;
869 mode.htotal += (dtd->part1.h_high & 0xf) << 8;
871 mode.vdisplay = dtd->part1.v_active;
872 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
873 mode.vsync_start = mode.vdisplay;
874 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
875 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
876 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
877 mode.vsync_end = mode.vsync_start +
878 (dtd->part2.v_sync_off_width & 0xf);
879 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
880 mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
881 mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
883 mode.clock = dtd->part1.clock * 10;
885 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
886 mode.flags |= DRM_MODE_FLAG_INTERLACE;
887 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
888 mode.flags |= DRM_MODE_FLAG_PHSYNC;
890 mode.flags |= DRM_MODE_FLAG_NHSYNC;
891 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
892 mode.flags |= DRM_MODE_FLAG_PVSYNC;
894 mode.flags |= DRM_MODE_FLAG_NVSYNC;
896 drm_mode_set_crtcinfo(&mode, 0);
898 drm_mode_copy(pmode, &mode);
901 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
903 struct intel_sdvo_encode encode;
905 BUILD_BUG_ON(sizeof(encode) != 2);
906 return intel_sdvo_get_value(intel_sdvo,
907 SDVO_CMD_GET_SUPP_ENCODE,
908 &encode, sizeof(encode));
911 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
914 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
917 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
920 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
924 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
927 uint8_t set_buf_index[2];
933 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
935 for (i = 0; i <= av_split; i++) {
936 set_buf_index[0] = i; set_buf_index[1] = 0;
937 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
939 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
940 intel_sdvo_read_response(encoder, &buf_size, 1);
943 for (j = 0; j <= buf_size; j += 8) {
944 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
946 intel_sdvo_read_response(encoder, pos, 8);
953 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
954 unsigned if_index, uint8_t tx_rate,
955 const uint8_t *data, unsigned length)
957 uint8_t set_buf_index[2] = { if_index, 0 };
958 uint8_t hbuf_size, tmp[8];
961 if (!intel_sdvo_set_value(intel_sdvo,
962 SDVO_CMD_SET_HBUF_INDEX,
966 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
970 /* Buffer size is 0 based, hooray! */
973 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
974 if_index, length, hbuf_size);
976 for (i = 0; i < hbuf_size; i += 8) {
979 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
981 if (!intel_sdvo_set_value(intel_sdvo,
982 SDVO_CMD_SET_HBUF_DATA,
987 return intel_sdvo_set_value(intel_sdvo,
988 SDVO_CMD_SET_HBUF_TXRATE,
992 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
993 const struct drm_display_mode *adjusted_mode)
995 uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
996 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
997 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
998 union hdmi_infoframe frame;
1002 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1005 DRM_ERROR("couldn't fill AVI infoframe\n");
1009 if (intel_sdvo->rgb_quant_range_selectable) {
1010 if (intel_crtc->config.limited_color_range)
1011 frame.avi.quantization_range =
1012 HDMI_QUANTIZATION_RANGE_LIMITED;
1014 frame.avi.quantization_range =
1015 HDMI_QUANTIZATION_RANGE_FULL;
1018 len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1022 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1024 sdvo_data, sizeof(sdvo_data));
1027 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
1029 struct intel_sdvo_tv_format format;
1030 uint32_t format_map;
1032 format_map = 1 << intel_sdvo->tv_format_index;
1033 memset(&format, 0, sizeof(format));
1034 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1036 BUILD_BUG_ON(sizeof(format) != 6);
1037 return intel_sdvo_set_value(intel_sdvo,
1038 SDVO_CMD_SET_TV_FORMAT,
1039 &format, sizeof(format));
1043 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1044 const struct drm_display_mode *mode)
1046 struct intel_sdvo_dtd output_dtd;
1048 if (!intel_sdvo_set_target_output(intel_sdvo,
1049 intel_sdvo->attached_output))
1052 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1053 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1059 /* Asks the sdvo controller for the preferred input mode given the output mode.
1060 * Unfortunately we have to set up the full output mode to do that. */
1062 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1063 const struct drm_display_mode *mode,
1064 struct drm_display_mode *adjusted_mode)
1066 struct intel_sdvo_dtd input_dtd;
1068 /* Reset the input timing to the screen. Assume always input 0. */
1069 if (!intel_sdvo_set_target_input(intel_sdvo))
1072 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1078 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1082 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1083 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1088 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
1090 unsigned dotclock = pipe_config->port_clock;
1091 struct dpll *clock = &pipe_config->dpll;
1093 /* SDVO TV has fixed PLL values depend on its clock range,
1094 this mirrors vbios setting. */
1095 if (dotclock >= 100000 && dotclock < 140500) {
1101 } else if (dotclock >= 140500 && dotclock <= 200000) {
1108 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1111 pipe_config->clock_set = true;
1114 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1115 struct intel_crtc_config *pipe_config)
1117 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1118 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1119 struct drm_display_mode *mode = &pipe_config->requested_mode;
1121 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1122 pipe_config->pipe_bpp = 8*3;
1124 if (HAS_PCH_SPLIT(encoder->base.dev))
1125 pipe_config->has_pch_encoder = true;
1127 /* We need to construct preferred input timings based on our
1128 * output timings. To do that, we have to set the output
1129 * timings, even though this isn't really the right place in
1130 * the sequence to do it. Oh well.
1132 if (intel_sdvo->is_tv) {
1133 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1136 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1139 pipe_config->sdvo_tv_clock = true;
1140 } else if (intel_sdvo->is_lvds) {
1141 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1142 intel_sdvo->sdvo_lvds_fixed_mode))
1145 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1150 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1151 * SDVO device will factor out the multiplier during mode_set.
1153 pipe_config->pixel_multiplier =
1154 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1156 if (intel_sdvo->color_range_auto) {
1157 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1158 /* FIXME: This bit is only valid when using TMDS encoding and 8
1159 * bit per color mode. */
1160 if (intel_sdvo->has_hdmi_monitor &&
1161 drm_match_cea_mode(adjusted_mode) > 1)
1162 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
1164 intel_sdvo->color_range = 0;
1167 if (intel_sdvo->color_range)
1168 pipe_config->limited_color_range = true;
1170 /* Clock computation needs to happen after pixel multiplier. */
1171 if (intel_sdvo->is_tv)
1172 i9xx_adjust_sdvo_tv_clock(pipe_config);
1177 static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
1179 struct drm_device *dev = intel_encoder->base.dev;
1180 struct drm_i915_private *dev_priv = dev->dev_private;
1181 struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc);
1182 struct drm_display_mode *adjusted_mode =
1183 &crtc->config.adjusted_mode;
1184 struct drm_display_mode *mode = &crtc->config.requested_mode;
1185 struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1187 struct intel_sdvo_in_out_map in_out;
1188 struct intel_sdvo_dtd input_dtd, output_dtd;
1194 /* First, set the input mapping for the first input to our controlled
1195 * output. This is only correct if we're a single-input device, in
1196 * which case the first input is the output from the appropriate SDVO
1197 * channel on the motherboard. In a two-input device, the first input
1198 * will be SDVOB and the second SDVOC.
1200 in_out.in0 = intel_sdvo->attached_output;
1203 intel_sdvo_set_value(intel_sdvo,
1204 SDVO_CMD_SET_IN_OUT_MAP,
1205 &in_out, sizeof(in_out));
1207 /* Set the output timings to the screen */
1208 if (!intel_sdvo_set_target_output(intel_sdvo,
1209 intel_sdvo->attached_output))
1212 /* lvds has a special fixed output timing. */
1213 if (intel_sdvo->is_lvds)
1214 intel_sdvo_get_dtd_from_mode(&output_dtd,
1215 intel_sdvo->sdvo_lvds_fixed_mode);
1217 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1218 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1219 DRM_INFO("Setting output timings on %s failed\n",
1220 SDVO_NAME(intel_sdvo));
1222 /* Set the input timing to the screen. Assume always input 0. */
1223 if (!intel_sdvo_set_target_input(intel_sdvo))
1226 if (intel_sdvo->has_hdmi_monitor) {
1227 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1228 intel_sdvo_set_colorimetry(intel_sdvo,
1229 SDVO_COLORIMETRY_RGB256);
1230 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1232 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1234 if (intel_sdvo->is_tv &&
1235 !intel_sdvo_set_tv_format(intel_sdvo))
1238 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1240 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1241 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1242 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1243 DRM_INFO("Setting input timings on %s failed\n",
1244 SDVO_NAME(intel_sdvo));
1246 switch (crtc->config.pixel_multiplier) {
1248 WARN(1, "unknown pixel mutlipler specified\n");
1249 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1250 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1251 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1253 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1256 /* Set the SDVO control regs. */
1257 if (INTEL_INFO(dev)->gen >= 4) {
1258 /* The real mode polarity is set by the SDVO commands, using
1259 * struct intel_sdvo_dtd. */
1260 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1261 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi)
1262 sdvox |= intel_sdvo->color_range;
1263 if (INTEL_INFO(dev)->gen < 5)
1264 sdvox |= SDVO_BORDER_ENABLE;
1266 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1267 switch (intel_sdvo->sdvo_reg) {
1269 sdvox &= SDVOB_PRESERVE_MASK;
1272 sdvox &= SDVOC_PRESERVE_MASK;
1275 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1278 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1279 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1281 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1283 if (intel_sdvo->has_hdmi_audio)
1284 sdvox |= SDVO_AUDIO_ENABLE;
1286 if (INTEL_INFO(dev)->gen >= 4) {
1287 /* done in crtc_mode_set as the dpll_md reg must be written early */
1288 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1289 /* done in crtc_mode_set as it lives inside the dpll register */
1291 sdvox |= (crtc->config.pixel_multiplier - 1)
1292 << SDVO_PORT_MULTIPLY_SHIFT;
1295 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1296 INTEL_INFO(dev)->gen < 5)
1297 sdvox |= SDVO_STALL_SELECT;
1298 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1301 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1303 struct intel_sdvo_connector *intel_sdvo_connector =
1304 to_intel_sdvo_connector(&connector->base);
1305 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1306 u16 active_outputs = 0;
1308 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1310 if (active_outputs & intel_sdvo_connector->output_flag)
1316 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1319 struct drm_device *dev = encoder->base.dev;
1320 struct drm_i915_private *dev_priv = dev->dev_private;
1321 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1322 u16 active_outputs = 0;
1325 tmp = I915_READ(intel_sdvo->sdvo_reg);
1326 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1328 if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1331 if (HAS_PCH_CPT(dev))
1332 *pipe = PORT_TO_PIPE_CPT(tmp);
1334 *pipe = PORT_TO_PIPE(tmp);
1339 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1340 struct intel_crtc_config *pipe_config)
1342 struct drm_device *dev = encoder->base.dev;
1343 struct drm_i915_private *dev_priv = dev->dev_private;
1344 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1345 struct intel_sdvo_dtd dtd;
1346 int encoder_pixel_multiplier = 0;
1348 u32 flags = 0, sdvox;
1352 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1354 /* Some sdvo encoders are not spec compliant and don't
1355 * implement the mandatory get_timings function. */
1356 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1357 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1359 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1360 flags |= DRM_MODE_FLAG_PHSYNC;
1362 flags |= DRM_MODE_FLAG_NHSYNC;
1364 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1365 flags |= DRM_MODE_FLAG_PVSYNC;
1367 flags |= DRM_MODE_FLAG_NVSYNC;
1370 pipe_config->adjusted_mode.flags |= flags;
1373 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1374 * the sdvo port register, on all other platforms it is part of the dpll
1375 * state. Since the general pipe state readout happens before the
1376 * encoder->get_config we so already have a valid pixel multplier on all
1379 if (IS_I915G(dev) || IS_I915GM(dev)) {
1380 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1381 pipe_config->pixel_multiplier =
1382 ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1383 >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1386 dotclock = pipe_config->port_clock;
1387 if (pipe_config->pixel_multiplier)
1388 dotclock /= pipe_config->pixel_multiplier;
1390 if (HAS_PCH_SPLIT(dev))
1391 ironlake_check_encoder_dotclock(pipe_config, dotclock);
1393 pipe_config->adjusted_mode.crtc_clock = dotclock;
1395 /* Cross check the port pixel multiplier with the sdvo encoder state. */
1396 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1399 case SDVO_CLOCK_RATE_MULT_1X:
1400 encoder_pixel_multiplier = 1;
1402 case SDVO_CLOCK_RATE_MULT_2X:
1403 encoder_pixel_multiplier = 2;
1405 case SDVO_CLOCK_RATE_MULT_4X:
1406 encoder_pixel_multiplier = 4;
1411 WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1412 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1413 pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1416 static void intel_disable_sdvo(struct intel_encoder *encoder)
1418 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1419 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1422 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1424 intel_sdvo_set_encoder_power_state(intel_sdvo,
1427 temp = I915_READ(intel_sdvo->sdvo_reg);
1428 if ((temp & SDVO_ENABLE) != 0) {
1429 /* HW workaround for IBX, we need to move the port to
1430 * transcoder A before disabling it. */
1431 if (HAS_PCH_IBX(encoder->base.dev)) {
1432 struct drm_crtc *crtc = encoder->base.crtc;
1433 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1435 if (temp & SDVO_PIPE_B_SELECT) {
1436 temp &= ~SDVO_PIPE_B_SELECT;
1437 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1438 POSTING_READ(intel_sdvo->sdvo_reg);
1440 /* Again we need to write this twice. */
1441 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1442 POSTING_READ(intel_sdvo->sdvo_reg);
1444 /* Transcoder selection bits only update
1445 * effectively on vblank. */
1447 intel_wait_for_vblank(encoder->base.dev, pipe);
1453 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1457 static void intel_enable_sdvo(struct intel_encoder *encoder)
1459 struct drm_device *dev = encoder->base.dev;
1460 struct drm_i915_private *dev_priv = dev->dev_private;
1461 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1462 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1464 bool input1, input2;
1468 temp = I915_READ(intel_sdvo->sdvo_reg);
1469 if ((temp & SDVO_ENABLE) == 0) {
1470 /* HW workaround for IBX, we need to move the port
1471 * to transcoder A before disabling it, so restore it here. */
1472 if (HAS_PCH_IBX(dev))
1473 temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
1475 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1477 for (i = 0; i < 2; i++)
1478 intel_wait_for_vblank(dev, intel_crtc->pipe);
1480 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1481 /* Warn if the device reported failure to sync.
1482 * A lot of SDVO devices fail to notify of sync, but it's
1483 * a given it the status is a success, we succeeded.
1485 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1486 DRM_DEBUG_KMS("First %s output reported failure to "
1487 "sync\n", SDVO_NAME(intel_sdvo));
1491 intel_sdvo_set_encoder_power_state(intel_sdvo,
1493 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1496 /* Special dpms function to support cloning between dvo/sdvo/crt. */
1497 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1499 struct drm_crtc *crtc;
1500 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1502 /* dvo supports only 2 dpms states. */
1503 if (mode != DRM_MODE_DPMS_ON)
1504 mode = DRM_MODE_DPMS_OFF;
1506 if (mode == connector->dpms)
1509 connector->dpms = mode;
1511 /* Only need to change hw state when actually enabled */
1512 crtc = intel_sdvo->base.base.crtc;
1514 intel_sdvo->base.connectors_active = false;
1518 /* We set active outputs manually below in case pipe dpms doesn't change
1519 * due to cloning. */
1520 if (mode != DRM_MODE_DPMS_ON) {
1521 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1523 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1525 intel_sdvo->base.connectors_active = false;
1527 intel_crtc_update_dpms(crtc);
1529 intel_sdvo->base.connectors_active = true;
1531 intel_crtc_update_dpms(crtc);
1534 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1535 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1538 intel_modeset_check_state(connector->dev);
1541 static enum drm_mode_status
1542 intel_sdvo_mode_valid(struct drm_connector *connector,
1543 struct drm_display_mode *mode)
1545 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1547 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1548 return MODE_NO_DBLESCAN;
1550 if (intel_sdvo->pixel_clock_min > mode->clock)
1551 return MODE_CLOCK_LOW;
1553 if (intel_sdvo->pixel_clock_max < mode->clock)
1554 return MODE_CLOCK_HIGH;
1556 if (intel_sdvo->is_lvds) {
1557 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1560 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1567 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1569 BUILD_BUG_ON(sizeof(*caps) != 8);
1570 if (!intel_sdvo_get_value(intel_sdvo,
1571 SDVO_CMD_GET_DEVICE_CAPS,
1572 caps, sizeof(*caps)))
1575 DRM_DEBUG_KMS("SDVO capabilities:\n"
1578 " device_rev_id: %d\n"
1579 " sdvo_version_major: %d\n"
1580 " sdvo_version_minor: %d\n"
1581 " sdvo_inputs_mask: %d\n"
1582 " smooth_scaling: %d\n"
1583 " sharp_scaling: %d\n"
1585 " down_scaling: %d\n"
1586 " stall_support: %d\n"
1587 " output_flags: %d\n",
1590 caps->device_rev_id,
1591 caps->sdvo_version_major,
1592 caps->sdvo_version_minor,
1593 caps->sdvo_inputs_mask,
1594 caps->smooth_scaling,
1595 caps->sharp_scaling,
1598 caps->stall_support,
1599 caps->output_flags);
1604 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1606 struct drm_device *dev = intel_sdvo->base.base.dev;
1609 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1611 if (IS_I945G(dev) || IS_I945GM(dev))
1614 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1615 &hotplug, sizeof(hotplug)))
1621 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1623 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1625 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1626 &intel_sdvo->hotplug_active, 2);
1630 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1632 /* Is there more than one type of output? */
1633 return hweight16(intel_sdvo->caps.output_flags) > 1;
1636 static struct edid *
1637 intel_sdvo_get_edid(struct drm_connector *connector)
1639 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1640 return drm_get_edid(connector, &sdvo->ddc);
1643 /* Mac mini hack -- use the same DDC as the analog connector */
1644 static struct edid *
1645 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1647 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1649 return drm_get_edid(connector,
1650 intel_gmbus_get_adapter(dev_priv,
1651 dev_priv->vbt.crt_ddc_pin));
1654 static enum drm_connector_status
1655 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1657 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1658 enum drm_connector_status status;
1661 edid = intel_sdvo_get_edid(connector);
1663 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1664 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1667 * Don't use the 1 as the argument of DDC bus switch to get
1668 * the EDID. It is used for SDVO SPD ROM.
1670 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1671 intel_sdvo->ddc_bus = ddc;
1672 edid = intel_sdvo_get_edid(connector);
1677 * If we found the EDID on the other bus,
1678 * assume that is the correct DDC bus.
1681 intel_sdvo->ddc_bus = saved_ddc;
1685 * When there is no edid and no monitor is connected with VGA
1686 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1689 edid = intel_sdvo_get_analog_edid(connector);
1691 status = connector_status_unknown;
1693 /* DDC bus is shared, match EDID to connector type */
1694 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1695 status = connector_status_connected;
1696 if (intel_sdvo->is_hdmi) {
1697 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1698 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1699 intel_sdvo->rgb_quant_range_selectable =
1700 drm_rgb_quant_range_selectable(edid);
1703 status = connector_status_disconnected;
1707 if (status == connector_status_connected) {
1708 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1709 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1710 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1717 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1720 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1721 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1723 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1724 connector_is_digital, monitor_is_digital);
1725 return connector_is_digital == monitor_is_digital;
1728 static enum drm_connector_status
1729 intel_sdvo_detect(struct drm_connector *connector, bool force)
1732 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1733 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1734 enum drm_connector_status ret;
1736 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1737 connector->base.id, drm_get_connector_name(connector));
1739 if (!intel_sdvo_get_value(intel_sdvo,
1740 SDVO_CMD_GET_ATTACHED_DISPLAYS,
1742 return connector_status_unknown;
1744 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1745 response & 0xff, response >> 8,
1746 intel_sdvo_connector->output_flag);
1749 return connector_status_disconnected;
1751 intel_sdvo->attached_output = response;
1753 intel_sdvo->has_hdmi_monitor = false;
1754 intel_sdvo->has_hdmi_audio = false;
1755 intel_sdvo->rgb_quant_range_selectable = false;
1757 if ((intel_sdvo_connector->output_flag & response) == 0)
1758 ret = connector_status_disconnected;
1759 else if (IS_TMDS(intel_sdvo_connector))
1760 ret = intel_sdvo_tmds_sink_detect(connector);
1764 /* if we have an edid check it matches the connection */
1765 edid = intel_sdvo_get_edid(connector);
1767 edid = intel_sdvo_get_analog_edid(connector);
1769 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1771 ret = connector_status_connected;
1773 ret = connector_status_disconnected;
1777 ret = connector_status_connected;
1780 /* May update encoder flag for like clock for SDVO TV, etc.*/
1781 if (ret == connector_status_connected) {
1782 intel_sdvo->is_tv = false;
1783 intel_sdvo->is_lvds = false;
1785 if (response & SDVO_TV_MASK)
1786 intel_sdvo->is_tv = true;
1787 if (response & SDVO_LVDS_MASK)
1788 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1794 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1798 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1799 connector->base.id, drm_get_connector_name(connector));
1801 /* set the bus switch and get the modes */
1802 edid = intel_sdvo_get_edid(connector);
1805 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1806 * link between analog and digital outputs. So, if the regular SDVO
1807 * DDC fails, check to see if the analog output is disconnected, in
1808 * which case we'll look there for the digital DDC data.
1811 edid = intel_sdvo_get_analog_edid(connector);
1814 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1816 drm_mode_connector_update_edid_property(connector, edid);
1817 drm_add_edid_modes(connector, edid);
1825 * Set of SDVO TV modes.
1826 * Note! This is in reply order (see loop in get_tv_modes).
1827 * XXX: all 60Hz refresh?
1829 static const struct drm_display_mode sdvo_tv_modes[] = {
1830 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1831 416, 0, 200, 201, 232, 233, 0,
1832 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1833 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1834 416, 0, 240, 241, 272, 273, 0,
1835 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1836 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1837 496, 0, 300, 301, 332, 333, 0,
1838 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1839 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1840 736, 0, 350, 351, 382, 383, 0,
1841 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1842 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1843 736, 0, 400, 401, 432, 433, 0,
1844 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1845 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1846 736, 0, 480, 481, 512, 513, 0,
1847 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1848 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1849 800, 0, 480, 481, 512, 513, 0,
1850 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1851 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1852 800, 0, 576, 577, 608, 609, 0,
1853 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1854 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1855 816, 0, 350, 351, 382, 383, 0,
1856 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1857 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1858 816, 0, 400, 401, 432, 433, 0,
1859 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1860 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1861 816, 0, 480, 481, 512, 513, 0,
1862 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1863 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1864 816, 0, 540, 541, 572, 573, 0,
1865 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1866 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1867 816, 0, 576, 577, 608, 609, 0,
1868 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1869 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1870 864, 0, 576, 577, 608, 609, 0,
1871 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1872 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1873 896, 0, 600, 601, 632, 633, 0,
1874 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1875 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1876 928, 0, 624, 625, 656, 657, 0,
1877 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1878 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1879 1016, 0, 766, 767, 798, 799, 0,
1880 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1881 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1882 1120, 0, 768, 769, 800, 801, 0,
1883 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1884 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1885 1376, 0, 1024, 1025, 1056, 1057, 0,
1886 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1889 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1891 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1892 struct intel_sdvo_sdtv_resolution_request tv_res;
1893 uint32_t reply = 0, format_map = 0;
1896 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1897 connector->base.id, drm_get_connector_name(connector));
1899 /* Read the list of supported input resolutions for the selected TV
1902 format_map = 1 << intel_sdvo->tv_format_index;
1903 memcpy(&tv_res, &format_map,
1904 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1906 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1909 BUILD_BUG_ON(sizeof(tv_res) != 3);
1910 if (!intel_sdvo_write_cmd(intel_sdvo,
1911 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1912 &tv_res, sizeof(tv_res)))
1914 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1917 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1918 if (reply & (1 << i)) {
1919 struct drm_display_mode *nmode;
1920 nmode = drm_mode_duplicate(connector->dev,
1923 drm_mode_probed_add(connector, nmode);
1927 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1929 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1930 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1931 struct drm_display_mode *newmode;
1933 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1934 connector->base.id, drm_get_connector_name(connector));
1937 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1938 * SDVO->LVDS transcoders can't cope with the EDID mode.
1940 if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1941 newmode = drm_mode_duplicate(connector->dev,
1942 dev_priv->vbt.sdvo_lvds_vbt_mode);
1943 if (newmode != NULL) {
1944 /* Guarantee the mode is preferred */
1945 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1946 DRM_MODE_TYPE_DRIVER);
1947 drm_mode_probed_add(connector, newmode);
1952 * Attempt to get the mode list from DDC.
1953 * Assume that the preferred modes are
1954 * arranged in priority order.
1956 intel_ddc_get_modes(connector, &intel_sdvo->ddc);
1958 list_for_each_entry(newmode, &connector->probed_modes, head) {
1959 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1960 intel_sdvo->sdvo_lvds_fixed_mode =
1961 drm_mode_duplicate(connector->dev, newmode);
1963 intel_sdvo->is_lvds = true;
1969 static int intel_sdvo_get_modes(struct drm_connector *connector)
1971 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1973 if (IS_TV(intel_sdvo_connector))
1974 intel_sdvo_get_tv_modes(connector);
1975 else if (IS_LVDS(intel_sdvo_connector))
1976 intel_sdvo_get_lvds_modes(connector);
1978 intel_sdvo_get_ddc_modes(connector);
1980 return !list_empty(&connector->probed_modes);
1984 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1986 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1987 struct drm_device *dev = connector->dev;
1989 if (intel_sdvo_connector->left)
1990 drm_property_destroy(dev, intel_sdvo_connector->left);
1991 if (intel_sdvo_connector->right)
1992 drm_property_destroy(dev, intel_sdvo_connector->right);
1993 if (intel_sdvo_connector->top)
1994 drm_property_destroy(dev, intel_sdvo_connector->top);
1995 if (intel_sdvo_connector->bottom)
1996 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1997 if (intel_sdvo_connector->hpos)
1998 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1999 if (intel_sdvo_connector->vpos)
2000 drm_property_destroy(dev, intel_sdvo_connector->vpos);
2001 if (intel_sdvo_connector->saturation)
2002 drm_property_destroy(dev, intel_sdvo_connector->saturation);
2003 if (intel_sdvo_connector->contrast)
2004 drm_property_destroy(dev, intel_sdvo_connector->contrast);
2005 if (intel_sdvo_connector->hue)
2006 drm_property_destroy(dev, intel_sdvo_connector->hue);
2007 if (intel_sdvo_connector->sharpness)
2008 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
2009 if (intel_sdvo_connector->flicker_filter)
2010 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
2011 if (intel_sdvo_connector->flicker_filter_2d)
2012 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
2013 if (intel_sdvo_connector->flicker_filter_adaptive)
2014 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
2015 if (intel_sdvo_connector->tv_luma_filter)
2016 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
2017 if (intel_sdvo_connector->tv_chroma_filter)
2018 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
2019 if (intel_sdvo_connector->dot_crawl)
2020 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
2021 if (intel_sdvo_connector->brightness)
2022 drm_property_destroy(dev, intel_sdvo_connector->brightness);
2025 static void intel_sdvo_destroy(struct drm_connector *connector)
2027 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2029 if (intel_sdvo_connector->tv_format)
2030 drm_property_destroy(connector->dev,
2031 intel_sdvo_connector->tv_format);
2033 intel_sdvo_destroy_enhance_property(connector);
2034 drm_connector_cleanup(connector);
2035 kfree(intel_sdvo_connector);
2038 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
2040 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2042 bool has_audio = false;
2044 if (!intel_sdvo->is_hdmi)
2047 edid = intel_sdvo_get_edid(connector);
2048 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
2049 has_audio = drm_detect_monitor_audio(edid);
2056 intel_sdvo_set_property(struct drm_connector *connector,
2057 struct drm_property *property,
2060 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2061 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2062 struct drm_i915_private *dev_priv = connector->dev->dev_private;
2063 uint16_t temp_value;
2067 ret = drm_object_property_set_value(&connector->base, property, val);
2071 if (property == dev_priv->force_audio_property) {
2075 if (i == intel_sdvo_connector->force_audio)
2078 intel_sdvo_connector->force_audio = i;
2080 if (i == HDMI_AUDIO_AUTO)
2081 has_audio = intel_sdvo_detect_hdmi_audio(connector);
2083 has_audio = (i == HDMI_AUDIO_ON);
2085 if (has_audio == intel_sdvo->has_hdmi_audio)
2088 intel_sdvo->has_hdmi_audio = has_audio;
2092 if (property == dev_priv->broadcast_rgb_property) {
2093 bool old_auto = intel_sdvo->color_range_auto;
2094 uint32_t old_range = intel_sdvo->color_range;
2097 case INTEL_BROADCAST_RGB_AUTO:
2098 intel_sdvo->color_range_auto = true;
2100 case INTEL_BROADCAST_RGB_FULL:
2101 intel_sdvo->color_range_auto = false;
2102 intel_sdvo->color_range = 0;
2104 case INTEL_BROADCAST_RGB_LIMITED:
2105 intel_sdvo->color_range_auto = false;
2106 /* FIXME: this bit is only valid when using TMDS
2107 * encoding and 8 bit per color mode. */
2108 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
2114 if (old_auto == intel_sdvo->color_range_auto &&
2115 old_range == intel_sdvo->color_range)
2121 #define CHECK_PROPERTY(name, NAME) \
2122 if (intel_sdvo_connector->name == property) { \
2123 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2124 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2125 cmd = SDVO_CMD_SET_##NAME; \
2126 intel_sdvo_connector->cur_##name = temp_value; \
2130 if (property == intel_sdvo_connector->tv_format) {
2131 if (val >= TV_FORMAT_NUM)
2134 if (intel_sdvo->tv_format_index ==
2135 intel_sdvo_connector->tv_format_supported[val])
2138 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
2140 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
2142 if (intel_sdvo_connector->left == property) {
2143 drm_object_property_set_value(&connector->base,
2144 intel_sdvo_connector->right, val);
2145 if (intel_sdvo_connector->left_margin == temp_value)
2148 intel_sdvo_connector->left_margin = temp_value;
2149 intel_sdvo_connector->right_margin = temp_value;
2150 temp_value = intel_sdvo_connector->max_hscan -
2151 intel_sdvo_connector->left_margin;
2152 cmd = SDVO_CMD_SET_OVERSCAN_H;
2154 } else if (intel_sdvo_connector->right == property) {
2155 drm_object_property_set_value(&connector->base,
2156 intel_sdvo_connector->left, val);
2157 if (intel_sdvo_connector->right_margin == temp_value)
2160 intel_sdvo_connector->left_margin = temp_value;
2161 intel_sdvo_connector->right_margin = temp_value;
2162 temp_value = intel_sdvo_connector->max_hscan -
2163 intel_sdvo_connector->left_margin;
2164 cmd = SDVO_CMD_SET_OVERSCAN_H;
2166 } else if (intel_sdvo_connector->top == property) {
2167 drm_object_property_set_value(&connector->base,
2168 intel_sdvo_connector->bottom, val);
2169 if (intel_sdvo_connector->top_margin == temp_value)
2172 intel_sdvo_connector->top_margin = temp_value;
2173 intel_sdvo_connector->bottom_margin = temp_value;
2174 temp_value = intel_sdvo_connector->max_vscan -
2175 intel_sdvo_connector->top_margin;
2176 cmd = SDVO_CMD_SET_OVERSCAN_V;
2178 } else if (intel_sdvo_connector->bottom == property) {
2179 drm_object_property_set_value(&connector->base,
2180 intel_sdvo_connector->top, val);
2181 if (intel_sdvo_connector->bottom_margin == temp_value)
2184 intel_sdvo_connector->top_margin = temp_value;
2185 intel_sdvo_connector->bottom_margin = temp_value;
2186 temp_value = intel_sdvo_connector->max_vscan -
2187 intel_sdvo_connector->top_margin;
2188 cmd = SDVO_CMD_SET_OVERSCAN_V;
2191 CHECK_PROPERTY(hpos, HPOS)
2192 CHECK_PROPERTY(vpos, VPOS)
2193 CHECK_PROPERTY(saturation, SATURATION)
2194 CHECK_PROPERTY(contrast, CONTRAST)
2195 CHECK_PROPERTY(hue, HUE)
2196 CHECK_PROPERTY(brightness, BRIGHTNESS)
2197 CHECK_PROPERTY(sharpness, SHARPNESS)
2198 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2199 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2200 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2201 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2202 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2203 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2206 return -EINVAL; /* unknown property */
2209 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2214 if (intel_sdvo->base.base.crtc)
2215 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2218 #undef CHECK_PROPERTY
2221 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2222 .dpms = intel_sdvo_dpms,
2223 .detect = intel_sdvo_detect,
2224 .fill_modes = drm_helper_probe_single_connector_modes,
2225 .set_property = intel_sdvo_set_property,
2226 .destroy = intel_sdvo_destroy,
2229 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2230 .get_modes = intel_sdvo_get_modes,
2231 .mode_valid = intel_sdvo_mode_valid,
2232 .best_encoder = intel_best_encoder,
2235 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2237 struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2239 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2240 drm_mode_destroy(encoder->dev,
2241 intel_sdvo->sdvo_lvds_fixed_mode);
2243 i2c_del_adapter(&intel_sdvo->ddc);
2244 intel_encoder_destroy(encoder);
2247 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2248 .destroy = intel_sdvo_enc_destroy,
2252 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2255 unsigned int num_bits;
2257 /* Make a mask of outputs less than or equal to our own priority in the
2260 switch (sdvo->controlled_output) {
2261 case SDVO_OUTPUT_LVDS1:
2262 mask |= SDVO_OUTPUT_LVDS1;
2263 case SDVO_OUTPUT_LVDS0:
2264 mask |= SDVO_OUTPUT_LVDS0;
2265 case SDVO_OUTPUT_TMDS1:
2266 mask |= SDVO_OUTPUT_TMDS1;
2267 case SDVO_OUTPUT_TMDS0:
2268 mask |= SDVO_OUTPUT_TMDS0;
2269 case SDVO_OUTPUT_RGB1:
2270 mask |= SDVO_OUTPUT_RGB1;
2271 case SDVO_OUTPUT_RGB0:
2272 mask |= SDVO_OUTPUT_RGB0;
2276 /* Count bits to find what number we are in the priority list. */
2277 mask &= sdvo->caps.output_flags;
2278 num_bits = hweight16(mask);
2279 /* If more than 3 outputs, default to DDC bus 3 for now. */
2283 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2284 sdvo->ddc_bus = 1 << num_bits;
2288 * Choose the appropriate DDC bus for control bus switch command for this
2289 * SDVO output based on the controlled output.
2291 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2292 * outputs, then LVDS outputs.
2295 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2296 struct intel_sdvo *sdvo, u32 reg)
2298 struct sdvo_device_mapping *mapping;
2301 mapping = &(dev_priv->sdvo_mappings[0]);
2303 mapping = &(dev_priv->sdvo_mappings[1]);
2305 if (mapping->initialized)
2306 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2308 intel_sdvo_guess_ddc_bus(sdvo);
2312 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2313 struct intel_sdvo *sdvo, u32 reg)
2315 struct sdvo_device_mapping *mapping;
2319 mapping = &dev_priv->sdvo_mappings[0];
2321 mapping = &dev_priv->sdvo_mappings[1];
2323 if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2324 pin = mapping->i2c_pin;
2326 pin = GMBUS_PORT_DPB;
2328 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2330 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2331 * our code totally fails once we start using gmbus. Hence fall back to
2332 * bit banging for now. */
2333 intel_gmbus_force_bit(sdvo->i2c, true);
2336 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2338 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2340 intel_gmbus_force_bit(sdvo->i2c, false);
2344 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2346 return intel_sdvo_check_supp_encode(intel_sdvo);
2350 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2352 struct drm_i915_private *dev_priv = dev->dev_private;
2353 struct sdvo_device_mapping *my_mapping, *other_mapping;
2355 if (sdvo->is_sdvob) {
2356 my_mapping = &dev_priv->sdvo_mappings[0];
2357 other_mapping = &dev_priv->sdvo_mappings[1];
2359 my_mapping = &dev_priv->sdvo_mappings[1];
2360 other_mapping = &dev_priv->sdvo_mappings[0];
2363 /* If the BIOS described our SDVO device, take advantage of it. */
2364 if (my_mapping->slave_addr)
2365 return my_mapping->slave_addr;
2367 /* If the BIOS only described a different SDVO device, use the
2368 * address that it isn't using.
2370 if (other_mapping->slave_addr) {
2371 if (other_mapping->slave_addr == 0x70)
2377 /* No SDVO device info is found for another DVO port,
2378 * so use mapping assumption we had before BIOS parsing.
2387 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2388 struct intel_sdvo *encoder)
2390 drm_connector_init(encoder->base.base.dev,
2391 &connector->base.base,
2392 &intel_sdvo_connector_funcs,
2393 connector->base.base.connector_type);
2395 drm_connector_helper_add(&connector->base.base,
2396 &intel_sdvo_connector_helper_funcs);
2398 connector->base.base.interlace_allowed = 1;
2399 connector->base.base.doublescan_allowed = 0;
2400 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2401 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2402 connector->base.unregister = intel_connector_unregister;
2404 intel_connector_attach_encoder(&connector->base, &encoder->base);
2405 drm_sysfs_connector_add(&connector->base.base);
2409 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2410 struct intel_sdvo_connector *connector)
2412 struct drm_device *dev = connector->base.base.dev;
2414 intel_attach_force_audio_property(&connector->base.base);
2415 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2416 intel_attach_broadcast_rgb_property(&connector->base.base);
2417 intel_sdvo->color_range_auto = true;
2422 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2424 struct drm_encoder *encoder = &intel_sdvo->base.base;
2425 struct drm_connector *connector;
2426 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2427 struct intel_connector *intel_connector;
2428 struct intel_sdvo_connector *intel_sdvo_connector;
2430 DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2432 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2433 if (!intel_sdvo_connector)
2437 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2438 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2439 } else if (device == 1) {
2440 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2441 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2444 intel_connector = &intel_sdvo_connector->base;
2445 connector = &intel_connector->base;
2446 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2447 intel_sdvo_connector->output_flag) {
2448 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2449 /* Some SDVO devices have one-shot hotplug interrupts.
2450 * Ensure that they get re-enabled when an interrupt happens.
2452 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2453 intel_sdvo_enable_hotplug(intel_encoder);
2455 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2457 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2458 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2460 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2461 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2462 intel_sdvo->is_hdmi = true;
2465 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2466 if (intel_sdvo->is_hdmi)
2467 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2473 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2475 struct drm_encoder *encoder = &intel_sdvo->base.base;
2476 struct drm_connector *connector;
2477 struct intel_connector *intel_connector;
2478 struct intel_sdvo_connector *intel_sdvo_connector;
2480 DRM_DEBUG_KMS("initialising TV type %d\n", type);
2482 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2483 if (!intel_sdvo_connector)
2486 intel_connector = &intel_sdvo_connector->base;
2487 connector = &intel_connector->base;
2488 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2489 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2491 intel_sdvo->controlled_output |= type;
2492 intel_sdvo_connector->output_flag = type;
2494 intel_sdvo->is_tv = true;
2496 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2498 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2501 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2507 drm_sysfs_connector_remove(connector);
2508 intel_sdvo_destroy(connector);
2513 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2515 struct drm_encoder *encoder = &intel_sdvo->base.base;
2516 struct drm_connector *connector;
2517 struct intel_connector *intel_connector;
2518 struct intel_sdvo_connector *intel_sdvo_connector;
2520 DRM_DEBUG_KMS("initialising analog device %d\n", device);
2522 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2523 if (!intel_sdvo_connector)
2526 intel_connector = &intel_sdvo_connector->base;
2527 connector = &intel_connector->base;
2528 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2529 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2530 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2533 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2534 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2535 } else if (device == 1) {
2536 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2537 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2540 intel_sdvo_connector_init(intel_sdvo_connector,
2546 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2548 struct drm_encoder *encoder = &intel_sdvo->base.base;
2549 struct drm_connector *connector;
2550 struct intel_connector *intel_connector;
2551 struct intel_sdvo_connector *intel_sdvo_connector;
2553 DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2555 intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
2556 if (!intel_sdvo_connector)
2559 intel_connector = &intel_sdvo_connector->base;
2560 connector = &intel_connector->base;
2561 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2562 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2565 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2566 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2567 } else if (device == 1) {
2568 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2569 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2572 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2573 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2579 drm_sysfs_connector_remove(connector);
2580 intel_sdvo_destroy(connector);
2585 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2587 intel_sdvo->is_tv = false;
2588 intel_sdvo->is_lvds = false;
2590 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2592 if (flags & SDVO_OUTPUT_TMDS0)
2593 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2596 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2597 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2600 /* TV has no XXX1 function block */
2601 if (flags & SDVO_OUTPUT_SVID0)
2602 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2605 if (flags & SDVO_OUTPUT_CVBS0)
2606 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2609 if (flags & SDVO_OUTPUT_YPRPB0)
2610 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2613 if (flags & SDVO_OUTPUT_RGB0)
2614 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2617 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2618 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2621 if (flags & SDVO_OUTPUT_LVDS0)
2622 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2625 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2626 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2629 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2630 unsigned char bytes[2];
2632 intel_sdvo->controlled_output = 0;
2633 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2634 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2635 SDVO_NAME(intel_sdvo),
2636 bytes[0], bytes[1]);
2639 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2644 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2646 struct drm_device *dev = intel_sdvo->base.base.dev;
2647 struct drm_connector *connector, *tmp;
2649 list_for_each_entry_safe(connector, tmp,
2650 &dev->mode_config.connector_list, head) {
2651 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2652 drm_sysfs_connector_remove(connector);
2653 intel_sdvo_destroy(connector);
2658 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2659 struct intel_sdvo_connector *intel_sdvo_connector,
2662 struct drm_device *dev = intel_sdvo->base.base.dev;
2663 struct intel_sdvo_tv_format format;
2664 uint32_t format_map, i;
2666 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2669 BUILD_BUG_ON(sizeof(format) != 6);
2670 if (!intel_sdvo_get_value(intel_sdvo,
2671 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2672 &format, sizeof(format)))
2675 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2677 if (format_map == 0)
2680 intel_sdvo_connector->format_supported_num = 0;
2681 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2682 if (format_map & (1 << i))
2683 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2686 intel_sdvo_connector->tv_format =
2687 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2688 "mode", intel_sdvo_connector->format_supported_num);
2689 if (!intel_sdvo_connector->tv_format)
2692 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2693 drm_property_add_enum(
2694 intel_sdvo_connector->tv_format, i,
2695 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2697 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2698 drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2699 intel_sdvo_connector->tv_format, 0);
2704 #define ENHANCEMENT(name, NAME) do { \
2705 if (enhancements.name) { \
2706 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2707 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2709 intel_sdvo_connector->max_##name = data_value[0]; \
2710 intel_sdvo_connector->cur_##name = response; \
2711 intel_sdvo_connector->name = \
2712 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2713 if (!intel_sdvo_connector->name) return false; \
2714 drm_object_attach_property(&connector->base, \
2715 intel_sdvo_connector->name, \
2716 intel_sdvo_connector->cur_##name); \
2717 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2718 data_value[0], data_value[1], response); \
2723 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2724 struct intel_sdvo_connector *intel_sdvo_connector,
2725 struct intel_sdvo_enhancements_reply enhancements)
2727 struct drm_device *dev = intel_sdvo->base.base.dev;
2728 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2729 uint16_t response, data_value[2];
2731 /* when horizontal overscan is supported, Add the left/right property */
2732 if (enhancements.overscan_h) {
2733 if (!intel_sdvo_get_value(intel_sdvo,
2734 SDVO_CMD_GET_MAX_OVERSCAN_H,
2738 if (!intel_sdvo_get_value(intel_sdvo,
2739 SDVO_CMD_GET_OVERSCAN_H,
2743 intel_sdvo_connector->max_hscan = data_value[0];
2744 intel_sdvo_connector->left_margin = data_value[0] - response;
2745 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2746 intel_sdvo_connector->left =
2747 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2748 if (!intel_sdvo_connector->left)
2751 drm_object_attach_property(&connector->base,
2752 intel_sdvo_connector->left,
2753 intel_sdvo_connector->left_margin);
2755 intel_sdvo_connector->right =
2756 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2757 if (!intel_sdvo_connector->right)
2760 drm_object_attach_property(&connector->base,
2761 intel_sdvo_connector->right,
2762 intel_sdvo_connector->right_margin);
2763 DRM_DEBUG_KMS("h_overscan: max %d, "
2764 "default %d, current %d\n",
2765 data_value[0], data_value[1], response);
2768 if (enhancements.overscan_v) {
2769 if (!intel_sdvo_get_value(intel_sdvo,
2770 SDVO_CMD_GET_MAX_OVERSCAN_V,
2774 if (!intel_sdvo_get_value(intel_sdvo,
2775 SDVO_CMD_GET_OVERSCAN_V,
2779 intel_sdvo_connector->max_vscan = data_value[0];
2780 intel_sdvo_connector->top_margin = data_value[0] - response;
2781 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2782 intel_sdvo_connector->top =
2783 drm_property_create_range(dev, 0,
2784 "top_margin", 0, data_value[0]);
2785 if (!intel_sdvo_connector->top)
2788 drm_object_attach_property(&connector->base,
2789 intel_sdvo_connector->top,
2790 intel_sdvo_connector->top_margin);
2792 intel_sdvo_connector->bottom =
2793 drm_property_create_range(dev, 0,
2794 "bottom_margin", 0, data_value[0]);
2795 if (!intel_sdvo_connector->bottom)
2798 drm_object_attach_property(&connector->base,
2799 intel_sdvo_connector->bottom,
2800 intel_sdvo_connector->bottom_margin);
2801 DRM_DEBUG_KMS("v_overscan: max %d, "
2802 "default %d, current %d\n",
2803 data_value[0], data_value[1], response);
2806 ENHANCEMENT(hpos, HPOS);
2807 ENHANCEMENT(vpos, VPOS);
2808 ENHANCEMENT(saturation, SATURATION);
2809 ENHANCEMENT(contrast, CONTRAST);
2810 ENHANCEMENT(hue, HUE);
2811 ENHANCEMENT(sharpness, SHARPNESS);
2812 ENHANCEMENT(brightness, BRIGHTNESS);
2813 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2814 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2815 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2816 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2817 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2819 if (enhancements.dot_crawl) {
2820 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2823 intel_sdvo_connector->max_dot_crawl = 1;
2824 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2825 intel_sdvo_connector->dot_crawl =
2826 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2827 if (!intel_sdvo_connector->dot_crawl)
2830 drm_object_attach_property(&connector->base,
2831 intel_sdvo_connector->dot_crawl,
2832 intel_sdvo_connector->cur_dot_crawl);
2833 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2840 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2841 struct intel_sdvo_connector *intel_sdvo_connector,
2842 struct intel_sdvo_enhancements_reply enhancements)
2844 struct drm_device *dev = intel_sdvo->base.base.dev;
2845 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2846 uint16_t response, data_value[2];
2848 ENHANCEMENT(brightness, BRIGHTNESS);
2854 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2855 struct intel_sdvo_connector *intel_sdvo_connector)
2858 struct intel_sdvo_enhancements_reply reply;
2862 BUILD_BUG_ON(sizeof(enhancements) != 2);
2864 enhancements.response = 0;
2865 intel_sdvo_get_value(intel_sdvo,
2866 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2867 &enhancements, sizeof(enhancements));
2868 if (enhancements.response == 0) {
2869 DRM_DEBUG_KMS("No enhancement is supported\n");
2873 if (IS_TV(intel_sdvo_connector))
2874 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2875 else if (IS_LVDS(intel_sdvo_connector))
2876 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2881 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2882 struct i2c_msg *msgs,
2885 struct intel_sdvo *sdvo = adapter->algo_data;
2887 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2890 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2893 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2895 struct intel_sdvo *sdvo = adapter->algo_data;
2896 return sdvo->i2c->algo->functionality(sdvo->i2c);
2899 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2900 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2901 .functionality = intel_sdvo_ddc_proxy_func
2905 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2906 struct drm_device *dev)
2908 sdvo->ddc.owner = THIS_MODULE;
2909 sdvo->ddc.class = I2C_CLASS_DDC;
2910 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2911 sdvo->ddc.dev.parent = &dev->pdev->dev;
2912 sdvo->ddc.algo_data = sdvo;
2913 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2915 return i2c_add_adapter(&sdvo->ddc) == 0;
2918 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2920 struct drm_i915_private *dev_priv = dev->dev_private;
2921 struct intel_encoder *intel_encoder;
2922 struct intel_sdvo *intel_sdvo;
2924 intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
2928 intel_sdvo->sdvo_reg = sdvo_reg;
2929 intel_sdvo->is_sdvob = is_sdvob;
2930 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2931 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2932 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2935 /* encoder type will be decided later */
2936 intel_encoder = &intel_sdvo->base;
2937 intel_encoder->type = INTEL_OUTPUT_SDVO;
2938 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2940 /* Read the regs to test if we can talk to the device */
2941 for (i = 0; i < 0x40; i++) {
2944 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2945 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2946 SDVO_NAME(intel_sdvo));
2951 intel_encoder->compute_config = intel_sdvo_compute_config;
2952 intel_encoder->disable = intel_disable_sdvo;
2953 intel_encoder->mode_set = intel_sdvo_mode_set;
2954 intel_encoder->enable = intel_enable_sdvo;
2955 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2956 intel_encoder->get_config = intel_sdvo_get_config;
2958 /* In default case sdvo lvds is false */
2959 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2962 if (intel_sdvo_output_setup(intel_sdvo,
2963 intel_sdvo->caps.output_flags) != true) {
2964 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2965 SDVO_NAME(intel_sdvo));
2966 /* Output_setup can leave behind connectors! */
2970 /* Only enable the hotplug irq if we need it, to work around noisy
2973 if (intel_sdvo->hotplug_active) {
2974 intel_encoder->hpd_pin =
2975 intel_sdvo->is_sdvob ? HPD_SDVO_B : HPD_SDVO_C;
2979 * Cloning SDVO with anything is often impossible, since the SDVO
2980 * encoder can request a special input timing mode. And even if that's
2981 * not the case we have evidence that cloning a plain unscaled mode with
2982 * VGA doesn't really work. Furthermore the cloning flags are way too
2983 * simplistic anyway to express such constraints, so just give up on
2984 * cloning for SDVO encoders.
2986 intel_sdvo->base.cloneable = false;
2988 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2990 /* Set the input timing to the screen. Assume always input 0. */
2991 if (!intel_sdvo_set_target_input(intel_sdvo))
2994 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2995 &intel_sdvo->pixel_clock_min,
2996 &intel_sdvo->pixel_clock_max))
2999 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3000 "clock range %dMHz - %dMHz, "
3001 "input 1: %c, input 2: %c, "
3002 "output 1: %c, output 2: %c\n",
3003 SDVO_NAME(intel_sdvo),
3004 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3005 intel_sdvo->caps.device_rev_id,
3006 intel_sdvo->pixel_clock_min / 1000,
3007 intel_sdvo->pixel_clock_max / 1000,
3008 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3009 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3010 /* check currently supported outputs */
3011 intel_sdvo->caps.output_flags &
3012 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3013 intel_sdvo->caps.output_flags &
3014 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3018 intel_sdvo_output_cleanup(intel_sdvo);
3021 drm_encoder_cleanup(&intel_encoder->base);
3022 i2c_del_adapter(&intel_sdvo->ddc);
3024 intel_sdvo_unselect_i2c_bus(intel_sdvo);