drivers/gpu/drm/i915/intel_panel.c

   1 /*
   2  * Copyright © 2006-2010 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  *      Chris Wilson <chris@chris-wilson.co.uk>
  29  */
  30
  31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  32
  33 #include <linux/moduleparam.h>
  34 #include "intel_drv.h"
  35
  36 #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
  37
  38 void
  39 intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
  40                        struct drm_display_mode *adjusted_mode)
  41 {
  42         adjusted_mode->hdisplay = fixed_mode->hdisplay;
  43         adjusted_mode->hsync_start = fixed_mode->hsync_start;
  44         adjusted_mode->hsync_end = fixed_mode->hsync_end;
  45         adjusted_mode->htotal = fixed_mode->htotal;
  46
  47         adjusted_mode->vdisplay = fixed_mode->vdisplay;
  48         adjusted_mode->vsync_start = fixed_mode->vsync_start;
  49         adjusted_mode->vsync_end = fixed_mode->vsync_end;
  50         adjusted_mode->vtotal = fixed_mode->vtotal;
  51
  52         adjusted_mode->clock = fixed_mode->clock;
  53
  54         drm_mode_set_crtcinfo(adjusted_mode, 0);
  55 }
  56
  57 /* adjusted_mode has been preset to be the panel's fixed mode */
  58 void
  59 intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
  60                         struct intel_crtc_config *pipe_config,
  61                         int fitting_mode)
  62 {
  63         struct drm_display_mode *mode, *adjusted_mode;
  64         int x, y, width, height;
  65
  66         mode = &pipe_config->requested_mode;
  67         adjusted_mode = &pipe_config->adjusted_mode;
  68
  69         x = y = width = height = 0;
  70
  71         /* Native modes don't need fitting */
  72         if (adjusted_mode->hdisplay == mode->hdisplay &&
  73             adjusted_mode->vdisplay == mode->vdisplay)
  74                 goto done;
  75
  76         switch (fitting_mode) {
  77         case DRM_MODE_SCALE_CENTER:
  78                 width = mode->hdisplay;
  79                 height = mode->vdisplay;
  80                 x = (adjusted_mode->hdisplay - width + 1)/2;
  81                 y = (adjusted_mode->vdisplay - height + 1)/2;
  82                 break;
  83
  84         case DRM_MODE_SCALE_ASPECT:
  85                 /* Scale but preserve the aspect ratio */
  86                 {
  87                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  88                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  89                         if (scaled_width > scaled_height) { /* pillar */
  90                                 width = scaled_height / mode->vdisplay;
  91                                 if (width & 1)
  92                                         width++;
  93                                 x = (adjusted_mode->hdisplay - width + 1) / 2;
  94                                 y = 0;
  95                                 height = adjusted_mode->vdisplay;
  96                         } else if (scaled_width < scaled_height) { /* letter */
  97                                 height = scaled_width / mode->hdisplay;
  98                                 if (height & 1)
  99                                     height++;
 100                                 y = (adjusted_mode->vdisplay - height + 1) / 2;
 101                                 x = 0;
 102                                 width = adjusted_mode->hdisplay;
 103                         } else {
 104                                 x = y = 0;
 105                                 width = adjusted_mode->hdisplay;
 106                                 height = adjusted_mode->vdisplay;
 107                         }
 108                 }
 109                 break;
 110
 111         case DRM_MODE_SCALE_FULLSCREEN:
 112                 x = y = 0;
 113                 width = adjusted_mode->hdisplay;
 114                 height = adjusted_mode->vdisplay;
 115                 break;
 116
 117         default:
 118                 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
 119                 return;
 120         }
 121
 122 done:
 123         pipe_config->pch_pfit.pos = (x << 16) | y;
 124         pipe_config->pch_pfit.size = (width << 16) | height;
 125 }
 126
 127 static void
 128 centre_horizontally(struct drm_display_mode *mode,
 129                     int width)
 130 {
 131         u32 border, sync_pos, blank_width, sync_width;
 132
 133         /* keep the hsync and hblank widths constant */
 134         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 135         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 136         sync_pos = (blank_width - sync_width + 1) / 2;
 137
 138         border = (mode->hdisplay - width + 1) / 2;
 139         border += border & 1; /* make the border even */
 140
 141         mode->crtc_hdisplay = width;
 142         mode->crtc_hblank_start = width + border;
 143         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 144
 145         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 146         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 147 }
 148
 149 static void
 150 centre_vertically(struct drm_display_mode *mode,
 151                   int height)
 152 {
 153         u32 border, sync_pos, blank_width, sync_width;
 154
 155         /* keep the vsync and vblank widths constant */
 156         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 157         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 158         sync_pos = (blank_width - sync_width + 1) / 2;
 159
 160         border = (mode->vdisplay - height + 1) / 2;
 161
 162         mode->crtc_vdisplay = height;
 163         mode->crtc_vblank_start = height + border;
 164         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 165
 166         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 167         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 168 }
 169
 170 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 171 {
 172         /*
 173          * Floating point operation is not supported. So the FACTOR
 174          * is defined, which can avoid the floating point computation
 175          * when calculating the panel ratio.
 176          */
 177 #define ACCURACY 12
 178 #define FACTOR (1 << ACCURACY)
 179         u32 ratio = source * FACTOR / target;
 180         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 181 }
 182
 183 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
 184                               struct intel_crtc_config *pipe_config,
 185                               int fitting_mode)
 186 {
 187         struct drm_device *dev = intel_crtc->base.dev;
 188         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 189         struct drm_display_mode *mode, *adjusted_mode;
 190
 191         mode = &pipe_config->requested_mode;
 192         adjusted_mode = &pipe_config->adjusted_mode;
 193
 194         /* Native modes don't need fitting */
 195         if (adjusted_mode->hdisplay == mode->hdisplay &&
 196             adjusted_mode->vdisplay == mode->vdisplay)
 197                 goto out;
 198
 199         switch (fitting_mode) {
 200         case DRM_MODE_SCALE_CENTER:
 201                 /*
 202                  * For centered modes, we have to calculate border widths &
 203                  * heights and modify the values programmed into the CRTC.
 204                  */
 205                 centre_horizontally(adjusted_mode, mode->hdisplay);
 206                 centre_vertically(adjusted_mode, mode->vdisplay);
 207                 border = LVDS_BORDER_ENABLE;
 208                 break;
 209         case DRM_MODE_SCALE_ASPECT:
 210                 /* Scale but preserve the aspect ratio */
 211                 if (INTEL_INFO(dev)->gen >= 4) {
 212                         u32 scaled_width = adjusted_mode->hdisplay *
 213                                 mode->vdisplay;
 214                         u32 scaled_height = mode->hdisplay *
 215                                 adjusted_mode->vdisplay;
 216
 217                         /* 965+ is easy, it does everything in hw */
 218                         if (scaled_width > scaled_height)
 219                                 pfit_control |= PFIT_ENABLE |
 220                                         PFIT_SCALING_PILLAR;
 221                         else if (scaled_width < scaled_height)
 222                                 pfit_control |= PFIT_ENABLE |
 223                                         PFIT_SCALING_LETTER;
 224                         else if (adjusted_mode->hdisplay != mode->hdisplay)
 225                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 226                 } else {
 227                         u32 scaled_width = adjusted_mode->hdisplay *
 228                                 mode->vdisplay;
 229                         u32 scaled_height = mode->hdisplay *
 230                                 adjusted_mode->vdisplay;
 231                         /*
 232                          * For earlier chips we have to calculate the scaling
 233                          * ratio by hand and program it into the
 234                          * PFIT_PGM_RATIO register
 235                          */
 236                         if (scaled_width > scaled_height) { /* pillar */
 237                                 centre_horizontally(adjusted_mode,
 238                                                     scaled_height /
 239                                                     mode->vdisplay);
 240
 241                                 border = LVDS_BORDER_ENABLE;
 242                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 243                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 244                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 245                                                             bits << PFIT_VERT_SCALE_SHIFT);
 246                                         pfit_control |= (PFIT_ENABLE |
 247                                                          VERT_INTERP_BILINEAR |
 248                                                          HORIZ_INTERP_BILINEAR);
 249                                 }
 250                         } else if (scaled_width < scaled_height) { /* letter */
 251                                 centre_vertically(adjusted_mode,
 252                                                   scaled_width /
 253                                                   mode->hdisplay);
 254
 255                                 border = LVDS_BORDER_ENABLE;
 256                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 257                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 258                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 259                                                             bits << PFIT_VERT_SCALE_SHIFT);
 260                                         pfit_control |= (PFIT_ENABLE |
 261                                                          VERT_INTERP_BILINEAR |
 262                                                          HORIZ_INTERP_BILINEAR);
 263                                 }
 264                         } else {
 265                                 /* Aspects match, Let hw scale both directions */
 266                                 pfit_control |= (PFIT_ENABLE |
 267                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 268                                                  VERT_INTERP_BILINEAR |
 269                                                  HORIZ_INTERP_BILINEAR);
 270                         }
 271                 }
 272                 break;
 273         case DRM_MODE_SCALE_FULLSCREEN:
 274                 /*
 275                  * Full scaling, even if it changes the aspect ratio.
 276                  * Fortunately this is all done for us in hw.
 277                  */
 278                 if (mode->vdisplay != adjusted_mode->vdisplay ||
 279                     mode->hdisplay != adjusted_mode->hdisplay) {
 280                         pfit_control |= PFIT_ENABLE;
 281                         if (INTEL_INFO(dev)->gen >= 4)
 282                                 pfit_control |= PFIT_SCALING_AUTO;
 283                         else
 284                                 pfit_control |= (VERT_AUTO_SCALE |
 285                                                  VERT_INTERP_BILINEAR |
 286                                                  HORIZ_AUTO_SCALE |
 287                                                  HORIZ_INTERP_BILINEAR);
 288                 }
 289                 break;
 290         default:
 291                 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
 292                 return;
 293         }
 294
 295         /* 965+ wants fuzzy fitting */
 296         /* FIXME: handle multiple panels by failing gracefully */
 297         if (INTEL_INFO(dev)->gen >= 4)
 298                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 299                                  PFIT_FILTER_FUZZY);
 300
 301 out:
 302         if ((pfit_control & PFIT_ENABLE) == 0) {
 303                 pfit_control = 0;
 304                 pfit_pgm_ratios = 0;
 305         }
 306
 307         /* Make sure pre-965 set dither correctly for 18bpp panels. */
 308         if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
 309                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 310
 311         pipe_config->gmch_pfit.control = pfit_control;
 312         pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
 313         pipe_config->gmch_pfit.lvds_border_bits = border;
 314 }
 315
 316 static int is_backlight_combination_mode(struct drm_device *dev)
 317 {
 318         struct drm_i915_private *dev_priv = dev->dev_private;
 319
 320         if (INTEL_INFO(dev)->gen >= 4)
 321                 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
 322
 323         if (IS_GEN2(dev))
 324                 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
 325
 326         return 0;
 327 }
 328
 329 /* XXX: query mode clock or hardware clock and program max PWM appropriately
 330  * when it's 0.
 331  */
 332 static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
 333 {
 334         struct drm_i915_private *dev_priv = dev->dev_private;
 335         u32 val;
 336
 337         WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight.lock));
 338
 339         /* Restore the CTL value if it lost, e.g. GPU reset */
 340
 341         if (HAS_PCH_SPLIT(dev_priv->dev)) {
 342                 val = I915_READ(BLC_PWM_PCH_CTL2);
 343                 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
 344                         dev_priv->regfile.saveBLC_PWM_CTL2 = val;
 345                 } else if (val == 0) {
 346                         val = dev_priv->regfile.saveBLC_PWM_CTL2;
 347                         I915_WRITE(BLC_PWM_PCH_CTL2, val);
 348                 }
 349         } else {
 350                 val = I915_READ(BLC_PWM_CTL);
 351                 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
 352                         dev_priv->regfile.saveBLC_PWM_CTL = val;
 353                         if (INTEL_INFO(dev)->gen >= 4)
 354                                 dev_priv->regfile.saveBLC_PWM_CTL2 =
 355                                         I915_READ(BLC_PWM_CTL2);
 356                 } else if (val == 0) {
 357                         val = dev_priv->regfile.saveBLC_PWM_CTL;
 358                         I915_WRITE(BLC_PWM_CTL, val);
 359                         if (INTEL_INFO(dev)->gen >= 4)
 360                                 I915_WRITE(BLC_PWM_CTL2,
 361                                            dev_priv->regfile.saveBLC_PWM_CTL2);
 362                 }
 363         }
 364
 365         return val;
 366 }
 367
 368 static u32 intel_panel_get_max_backlight(struct drm_device *dev)
 369 {
 370         u32 max;
 371
 372         max = i915_read_blc_pwm_ctl(dev);
 373
 374         if (HAS_PCH_SPLIT(dev)) {
 375                 max >>= 16;
 376         } else {
 377                 if (INTEL_INFO(dev)->gen < 4)
 378                         max >>= 17;
 379                 else
 380                         max >>= 16;
 381
 382                 if (is_backlight_combination_mode(dev))
 383                         max *= 0xff;
 384         }
 385
 386         DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
 387
 388         return max;
 389 }
 390
 391 static int i915_panel_invert_brightness;
 392 MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
 393         "(-1 force normal, 0 machine defaults, 1 force inversion), please "
 394         "report PCI device ID, subsystem vendor and subsystem device ID "
 395         "to dri-devel@lists.freedesktop.org, if your machine needs it. "
 396         "It will then be included in an upcoming module version.");
 397 module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
 398 static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
 399 {
 400         struct drm_i915_private *dev_priv = dev->dev_private;
 401
 402         if (i915_panel_invert_brightness < 0)
 403                 return val;
 404
 405         if (i915_panel_invert_brightness > 0 ||
 406             dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
 407                 u32 max = intel_panel_get_max_backlight(dev);
 408                 if (max)
 409                         return max - val;
 410         }
 411
 412         return val;
 413 }
 414
 415 static u32 intel_panel_get_backlight(struct drm_device *dev)
 416 {
 417         struct drm_i915_private *dev_priv = dev->dev_private;
 418         u32 val;
 419         unsigned long flags;
 420
 421         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 422
 423         if (HAS_PCH_SPLIT(dev)) {
 424                 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
 425         } else {
 426                 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
 427                 if (INTEL_INFO(dev)->gen < 4)
 428                         val >>= 1;
 429
 430                 if (is_backlight_combination_mode(dev)) {
 431                         u8 lbpc;
 432
 433                         pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
 434                         val *= lbpc;
 435                 }
 436         }
 437
 438         val = intel_panel_compute_brightness(dev, val);
 439
 440         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 441
 442         DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
 443         return val;
 444 }
 445
 446 static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
 447 {
 448         struct drm_i915_private *dev_priv = dev->dev_private;
 449         u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
 450         I915_WRITE(BLC_PWM_CPU_CTL, val | level);
 451 }
 452
 453 static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
 454 {
 455         struct drm_i915_private *dev_priv = dev->dev_private;
 456         u32 tmp;
 457
 458         DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
 459         level = intel_panel_compute_brightness(dev, level);
 460
 461         if (HAS_PCH_SPLIT(dev))
 462                 return intel_pch_panel_set_backlight(dev, level);
 463
 464         if (is_backlight_combination_mode(dev)) {
 465                 u32 max = intel_panel_get_max_backlight(dev);
 466                 u8 lbpc;
 467
 468                 /* we're screwed, but keep behaviour backwards compatible */
 469                 if (!max)
 470                         max = 1;
 471
 472                 lbpc = level * 0xfe / max + 1;
 473                 level /= lbpc;
 474                 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
 475         }
 476
 477         tmp = I915_READ(BLC_PWM_CTL);
 478         if (INTEL_INFO(dev)->gen < 4)
 479                 level <<= 1;
 480         tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
 481         I915_WRITE(BLC_PWM_CTL, tmp | level);
 482 }
 483
 484 /* set backlight brightness to level in range [0..max] */
 485 void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max)
 486 {
 487         struct drm_i915_private *dev_priv = dev->dev_private;
 488         u32 freq;
 489         unsigned long flags;
 490
 491         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 492
 493         freq = intel_panel_get_max_backlight(dev);
 494         if (!freq) {
 495                 /* we are screwed, bail out */
 496                 goto out;
 497         }
 498
 499         /* scale to hardware, but be careful to not overflow */
 500         if (freq < max)
 501                 level = level * freq / max;
 502         else
 503                 level = freq / max * level;
 504
 505         dev_priv->backlight.level = level;
 506         if (dev_priv->backlight.device)
 507                 dev_priv->backlight.device->props.brightness = level;
 508
 509         if (dev_priv->backlight.enabled)
 510                 intel_panel_actually_set_backlight(dev, level);
 511 out:
 512         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 513 }
 514
 515 void intel_panel_disable_backlight(struct drm_device *dev)
 516 {
 517         struct drm_i915_private *dev_priv = dev->dev_private;
 518         unsigned long flags;
 519
 520         /*
 521          * Do not disable backlight on the vgaswitcheroo path. When switching
 522          * away from i915, the other client may depend on i915 to handle the
 523          * backlight. This will leave the backlight on unnecessarily when
 524          * another client is not activated.
 525          */
 526         if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
 527                 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
 528                 return;
 529         }
 530
 531         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 532
 533         dev_priv->backlight.enabled = false;
 534         intel_panel_actually_set_backlight(dev, 0);
 535
 536         if (INTEL_INFO(dev)->gen >= 4) {
 537                 uint32_t reg, tmp;
 538
 539                 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
 540
 541                 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
 542
 543                 if (HAS_PCH_SPLIT(dev)) {
 544                         tmp = I915_READ(BLC_PWM_PCH_CTL1);
 545                         tmp &= ~BLM_PCH_PWM_ENABLE;
 546                         I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
 547                 }
 548         }
 549
 550         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 551 }
 552
 553 void intel_panel_enable_backlight(struct drm_device *dev,
 554                                   enum pipe pipe)
 555 {
 556         struct drm_i915_private *dev_priv = dev->dev_private;
 557         enum transcoder cpu_transcoder =
 558                 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
 559         unsigned long flags;
 560
 561         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 562
 563         if (dev_priv->backlight.level == 0) {
 564                 dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
 565                 if (dev_priv->backlight.device)
 566                         dev_priv->backlight.device->props.brightness =
 567                                 dev_priv->backlight.level;
 568         }
 569
 570         if (INTEL_INFO(dev)->gen >= 4) {
 571                 uint32_t reg, tmp;
 572
 573                 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
 574
 575
 576                 tmp = I915_READ(reg);
 577
 578                 /* Note that this can also get called through dpms changes. And
 579                  * we don't track the backlight dpms state, hence check whether
 580                  * we have to do anything first. */
 581                 if (tmp & BLM_PWM_ENABLE)
 582                         goto set_level;
 583
 584                 if (INTEL_INFO(dev)->num_pipes == 3)
 585                         tmp &= ~BLM_PIPE_SELECT_IVB;
 586                 else
 587                         tmp &= ~BLM_PIPE_SELECT;
 588
 589                 if (cpu_transcoder == TRANSCODER_EDP)
 590                         tmp |= BLM_TRANSCODER_EDP;
 591                 else
 592                         tmp |= BLM_PIPE(cpu_transcoder);
 593                 tmp &= ~BLM_PWM_ENABLE;
 594
 595                 I915_WRITE(reg, tmp);
 596                 POSTING_READ(reg);
 597                 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
 598
 599                 if (HAS_PCH_SPLIT(dev) &&
 600                     !(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
 601                         tmp = I915_READ(BLC_PWM_PCH_CTL1);
 602                         tmp |= BLM_PCH_PWM_ENABLE;
 603                         tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
 604                         I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
 605                 }
 606         }
 607
 608 set_level:
 609         /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
 610          * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
 611          * registers are set.
 612          */
 613         dev_priv->backlight.enabled = true;
 614         intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
 615
 616         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 617 }
 618
 619 static void intel_panel_init_backlight(struct drm_device *dev)
 620 {
 621         struct drm_i915_private *dev_priv = dev->dev_private;
 622
 623         dev_priv->backlight.level = intel_panel_get_backlight(dev);
 624         dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
 625 }
 626
 627 enum drm_connector_status
 628 intel_panel_detect(struct drm_device *dev)
 629 {
 630         struct drm_i915_private *dev_priv = dev->dev_private;
 631
 632         /* Assume that the BIOS does not lie through the OpRegion... */
 633         if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
 634                 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
 635                         connector_status_connected :
 636                         connector_status_disconnected;
 637         }
 638
 639         switch (i915_panel_ignore_lid) {
 640         case -2:
 641                 return connector_status_connected;
 642         case -1:
 643                 return connector_status_disconnected;
 644         default:
 645                 return connector_status_unknown;
 646         }
 647 }
 648
 649 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
 650 static int intel_panel_update_status(struct backlight_device *bd)
 651 {
 652         struct drm_device *dev = bl_get_data(bd);
 653         intel_panel_set_backlight(dev, bd->props.brightness,
 654                                   bd->props.max_brightness);
 655         return 0;
 656 }
 657
 658 static int intel_panel_get_brightness(struct backlight_device *bd)
 659 {
 660         struct drm_device *dev = bl_get_data(bd);
 661         return intel_panel_get_backlight(dev);
 662 }
 663
 664 static const struct backlight_ops intel_panel_bl_ops = {
 665         .update_status = intel_panel_update_status,
 666         .get_brightness = intel_panel_get_brightness,
 667 };
 668
 669 int intel_panel_setup_backlight(struct drm_connector *connector)
 670 {
 671         struct drm_device *dev = connector->dev;
 672         struct drm_i915_private *dev_priv = dev->dev_private;
 673         struct backlight_properties props;
 674         unsigned long flags;
 675
 676         intel_panel_init_backlight(dev);
 677
 678         if (WARN_ON(dev_priv->backlight.device))
 679                 return -ENODEV;
 680
 681         memset(&props, 0, sizeof(props));
 682         props.type = BACKLIGHT_RAW;
 683         props.brightness = dev_priv->backlight.level;
 684
 685         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 686         props.max_brightness = intel_panel_get_max_backlight(dev);
 687         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 688
 689         if (props.max_brightness == 0) {
 690                 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
 691                 return -ENODEV;
 692         }
 693         dev_priv->backlight.device =
 694                 backlight_device_register("intel_backlight",
 695                                           &connector->kdev, dev,
 696                                           &intel_panel_bl_ops, &props);
 697
 698         if (IS_ERR(dev_priv->backlight.device)) {
 699                 DRM_ERROR("Failed to register backlight: %ld\n",
 700                           PTR_ERR(dev_priv->backlight.device));
 701                 dev_priv->backlight.device = NULL;
 702                 return -ENODEV;
 703         }
 704         return 0;
 705 }
 706
 707 void intel_panel_destroy_backlight(struct drm_device *dev)
 708 {
 709         struct drm_i915_private *dev_priv = dev->dev_private;
 710         if (dev_priv->backlight.device) {
 711                 backlight_device_unregister(dev_priv->backlight.device);
 712                 dev_priv->backlight.device = NULL;
 713         }
 714 }
 715 #else
 716 int intel_panel_setup_backlight(struct drm_connector *connector)
 717 {
 718         intel_panel_init_backlight(connector->dev);
 719         return 0;
 720 }
 721
 722 void intel_panel_destroy_backlight(struct drm_device *dev)
 723 {
 724         return;
 725 }
 726 #endif
 727
 728 int intel_panel_init(struct intel_panel *panel,
 729                      struct drm_display_mode *fixed_mode)
 730 {
 731         panel->fixed_mode = fixed_mode;
 732
 733         return 0;
 734 }
 735
 736 void intel_panel_fini(struct intel_panel *panel)
 737 {
 738         struct intel_connector *intel_connector =
 739                 container_of(panel, struct intel_connector, panel);
 740
 741         if (panel->fixed_mode)
 742                 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
 743 }