2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
40 #include <linux/acpi.h>
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_connector {
44 struct intel_connector base;
46 struct notifier_block lid_notifier;
49 struct intel_lvds_encoder {
50 struct intel_encoder base;
55 struct intel_lvds_connector *attached_connector;
58 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
60 return container_of(encoder, struct intel_lvds_encoder, base.base);
63 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
65 return container_of(connector, struct intel_lvds_connector, base.base);
68 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
71 struct drm_device *dev = encoder->base.dev;
72 struct drm_i915_private *dev_priv = dev->dev_private;
73 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
76 tmp = I915_READ(lvds_encoder->reg);
78 if (!(tmp & LVDS_PORT_EN))
82 *pipe = PORT_TO_PIPE_CPT(tmp);
84 *pipe = PORT_TO_PIPE(tmp);
89 static void intel_lvds_get_config(struct intel_encoder *encoder,
90 struct intel_crtc_config *pipe_config)
92 struct drm_device *dev = encoder->base.dev;
93 struct drm_i915_private *dev_priv = dev->dev_private;
94 u32 lvds_reg, tmp, flags = 0;
96 if (HAS_PCH_SPLIT(dev))
101 tmp = I915_READ(lvds_reg);
102 if (tmp & LVDS_HSYNC_POLARITY)
103 flags |= DRM_MODE_FLAG_NHSYNC;
105 flags |= DRM_MODE_FLAG_PHSYNC;
106 if (tmp & LVDS_VSYNC_POLARITY)
107 flags |= DRM_MODE_FLAG_NVSYNC;
109 flags |= DRM_MODE_FLAG_PVSYNC;
111 pipe_config->adjusted_mode.flags |= flags;
113 /* gen2/3 store dither state in pfit control, needs to match */
114 if (INTEL_INFO(dev)->gen < 4) {
115 tmp = I915_READ(PFIT_CONTROL);
117 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
121 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
122 * This is an exception to the general rule that mode_set doesn't turn
125 static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
127 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
128 struct drm_device *dev = encoder->base.dev;
129 struct drm_i915_private *dev_priv = dev->dev_private;
130 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
131 struct drm_display_mode *fixed_mode =
132 lvds_encoder->attached_connector->base.panel.fixed_mode;
133 int pipe = intel_crtc->pipe;
136 temp = I915_READ(lvds_encoder->reg);
137 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
139 if (HAS_PCH_CPT(dev)) {
140 temp &= ~PORT_TRANS_SEL_MASK;
141 temp |= PORT_TRANS_SEL_CPT(pipe);
144 temp |= LVDS_PIPEB_SELECT;
146 temp &= ~LVDS_PIPEB_SELECT;
150 /* set the corresponsding LVDS_BORDER bit */
151 temp &= ~LVDS_BORDER_ENABLE;
152 temp |= intel_crtc->config.gmch_pfit.lvds_border_bits;
153 /* Set the B0-B3 data pairs corresponding to whether we're going to
154 * set the DPLLs for dual-channel mode or not.
156 if (lvds_encoder->is_dual_link)
157 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
159 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
161 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
162 * appropriately here, but we need to look more thoroughly into how
163 * panels behave in the two modes.
166 /* Set the dithering flag on LVDS as needed, note that there is no
167 * special lvds dither control bit on pch-split platforms, dithering is
168 * only controlled through the PIPECONF reg. */
169 if (INTEL_INFO(dev)->gen == 4) {
170 /* Bspec wording suggests that LVDS port dithering only exists
171 * for 18bpp panels. */
172 if (intel_crtc->config.dither &&
173 intel_crtc->config.pipe_bpp == 18)
174 temp |= LVDS_ENABLE_DITHER;
176 temp &= ~LVDS_ENABLE_DITHER;
178 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
179 if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
180 temp |= LVDS_HSYNC_POLARITY;
181 if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
182 temp |= LVDS_VSYNC_POLARITY;
184 I915_WRITE(lvds_encoder->reg, temp);
188 * Sets the power state for the panel.
190 static void intel_enable_lvds(struct intel_encoder *encoder)
192 struct drm_device *dev = encoder->base.dev;
193 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
194 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
195 struct drm_i915_private *dev_priv = dev->dev_private;
196 u32 ctl_reg, stat_reg;
198 if (HAS_PCH_SPLIT(dev)) {
199 ctl_reg = PCH_PP_CONTROL;
200 stat_reg = PCH_PP_STATUS;
202 ctl_reg = PP_CONTROL;
203 stat_reg = PP_STATUS;
206 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
208 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
209 POSTING_READ(lvds_encoder->reg);
210 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
211 DRM_ERROR("timed out waiting for panel to power on\n");
213 intel_panel_enable_backlight(dev, intel_crtc->pipe);
216 static void intel_disable_lvds(struct intel_encoder *encoder)
218 struct drm_device *dev = encoder->base.dev;
219 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
220 struct drm_i915_private *dev_priv = dev->dev_private;
221 u32 ctl_reg, stat_reg;
223 if (HAS_PCH_SPLIT(dev)) {
224 ctl_reg = PCH_PP_CONTROL;
225 stat_reg = PCH_PP_STATUS;
227 ctl_reg = PP_CONTROL;
228 stat_reg = PP_STATUS;
231 intel_panel_disable_backlight(dev);
233 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
234 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
235 DRM_ERROR("timed out waiting for panel to power off\n");
237 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
238 POSTING_READ(lvds_encoder->reg);
241 static int intel_lvds_mode_valid(struct drm_connector *connector,
242 struct drm_display_mode *mode)
244 struct intel_connector *intel_connector = to_intel_connector(connector);
245 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
247 if (mode->hdisplay > fixed_mode->hdisplay)
249 if (mode->vdisplay > fixed_mode->vdisplay)
255 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
256 struct intel_crtc_config *pipe_config)
258 struct drm_device *dev = intel_encoder->base.dev;
259 struct drm_i915_private *dev_priv = dev->dev_private;
260 struct intel_lvds_encoder *lvds_encoder =
261 to_lvds_encoder(&intel_encoder->base);
262 struct intel_connector *intel_connector =
263 &lvds_encoder->attached_connector->base;
264 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
265 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
266 unsigned int lvds_bpp;
268 /* Should never happen!! */
269 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
270 DRM_ERROR("Can't support LVDS on pipe A\n");
274 if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
280 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
281 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
282 pipe_config->pipe_bpp, lvds_bpp);
283 pipe_config->pipe_bpp = lvds_bpp;
287 * We have timings from the BIOS for the panel, put them in
288 * to the adjusted mode. The CRTC will be set up for this mode,
289 * with the panel scaling set up to source from the H/VDisplay
290 * of the original mode.
292 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
295 if (HAS_PCH_SPLIT(dev)) {
296 pipe_config->has_pch_encoder = true;
298 intel_pch_panel_fitting(intel_crtc, pipe_config,
299 intel_connector->panel.fitting_mode);
301 intel_gmch_panel_fitting(intel_crtc, pipe_config,
302 intel_connector->panel.fitting_mode);
307 * XXX: It would be nice to support lower refresh rates on the
308 * panels to reduce power consumption, and perhaps match the
309 * user's requested refresh rate.
315 static void intel_lvds_mode_set(struct drm_encoder *encoder,
316 struct drm_display_mode *mode,
317 struct drm_display_mode *adjusted_mode)
320 * The LVDS pin pair will already have been turned on in the
321 * intel_crtc_mode_set since it has a large impact on the DPLL
327 * Detect the LVDS connection.
329 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
330 * connected and closed means disconnected. We also send hotplug events as
331 * needed, using lid status notification from the input layer.
333 static enum drm_connector_status
334 intel_lvds_detect(struct drm_connector *connector, bool force)
336 struct drm_device *dev = connector->dev;
337 enum drm_connector_status status;
339 status = intel_panel_detect(dev);
340 if (status != connector_status_unknown)
343 return connector_status_connected;
347 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
349 static int intel_lvds_get_modes(struct drm_connector *connector)
351 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
352 struct drm_device *dev = connector->dev;
353 struct drm_display_mode *mode;
355 /* use cached edid if we have one */
356 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
357 return drm_add_edid_modes(connector, lvds_connector->base.edid);
359 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
363 drm_mode_probed_add(connector, mode);
367 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
369 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
373 /* The GPU hangs up on these systems if modeset is performed on LID open */
374 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
376 .callback = intel_no_modeset_on_lid_dmi_callback,
377 .ident = "Toshiba Tecra A11",
379 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
380 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
384 { } /* terminating entry */
388 * Lid events. Note the use of 'modeset':
389 * - we set it to MODESET_ON_LID_OPEN on lid close,
390 * and set it to MODESET_DONE on open
391 * - we use it as a "only once" bit (ie we ignore
392 * duplicate events where it was already properly set)
393 * - the suspend/resume paths will set it to
394 * MODESET_SUSPENDED and ignore the lid open event,
395 * because they restore the mode ("lid open").
397 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
400 struct intel_lvds_connector *lvds_connector =
401 container_of(nb, struct intel_lvds_connector, lid_notifier);
402 struct drm_connector *connector = &lvds_connector->base.base;
403 struct drm_device *dev = connector->dev;
404 struct drm_i915_private *dev_priv = dev->dev_private;
406 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
409 mutex_lock(&dev_priv->modeset_restore_lock);
410 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
413 * check and update the status of LVDS connector after receiving
414 * the LID nofication event.
416 connector->status = connector->funcs->detect(connector, false);
418 /* Don't force modeset on machines where it causes a GPU lockup */
419 if (dmi_check_system(intel_no_modeset_on_lid))
421 if (!acpi_lid_open()) {
422 /* do modeset on next lid open event */
423 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
427 if (dev_priv->modeset_restore == MODESET_DONE)
430 drm_modeset_lock_all(dev);
431 intel_modeset_setup_hw_state(dev, true);
432 drm_modeset_unlock_all(dev);
434 dev_priv->modeset_restore = MODESET_DONE;
437 mutex_unlock(&dev_priv->modeset_restore_lock);
442 * intel_lvds_destroy - unregister and free LVDS structures
443 * @connector: connector to free
445 * Unregister the DDC bus for this connector then free the driver private
448 static void intel_lvds_destroy(struct drm_connector *connector)
450 struct intel_lvds_connector *lvds_connector =
451 to_lvds_connector(connector);
453 if (lvds_connector->lid_notifier.notifier_call)
454 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
456 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
457 kfree(lvds_connector->base.edid);
459 intel_panel_fini(&lvds_connector->base.panel);
461 drm_sysfs_connector_remove(connector);
462 drm_connector_cleanup(connector);
466 static int intel_lvds_set_property(struct drm_connector *connector,
467 struct drm_property *property,
470 struct intel_connector *intel_connector = to_intel_connector(connector);
471 struct drm_device *dev = connector->dev;
473 if (property == dev->mode_config.scaling_mode_property) {
474 struct drm_crtc *crtc;
476 if (value == DRM_MODE_SCALE_NONE) {
477 DRM_DEBUG_KMS("no scaling not supported\n");
481 if (intel_connector->panel.fitting_mode == value) {
482 /* the LVDS scaling property is not changed */
485 intel_connector->panel.fitting_mode = value;
487 crtc = intel_attached_encoder(connector)->base.crtc;
488 if (crtc && crtc->enabled) {
490 * If the CRTC is enabled, the display will be changed
491 * according to the new panel fitting mode.
493 intel_crtc_restore_mode(crtc);
500 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
501 .mode_set = intel_lvds_mode_set,
504 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
505 .get_modes = intel_lvds_get_modes,
506 .mode_valid = intel_lvds_mode_valid,
507 .best_encoder = intel_best_encoder,
510 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
511 .dpms = intel_connector_dpms,
512 .detect = intel_lvds_detect,
513 .fill_modes = drm_helper_probe_single_connector_modes,
514 .set_property = intel_lvds_set_property,
515 .destroy = intel_lvds_destroy,
518 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
519 .destroy = intel_encoder_destroy,
522 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
524 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
528 /* These systems claim to have LVDS, but really don't */
529 static const struct dmi_system_id intel_no_lvds[] = {
531 .callback = intel_no_lvds_dmi_callback,
532 .ident = "Apple Mac Mini (Core series)",
534 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
535 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
539 .callback = intel_no_lvds_dmi_callback,
540 .ident = "Apple Mac Mini (Core 2 series)",
542 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
543 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
547 .callback = intel_no_lvds_dmi_callback,
548 .ident = "MSI IM-945GSE-A",
550 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
551 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
555 .callback = intel_no_lvds_dmi_callback,
556 .ident = "Dell Studio Hybrid",
558 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
559 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
563 .callback = intel_no_lvds_dmi_callback,
564 .ident = "Dell OptiPlex FX170",
566 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
567 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
571 .callback = intel_no_lvds_dmi_callback,
572 .ident = "AOpen Mini PC",
574 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
575 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
579 .callback = intel_no_lvds_dmi_callback,
580 .ident = "AOpen Mini PC MP915",
582 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
583 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
587 .callback = intel_no_lvds_dmi_callback,
588 .ident = "AOpen i915GMm-HFS",
590 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
591 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
595 .callback = intel_no_lvds_dmi_callback,
596 .ident = "AOpen i45GMx-I",
598 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
599 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
603 .callback = intel_no_lvds_dmi_callback,
604 .ident = "Aopen i945GTt-VFA",
606 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
610 .callback = intel_no_lvds_dmi_callback,
611 .ident = "Clientron U800",
613 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
614 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
618 .callback = intel_no_lvds_dmi_callback,
619 .ident = "Clientron E830",
621 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
622 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
626 .callback = intel_no_lvds_dmi_callback,
627 .ident = "Asus EeeBox PC EB1007",
629 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
630 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
634 .callback = intel_no_lvds_dmi_callback,
635 .ident = "Asus AT5NM10T-I",
637 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
638 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
642 .callback = intel_no_lvds_dmi_callback,
643 .ident = "Hewlett-Packard HP t5740",
645 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
646 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
650 .callback = intel_no_lvds_dmi_callback,
651 .ident = "Hewlett-Packard t5745",
653 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
654 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
658 .callback = intel_no_lvds_dmi_callback,
659 .ident = "Hewlett-Packard st5747",
661 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
662 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
666 .callback = intel_no_lvds_dmi_callback,
667 .ident = "MSI Wind Box DC500",
669 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
670 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
674 .callback = intel_no_lvds_dmi_callback,
675 .ident = "Gigabyte GA-D525TUD",
677 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
678 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
682 .callback = intel_no_lvds_dmi_callback,
683 .ident = "Supermicro X7SPA-H",
685 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
686 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
690 .callback = intel_no_lvds_dmi_callback,
691 .ident = "Fujitsu Esprimo Q900",
693 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
694 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
698 .callback = intel_no_lvds_dmi_callback,
699 .ident = "Intel D510MO",
701 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
702 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
706 .callback = intel_no_lvds_dmi_callback,
707 .ident = "Intel D525MW",
709 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
710 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
714 { } /* terminating entry */
718 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
720 * @connector: LVDS connector
722 * Find the reduced downclock for LVDS in EDID.
724 static void intel_find_lvds_downclock(struct drm_device *dev,
725 struct drm_display_mode *fixed_mode,
726 struct drm_connector *connector)
728 struct drm_i915_private *dev_priv = dev->dev_private;
729 struct drm_display_mode *scan;
732 temp_downclock = fixed_mode->clock;
733 list_for_each_entry(scan, &connector->probed_modes, head) {
735 * If one mode has the same resolution with the fixed_panel
736 * mode while they have the different refresh rate, it means
737 * that the reduced downclock is found for the LVDS. In such
738 * case we can set the different FPx0/1 to dynamically select
739 * between low and high frequency.
741 if (scan->hdisplay == fixed_mode->hdisplay &&
742 scan->hsync_start == fixed_mode->hsync_start &&
743 scan->hsync_end == fixed_mode->hsync_end &&
744 scan->htotal == fixed_mode->htotal &&
745 scan->vdisplay == fixed_mode->vdisplay &&
746 scan->vsync_start == fixed_mode->vsync_start &&
747 scan->vsync_end == fixed_mode->vsync_end &&
748 scan->vtotal == fixed_mode->vtotal) {
749 if (scan->clock < temp_downclock) {
751 * The downclock is already found. But we
752 * expect to find the lower downclock.
754 temp_downclock = scan->clock;
758 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
759 /* We found the downclock for LVDS. */
760 dev_priv->lvds_downclock_avail = 1;
761 dev_priv->lvds_downclock = temp_downclock;
762 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
763 "Normal clock %dKhz, downclock %dKhz\n",
764 fixed_mode->clock, temp_downclock);
769 * Enumerate the child dev array parsed from VBT to check whether
770 * the LVDS is present.
771 * If it is present, return 1.
772 * If it is not present, return false.
773 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
775 static bool lvds_is_present_in_vbt(struct drm_device *dev,
778 struct drm_i915_private *dev_priv = dev->dev_private;
781 if (!dev_priv->vbt.child_dev_num)
784 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
785 struct child_device_config *child = dev_priv->vbt.child_dev + i;
787 /* If the device type is not LFP, continue.
788 * We have to check both the new identifiers as well as the
789 * old for compatibility with some BIOSes.
791 if (child->device_type != DEVICE_TYPE_INT_LFP &&
792 child->device_type != DEVICE_TYPE_LFP)
795 if (intel_gmbus_is_port_valid(child->i2c_pin))
796 *i2c_pin = child->i2c_pin;
798 /* However, we cannot trust the BIOS writers to populate
799 * the VBT correctly. Since LVDS requires additional
800 * information from AIM blocks, a non-zero addin offset is
801 * a good indicator that the LVDS is actually present.
803 if (child->addin_offset)
806 /* But even then some BIOS writers perform some black magic
807 * and instantiate the device without reference to any
808 * additional data. Trust that if the VBT was written into
809 * the OpRegion then they have validated the LVDS's existence.
811 if (dev_priv->opregion.vbt)
818 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
820 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
824 static const struct dmi_system_id intel_dual_link_lvds[] = {
826 .callback = intel_dual_link_lvds_callback,
827 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
829 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
830 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
833 { } /* terminating entry */
836 bool intel_is_dual_link_lvds(struct drm_device *dev)
838 struct intel_encoder *encoder;
839 struct intel_lvds_encoder *lvds_encoder;
841 list_for_each_entry(encoder, &dev->mode_config.encoder_list,
843 if (encoder->type == INTEL_OUTPUT_LVDS) {
844 lvds_encoder = to_lvds_encoder(&encoder->base);
846 return lvds_encoder->is_dual_link;
853 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
855 struct drm_device *dev = lvds_encoder->base.base.dev;
857 struct drm_i915_private *dev_priv = dev->dev_private;
859 /* use the module option value if specified */
860 if (i915_lvds_channel_mode > 0)
861 return i915_lvds_channel_mode == 2;
863 if (dmi_check_system(intel_dual_link_lvds))
866 /* BIOS should set the proper LVDS register value at boot, but
867 * in reality, it doesn't set the value when the lid is closed;
868 * we need to check "the value to be set" in VBT when LVDS
869 * register is uninitialized.
871 val = I915_READ(lvds_encoder->reg);
872 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
873 val = dev_priv->vbt.bios_lvds_val;
875 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
878 static bool intel_lvds_supported(struct drm_device *dev)
880 /* With the introduction of the PCH we gained a dedicated
881 * LVDS presence pin, use it. */
882 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
885 /* Otherwise LVDS was only attached to mobile products,
886 * except for the inglorious 830gm */
887 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
894 * intel_lvds_init - setup LVDS connectors on this device
897 * Create the connector, register the LVDS DDC bus, and try to figure out what
898 * modes we can display on the LVDS panel (if present).
900 void intel_lvds_init(struct drm_device *dev)
902 struct drm_i915_private *dev_priv = dev->dev_private;
903 struct intel_lvds_encoder *lvds_encoder;
904 struct intel_encoder *intel_encoder;
905 struct intel_lvds_connector *lvds_connector;
906 struct intel_connector *intel_connector;
907 struct drm_connector *connector;
908 struct drm_encoder *encoder;
909 struct drm_display_mode *scan; /* *modes, *bios_mode; */
910 struct drm_display_mode *fixed_mode = NULL;
912 struct drm_crtc *crtc;
917 if (!intel_lvds_supported(dev))
920 /* Skip init on machines we know falsely report LVDS */
921 if (dmi_check_system(intel_no_lvds))
924 pin = GMBUS_PORT_PANEL;
925 if (!lvds_is_present_in_vbt(dev, &pin)) {
926 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
930 if (HAS_PCH_SPLIT(dev)) {
931 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
933 if (dev_priv->vbt.edp_support) {
934 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
939 lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
943 lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
944 if (!lvds_connector) {
949 lvds_encoder->attached_connector = lvds_connector;
951 intel_encoder = &lvds_encoder->base;
952 encoder = &intel_encoder->base;
953 intel_connector = &lvds_connector->base;
954 connector = &intel_connector->base;
955 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
956 DRM_MODE_CONNECTOR_LVDS);
958 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
959 DRM_MODE_ENCODER_LVDS);
961 intel_encoder->enable = intel_enable_lvds;
962 intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
963 intel_encoder->compute_config = intel_lvds_compute_config;
964 intel_encoder->disable = intel_disable_lvds;
965 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
966 intel_encoder->get_config = intel_lvds_get_config;
967 intel_connector->get_hw_state = intel_connector_get_hw_state;
969 intel_connector_attach_encoder(intel_connector, intel_encoder);
970 intel_encoder->type = INTEL_OUTPUT_LVDS;
972 intel_encoder->cloneable = false;
973 if (HAS_PCH_SPLIT(dev))
974 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
975 else if (IS_GEN4(dev))
976 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
978 intel_encoder->crtc_mask = (1 << 1);
980 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
981 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
982 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
983 connector->interlace_allowed = false;
984 connector->doublescan_allowed = false;
986 if (HAS_PCH_SPLIT(dev)) {
987 lvds_encoder->reg = PCH_LVDS;
989 lvds_encoder->reg = LVDS;
992 /* create the scaling mode property */
993 drm_mode_create_scaling_mode_property(dev);
994 drm_object_attach_property(&connector->base,
995 dev->mode_config.scaling_mode_property,
996 DRM_MODE_SCALE_ASPECT);
997 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1000 * 1) check for EDID on DDC
1001 * 2) check for VBT data
1002 * 3) check to see if LVDS is already on
1003 * if none of the above, no panel
1004 * 4) make sure lid is open
1005 * if closed, act like it's not there for now
1009 * Attempt to get the fixed panel mode from DDC. Assume that the
1010 * preferred mode is the right one.
1012 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1014 if (drm_add_edid_modes(connector, edid)) {
1015 drm_mode_connector_update_edid_property(connector,
1019 edid = ERR_PTR(-EINVAL);
1022 edid = ERR_PTR(-ENOENT);
1024 lvds_connector->base.edid = edid;
1026 if (IS_ERR_OR_NULL(edid)) {
1027 /* Didn't get an EDID, so
1028 * Set wide sync ranges so we get all modes
1029 * handed to valid_mode for checking
1031 connector->display_info.min_vfreq = 0;
1032 connector->display_info.max_vfreq = 200;
1033 connector->display_info.min_hfreq = 0;
1034 connector->display_info.max_hfreq = 200;
1037 list_for_each_entry(scan, &connector->probed_modes, head) {
1038 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1039 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1040 drm_mode_debug_printmodeline(scan);
1042 fixed_mode = drm_mode_duplicate(dev, scan);
1044 intel_find_lvds_downclock(dev, fixed_mode,
1051 /* Failed to get EDID, what about VBT? */
1052 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1053 DRM_DEBUG_KMS("using mode from VBT: ");
1054 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1056 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1058 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1064 * If we didn't get EDID, try checking if the panel is already turned
1065 * on. If so, assume that whatever is currently programmed is the
1069 /* Ironlake: FIXME if still fail, not try pipe mode now */
1070 if (HAS_PCH_SPLIT(dev))
1073 lvds = I915_READ(LVDS);
1074 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1075 crtc = intel_get_crtc_for_pipe(dev, pipe);
1077 if (crtc && (lvds & LVDS_PORT_EN)) {
1078 fixed_mode = intel_crtc_mode_get(dev, crtc);
1080 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1081 drm_mode_debug_printmodeline(fixed_mode);
1082 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1087 /* If we still don't have a mode after all that, give up. */
1092 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1093 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1094 lvds_encoder->is_dual_link ? "dual" : "single");
1097 * Unlock registers and just
1098 * leave them unlocked
1100 if (HAS_PCH_SPLIT(dev)) {
1101 I915_WRITE(PCH_PP_CONTROL,
1102 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1104 I915_WRITE(PP_CONTROL,
1105 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1107 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1108 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1109 DRM_DEBUG_KMS("lid notifier registration failed\n");
1110 lvds_connector->lid_notifier.notifier_call = NULL;
1112 drm_sysfs_connector_add(connector);
1114 intel_panel_init(&intel_connector->panel, fixed_mode);
1115 intel_panel_setup_backlight(connector);
1120 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1121 drm_connector_cleanup(connector);
1122 drm_encoder_cleanup(encoder);
1124 drm_mode_destroy(dev, fixed_mode);
1125 kfree(lvds_encoder);
1126 kfree(lvds_connector);