drivers/gpu/drm/i915/i915_sysfs.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Ben Widawsky <ben@bwidawsk.net>
  25  *
  26  */
  27
  28 #include <linux/device.h>
  29 #include <linux/module.h>
  30 #include <linux/stat.h>
  31 #include <linux/sysfs.h>
  32
  33 #include "gt/intel_gt_regs.h"
  34 #include "gt/intel_rc6.h"
  35 #include "gt/intel_rps.h"
  36 #include "gt/sysfs_engines.h"
  37
  38 #include "i915_drv.h"
  39 #include "i915_sysfs.h"
  40 #include "intel_pm.h"
  41
  42 struct drm_i915_private *kdev_minor_to_i915(struct device *kdev)
  43 {
  44         struct drm_minor *minor = dev_get_drvdata(kdev);
  45         return to_i915(minor->dev);
  46 }
  47
  48 static int l3_access_valid(struct drm_i915_private *i915, loff_t offset)
  49 {
  50         if (!HAS_L3_DPF(i915))
  51                 return -EPERM;
  52
  53         if (!IS_ALIGNED(offset, sizeof(u32)))
  54                 return -EINVAL;
  55
  56         if (offset >= GEN7_L3LOG_SIZE)
  57                 return -ENXIO;
  58
  59         return 0;
  60 }
  61
  62 static ssize_t
  63 i915_l3_read(struct file *filp, struct kobject *kobj,
  64              struct bin_attribute *attr, char *buf,
  65              loff_t offset, size_t count)
  66 {
  67         struct device *kdev = kobj_to_dev(kobj);
  68         struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
  69         int slice = (int)(uintptr_t)attr->private;
  70         int ret;
  71
  72         ret = l3_access_valid(i915, offset);
  73         if (ret)
  74                 return ret;
  75
  76         count = round_down(count, sizeof(u32));
  77         count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count);
  78         memset(buf, 0, count);
  79
  80         spin_lock(&i915->gem.contexts.lock);
  81         if (i915->l3_parity.remap_info[slice])
  82                 memcpy(buf,
  83                        i915->l3_parity.remap_info[slice] + offset / sizeof(u32),
  84                        count);
  85         spin_unlock(&i915->gem.contexts.lock);
  86
  87         return count;
  88 }
  89
  90 static ssize_t
  91 i915_l3_write(struct file *filp, struct kobject *kobj,
  92               struct bin_attribute *attr, char *buf,
  93               loff_t offset, size_t count)
  94 {
  95         struct device *kdev = kobj_to_dev(kobj);
  96         struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
  97         int slice = (int)(uintptr_t)attr->private;
  98         u32 *remap_info, *freeme = NULL;
  99         struct i915_gem_context *ctx;
 100         int ret;
 101
 102         ret = l3_access_valid(i915, offset);
 103         if (ret)
 104                 return ret;
 105
 106         if (count < sizeof(u32))
 107                 return -EINVAL;
 108
 109         remap_info = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL);
 110         if (!remap_info)
 111                 return -ENOMEM;
 112
 113         spin_lock(&i915->gem.contexts.lock);
 114
 115         if (i915->l3_parity.remap_info[slice]) {
 116                 freeme = remap_info;
 117                 remap_info = i915->l3_parity.remap_info[slice];
 118         } else {
 119                 i915->l3_parity.remap_info[slice] = remap_info;
 120         }
 121
 122         count = round_down(count, sizeof(u32));
 123         memcpy(remap_info + offset / sizeof(u32), buf, count);
 124
 125         /* NB: We defer the remapping until we switch to the context */
 126         list_for_each_entry(ctx, &i915->gem.contexts.list, link)
 127                 ctx->remap_slice |= BIT(slice);
 128
 129         spin_unlock(&i915->gem.contexts.lock);
 130         kfree(freeme);
 131
 132         /*
 133          * TODO: Ideally we really want a GPU reset here to make sure errors
 134          * aren't propagated. Since I cannot find a stable way to reset the GPU
 135          * at this point it is left as a TODO.
 136         */
 137
 138         return count;
 139 }
 140
 141 static const struct bin_attribute dpf_attrs = {
 142         .attr = {.name = "l3_parity", .mode = (S_IRUSR | S_IWUSR)},
 143         .size = GEN7_L3LOG_SIZE,
 144         .read = i915_l3_read,
 145         .write = i915_l3_write,
 146         .mmap = NULL,
 147         .private = (void *)0
 148 };
 149
 150 static const struct bin_attribute dpf_attrs_1 = {
 151         .attr = {.name = "l3_parity_slice_1", .mode = (S_IRUSR | S_IWUSR)},
 152         .size = GEN7_L3LOG_SIZE,
 153         .read = i915_l3_read,
 154         .write = i915_l3_write,
 155         .mmap = NULL,
 156         .private = (void *)1
 157 };
 158
 159 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
 160
 161 static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
 162                                 struct bin_attribute *attr, char *buf,
 163                                 loff_t off, size_t count)
 164 {
 165
 166         struct device *kdev = kobj_to_dev(kobj);
 167         struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
 168         struct i915_gpu_coredump *gpu;
 169         ssize_t ret = 0;
 170
 171         /*
 172          * FIXME: Concurrent clients triggering resets and reading + clearing
 173          * dumps can cause inconsistent sysfs reads when a user calls in with a
 174          * non-zero offset to complete a prior partial read but the
 175          * gpu_coredump has been cleared or replaced.
 176          */
 177
 178         gpu = i915_first_error_state(i915);
 179         if (IS_ERR(gpu)) {
 180                 ret = PTR_ERR(gpu);
 181         } else if (gpu) {
 182                 ret = i915_gpu_coredump_copy_to_buffer(gpu, buf, off, count);
 183                 i915_gpu_coredump_put(gpu);
 184         } else {
 185                 const char *str = "No error state collected\n";
 186                 size_t len = strlen(str);
 187
 188                 if (off < len) {
 189                         ret = min_t(size_t, count, len - off);
 190                         memcpy(buf, str + off, ret);
 191                 }
 192         }
 193
 194         return ret;
 195 }
 196
 197 static ssize_t error_state_write(struct file *file, struct kobject *kobj,
 198                                  struct bin_attribute *attr, char *buf,
 199                                  loff_t off, size_t count)
 200 {
 201         struct device *kdev = kobj_to_dev(kobj);
 202         struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
 203
 204         drm_dbg(&dev_priv->drm, "Resetting error state\n");
 205         i915_reset_error_state(dev_priv);
 206
 207         return count;
 208 }
 209
 210 static const struct bin_attribute error_state_attr = {
 211         .attr.name = "error",
 212         .attr.mode = S_IRUSR | S_IWUSR,
 213         .size = 0,
 214         .read = error_state_read,
 215         .write = error_state_write,
 216 };
 217
 218 static void i915_setup_error_capture(struct device *kdev)
 219 {
 220         if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
 221                 DRM_ERROR("error_state sysfs setup failed\n");
 222 }
 223
 224 static void i915_teardown_error_capture(struct device *kdev)
 225 {
 226         sysfs_remove_bin_file(&kdev->kobj, &error_state_attr);
 227 }
 228 #else
 229 static void i915_setup_error_capture(struct device *kdev) {}
 230 static void i915_teardown_error_capture(struct device *kdev) {}
 231 #endif
 232
 233 void i915_setup_sysfs(struct drm_i915_private *dev_priv)
 234 {
 235         struct device *kdev = dev_priv->drm.primary->kdev;
 236         int ret;
 237
 238         if (HAS_L3_DPF(dev_priv)) {
 239                 ret = device_create_bin_file(kdev, &dpf_attrs);
 240                 if (ret)
 241                         drm_err(&dev_priv->drm,
 242                                 "l3 parity sysfs setup failed\n");
 243
 244                 if (NUM_L3_SLICES(dev_priv) > 1) {
 245                         ret = device_create_bin_file(kdev,
 246                                                      &dpf_attrs_1);
 247                         if (ret)
 248                                 drm_err(&dev_priv->drm,
 249                                         "l3 parity slice 1 setup failed\n");
 250                 }
 251         }
 252
 253         dev_priv->sysfs_gt = kobject_create_and_add("gt", &kdev->kobj);
 254         if (!dev_priv->sysfs_gt)
 255                 drm_warn(&dev_priv->drm,
 256                          "failed to register GT sysfs directory\n");
 257
 258         i915_setup_error_capture(kdev);
 259
 260         intel_engines_add_sysfs(dev_priv);
 261 }
 262
 263 void i915_teardown_sysfs(struct drm_i915_private *dev_priv)
 264 {
 265         struct device *kdev = dev_priv->drm.primary->kdev;
 266
 267         i915_teardown_error_capture(kdev);
 268
 269         device_remove_bin_file(kdev,  &dpf_attrs_1);
 270         device_remove_bin_file(kdev,  &dpf_attrs);
 271
 272         kobject_put(dev_priv->sysfs_gt);
 273 }