1 // SPDX-License-Identifier: MIT
3 * Copyright © 2019 Intel Corporation
6 #include "gem/i915_gem_context.h"
7 #include "gem/i915_gem_pm.h"
10 #include "i915_trace.h"
12 #include "intel_context.h"
13 #include "intel_engine.h"
14 #include "intel_engine_pm.h"
15 #include "intel_ring.h"
17 static struct kmem_cache *slab_ce;
19 static struct intel_context *intel_context_alloc(void)
21 return kmem_cache_zalloc(slab_ce, GFP_KERNEL);
24 static void rcu_context_free(struct rcu_head *rcu)
26 struct intel_context *ce = container_of(rcu, typeof(*ce), rcu);
28 trace_intel_context_free(ce);
29 kmem_cache_free(slab_ce, ce);
32 void intel_context_free(struct intel_context *ce)
34 call_rcu(&ce->rcu, rcu_context_free);
37 struct intel_context *
38 intel_context_create(struct intel_engine_cs *engine)
40 struct intel_context *ce;
42 ce = intel_context_alloc();
44 return ERR_PTR(-ENOMEM);
46 intel_context_init(ce, engine);
47 trace_intel_context_create(ce);
51 int intel_context_alloc_state(struct intel_context *ce)
55 if (mutex_lock_interruptible(&ce->pin_mutex))
58 if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {
59 if (intel_context_is_banned(ce)) {
64 err = ce->ops->alloc(ce);
68 set_bit(CONTEXT_ALLOC_BIT, &ce->flags);
72 mutex_unlock(&ce->pin_mutex);
76 static int intel_context_active_acquire(struct intel_context *ce)
80 __i915_active_acquire(&ce->active);
82 if (intel_context_is_barrier(ce) || intel_engine_uses_guc(ce->engine))
85 /* Preallocate tracking nodes */
86 err = i915_active_acquire_preallocate_barrier(&ce->active,
89 i915_active_release(&ce->active);
94 static void intel_context_active_release(struct intel_context *ce)
96 /* Nodes preallocated in intel_context_active() */
97 i915_active_acquire_barrier(&ce->active);
98 i915_active_release(&ce->active);
101 static int __context_pin_state(struct i915_vma *vma, struct i915_gem_ww_ctx *ww)
103 unsigned int bias = i915_ggtt_pin_bias(vma) | PIN_OFFSET_BIAS;
106 err = i915_ggtt_pin(vma, ww, 0, bias | PIN_HIGH);
110 err = i915_active_acquire(&vma->active);
115 * And mark it as a globally pinned object to let the shrinker know
116 * it cannot reclaim the object until we release it.
118 i915_vma_make_unshrinkable(vma);
119 vma->obj->mm.dirty = true;
128 static void __context_unpin_state(struct i915_vma *vma)
130 i915_vma_make_shrinkable(vma);
131 i915_active_release(&vma->active);
132 __i915_vma_unpin(vma);
135 static int __ring_active(struct intel_ring *ring,
136 struct i915_gem_ww_ctx *ww)
140 err = intel_ring_pin(ring, ww);
144 err = i915_active_acquire(&ring->vma->active);
151 intel_ring_unpin(ring);
155 static void __ring_retire(struct intel_ring *ring)
157 i915_active_release(&ring->vma->active);
158 intel_ring_unpin(ring);
161 static int intel_context_pre_pin(struct intel_context *ce,
162 struct i915_gem_ww_ctx *ww)
166 CE_TRACE(ce, "active\n");
168 err = __ring_active(ce->ring, ww);
172 err = intel_timeline_pin(ce->timeline, ww);
179 err = __context_pin_state(ce->state, ww);
187 intel_timeline_unpin(ce->timeline);
189 __ring_retire(ce->ring);
193 static void intel_context_post_unpin(struct intel_context *ce)
196 __context_unpin_state(ce->state);
198 intel_timeline_unpin(ce->timeline);
199 __ring_retire(ce->ring);
202 int __intel_context_do_pin_ww(struct intel_context *ce,
203 struct i915_gem_ww_ctx *ww)
205 bool handoff = false;
209 if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, &ce->flags))) {
210 err = intel_context_alloc_state(ce);
216 * We always pin the context/ring/timeline here, to ensure a pin
217 * refcount for __intel_context_active(), which prevent a lock
218 * inversion of ce->pin_mutex vs dma_resv_lock().
221 err = i915_gem_object_lock(ce->timeline->hwsp_ggtt->obj, ww);
222 if (!err && ce->ring->vma->obj)
223 err = i915_gem_object_lock(ce->ring->vma->obj, ww);
224 if (!err && ce->state)
225 err = i915_gem_object_lock(ce->state->obj, ww);
227 err = intel_context_pre_pin(ce, ww);
231 err = i915_active_acquire(&ce->active);
235 err = ce->ops->pre_pin(ce, ww, &vaddr);
239 err = mutex_lock_interruptible(&ce->pin_mutex);
243 if (unlikely(intel_context_is_closed(ce))) {
248 if (likely(!atomic_add_unless(&ce->pin_count, 1, 0))) {
249 err = intel_context_active_acquire(ce);
253 err = ce->ops->pin(ce, vaddr);
255 intel_context_active_release(ce);
259 CE_TRACE(ce, "pin ring:{start:%08x, head:%04x, tail:%04x}\n",
260 i915_ggtt_offset(ce->ring->vma),
261 ce->ring->head, ce->ring->tail);
264 smp_mb__before_atomic(); /* flush pin before it is visible */
265 atomic_inc(&ce->pin_count);
268 GEM_BUG_ON(!intel_context_is_pinned(ce)); /* no overflow! */
270 trace_intel_context_do_pin(ce);
273 mutex_unlock(&ce->pin_mutex);
276 ce->ops->post_unpin(ce);
278 i915_active_release(&ce->active);
280 intel_context_post_unpin(ce);
283 * Unlock the hwsp_ggtt object since it's shared.
284 * In principle we can unlock all the global state locked above
285 * since it's pinned and doesn't need fencing, and will
286 * thus remain resident until it is explicitly unpinned.
288 i915_gem_ww_unlock_single(ce->timeline->hwsp_ggtt->obj);
293 int __intel_context_do_pin(struct intel_context *ce)
295 struct i915_gem_ww_ctx ww;
298 i915_gem_ww_ctx_init(&ww, true);
300 err = __intel_context_do_pin_ww(ce, &ww);
301 if (err == -EDEADLK) {
302 err = i915_gem_ww_ctx_backoff(&ww);
306 i915_gem_ww_ctx_fini(&ww);
310 void __intel_context_do_unpin(struct intel_context *ce, int sub)
312 if (!atomic_sub_and_test(sub, &ce->pin_count))
315 CE_TRACE(ce, "unpin\n");
317 ce->ops->post_unpin(ce);
320 * Once released, we may asynchronously drop the active reference.
321 * As that may be the only reference keeping the context alive,
322 * take an extra now so that it is not freed before we finish
325 intel_context_get(ce);
326 intel_context_active_release(ce);
327 trace_intel_context_do_unpin(ce);
328 intel_context_put(ce);
331 static void __intel_context_retire(struct i915_active *active)
333 struct intel_context *ce = container_of(active, typeof(*ce), active);
335 CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n",
336 intel_context_get_total_runtime_ns(ce),
337 intel_context_get_avg_runtime_ns(ce));
339 set_bit(CONTEXT_VALID_BIT, &ce->flags);
340 intel_context_post_unpin(ce);
341 intel_context_put(ce);
344 static int __intel_context_active(struct i915_active *active)
346 struct intel_context *ce = container_of(active, typeof(*ce), active);
348 intel_context_get(ce);
350 /* everything should already be activated by intel_context_pre_pin() */
351 GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->ring->vma->active));
352 __intel_ring_pin(ce->ring);
354 __intel_timeline_pin(ce->timeline);
357 GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->state->active));
358 __i915_vma_pin(ce->state);
359 i915_vma_make_unshrinkable(ce->state);
365 static int sw_fence_dummy_notify(struct i915_sw_fence *sf,
366 enum i915_sw_fence_notify state)
372 intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine)
374 GEM_BUG_ON(!engine->cops);
375 GEM_BUG_ON(!engine->gt->vm);
380 ce->ops = engine->cops;
381 ce->sseu = engine->sseu;
383 ce->ring_size = SZ_4K;
385 ewma_runtime_init(&ce->runtime.avg);
387 ce->vm = i915_vm_get(engine->gt->vm);
389 /* NB ce->signal_link/lock is used under RCU */
390 spin_lock_init(&ce->signal_lock);
391 INIT_LIST_HEAD(&ce->signals);
393 mutex_init(&ce->pin_mutex);
395 spin_lock_init(&ce->guc_state.lock);
396 INIT_LIST_HEAD(&ce->guc_state.fences);
398 spin_lock_init(&ce->guc_active.lock);
399 INIT_LIST_HEAD(&ce->guc_active.requests);
401 ce->guc_id = GUC_INVALID_LRC_ID;
402 INIT_LIST_HEAD(&ce->guc_id_link);
405 * Initialize fence to be complete as this is expected to be complete
406 * unless there is a pending schedule disable outstanding.
408 i915_sw_fence_init(&ce->guc_blocked, sw_fence_dummy_notify);
409 i915_sw_fence_commit(&ce->guc_blocked);
411 i915_active_init(&ce->active,
412 __intel_context_active, __intel_context_retire, 0);
415 void intel_context_fini(struct intel_context *ce)
418 intel_timeline_put(ce->timeline);
421 mutex_destroy(&ce->pin_mutex);
422 i915_active_fini(&ce->active);
425 void i915_context_module_exit(void)
427 kmem_cache_destroy(slab_ce);
430 int __init i915_context_module_init(void)
432 slab_ce = KMEM_CACHE(intel_context, SLAB_HWCACHE_ALIGN);
439 void intel_context_enter_engine(struct intel_context *ce)
441 intel_engine_pm_get(ce->engine);
442 intel_timeline_enter(ce->timeline);
445 void intel_context_exit_engine(struct intel_context *ce)
447 intel_timeline_exit(ce->timeline);
448 intel_engine_pm_put(ce->engine);
451 int intel_context_prepare_remote_request(struct intel_context *ce,
452 struct i915_request *rq)
454 struct intel_timeline *tl = ce->timeline;
457 /* Only suitable for use in remotely modifying this context */
458 GEM_BUG_ON(rq->context == ce);
460 if (rcu_access_pointer(rq->timeline) != tl) { /* timeline sharing! */
461 /* Queue this switch after current activity by this context. */
462 err = i915_active_fence_set(&tl->last_request, rq);
468 * Guarantee context image and the timeline remains pinned until the
469 * modifying request is retired by setting the ce activity tracker.
471 * But we only need to take one pin on the account of it. Or in other
472 * words transfer the pinned ce object to tracked active request.
474 GEM_BUG_ON(i915_active_is_idle(&ce->active));
475 return i915_active_add_request(&ce->active, rq);
478 struct i915_request *intel_context_create_request(struct intel_context *ce)
480 struct i915_gem_ww_ctx ww;
481 struct i915_request *rq;
484 i915_gem_ww_ctx_init(&ww, true);
486 err = intel_context_pin_ww(ce, &ww);
488 rq = i915_request_create(ce);
489 intel_context_unpin(ce);
490 } else if (err == -EDEADLK) {
491 err = i915_gem_ww_ctx_backoff(&ww);
499 i915_gem_ww_ctx_fini(&ww);
505 * timeline->mutex should be the inner lock, but is used as outer lock.
506 * Hack around this to shut up lockdep in selftests..
508 lockdep_unpin_lock(&ce->timeline->mutex, rq->cookie);
509 mutex_release(&ce->timeline->mutex.dep_map, _RET_IP_);
510 mutex_acquire(&ce->timeline->mutex.dep_map, SINGLE_DEPTH_NESTING, 0, _RET_IP_);
511 rq->cookie = lockdep_pin_lock(&ce->timeline->mutex);
516 struct i915_request *intel_context_find_active_request(struct intel_context *ce)
518 struct i915_request *rq, *active = NULL;
521 GEM_BUG_ON(!intel_engine_uses_guc(ce->engine));
523 spin_lock_irqsave(&ce->guc_active.lock, flags);
524 list_for_each_entry_reverse(rq, &ce->guc_active.requests,
526 if (i915_request_completed(rq))
531 spin_unlock_irqrestore(&ce->guc_active.lock, flags);
536 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
537 #include "selftest_context.c"