drivers/gpu/drm/i915/display/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28
  29 #include <linux/delay.h>
  30 #include <linux/export.h>
  31 #include <linux/i2c.h>
  32 #include <linux/slab.h>
  33
  34 #include <drm/display/drm_hdmi_helper.h>
  35 #include <drm/drm_atomic_helper.h>
  36 #include <drm/drm_crtc.h>
  37 #include <drm/drm_edid.h>
  38
  39 #include "i915_drv.h"
  40 #include "i915_reg.h"
  41 #include "intel_atomic.h"
  42 #include "intel_audio.h"
  43 #include "intel_connector.h"
  44 #include "intel_crtc.h"
  45 #include "intel_de.h"
  46 #include "intel_display_types.h"
  47 #include "intel_fifo_underrun.h"
  48 #include "intel_gmbus.h"
  49 #include "intel_hdmi.h"
  50 #include "intel_hotplug.h"
  51 #include "intel_panel.h"
  52 #include "intel_sdvo.h"
  53 #include "intel_sdvo_regs.h"
  54
  55 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  56 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  57 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  58 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  59
  60 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  61                         SDVO_TV_MASK)
  62
  63 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  64 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  65 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  66 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  67 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  68
  69
  70 static const char * const tv_format_names[] = {
  71         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  72         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  73         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  74         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  75         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  76         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  77         "SECAM_60"
  78 };
  79
  80 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  81
  82 struct intel_sdvo {
  83         struct intel_encoder base;
  84
  85         struct i2c_adapter *i2c;
  86         u8 slave_addr;
  87
  88         struct i2c_adapter ddc;
  89
  90         /* Register for the SDVO device: SDVOB or SDVOC */
  91         i915_reg_t sdvo_reg;
  92
  93         /* Active outputs controlled by this SDVO output */
  94         u16 controlled_output;
  95
  96         /*
  97          * Capabilities of the SDVO device returned by
  98          * intel_sdvo_get_capabilities()
  99          */
 100         struct intel_sdvo_caps caps;
 101
 102         u8 colorimetry_cap;
 103
 104         /* Pixel clock limitations reported by the SDVO device, in kHz */
 105         int pixel_clock_min, pixel_clock_max;
 106
 107         /*
 108         * For multiple function SDVO device,
 109         * this is for current attached outputs.
 110         */
 111         u16 attached_output;
 112
 113         /*
 114          * Hotplug activation bits for this device
 115          */
 116         u16 hotplug_active;
 117
 118         enum port port;
 119
 120         /* DDC bus used by this SDVO encoder */
 121         u8 ddc_bus;
 122
 123         /*
 124          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 125          */
 126         u8 dtd_sdvo_flags;
 127 };
 128
 129 struct intel_sdvo_connector {
 130         struct intel_connector base;
 131
 132         /* Mark the type of connector */
 133         u16 output_flag;
 134
 135         /* This contains all current supported TV format */
 136         u8 tv_format_supported[TV_FORMAT_NUM];
 137         int   format_supported_num;
 138         struct drm_property *tv_format;
 139
 140         /* add the property for the SDVO-TV */
 141         struct drm_property *left;
 142         struct drm_property *right;
 143         struct drm_property *top;
 144         struct drm_property *bottom;
 145         struct drm_property *hpos;
 146         struct drm_property *vpos;
 147         struct drm_property *contrast;
 148         struct drm_property *saturation;
 149         struct drm_property *hue;
 150         struct drm_property *sharpness;
 151         struct drm_property *flicker_filter;
 152         struct drm_property *flicker_filter_adaptive;
 153         struct drm_property *flicker_filter_2d;
 154         struct drm_property *tv_chroma_filter;
 155         struct drm_property *tv_luma_filter;
 156         struct drm_property *dot_crawl;
 157
 158         /* add the property for the SDVO-TV/LVDS */
 159         struct drm_property *brightness;
 160
 161         /* this is to get the range of margin.*/
 162         u32 max_hscan, max_vscan;
 163
 164         /**
 165          * This is set if we treat the device as HDMI, instead of DVI.
 166          */
 167         bool is_hdmi;
 168 };
 169
 170 struct intel_sdvo_connector_state {
 171         /* base.base: tv.saturation/contrast/hue/brightness */
 172         struct intel_digital_connector_state base;
 173
 174         struct {
 175                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 176                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 177                 unsigned chroma_filter, luma_filter, dot_crawl;
 178         } tv;
 179 };
 180
 181 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 182 {
 183         return container_of(encoder, struct intel_sdvo, base);
 184 }
 185
 186 static struct intel_sdvo *intel_attached_sdvo(struct intel_connector *connector)
 187 {
 188         return to_sdvo(intel_attached_encoder(connector));
 189 }
 190
 191 static struct intel_sdvo_connector *
 192 to_intel_sdvo_connector(struct drm_connector *connector)
 193 {
 194         return container_of(connector, struct intel_sdvo_connector, base.base);
 195 }
 196
 197 #define to_intel_sdvo_connector_state(conn_state) \
 198         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 199
 200 static bool
 201 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo);
 202 static bool
 203 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 204                               struct intel_sdvo_connector *intel_sdvo_connector,
 205                               int type);
 206 static bool
 207 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 208                                    struct intel_sdvo_connector *intel_sdvo_connector);
 209
 210 /*
 211  * Writes the SDVOB or SDVOC with the given value, but always writes both
 212  * SDVOB and SDVOC to work around apparent hardware issues (according to
 213  * comments in the BIOS).
 214  */
 215 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 216 {
 217         struct drm_device *dev = intel_sdvo->base.base.dev;
 218         struct drm_i915_private *dev_priv = to_i915(dev);
 219         u32 bval = val, cval = val;
 220         int i;
 221
 222         if (HAS_PCH_SPLIT(dev_priv)) {
 223                 intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 224                 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 225                 /*
 226                  * HW workaround, need to write this twice for issue
 227                  * that may result in first write getting masked.
 228                  */
 229                 if (HAS_PCH_IBX(dev_priv)) {
 230                         intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 231                         intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 232                 }
 233                 return;
 234         }
 235
 236         if (intel_sdvo->port == PORT_B)
 237                 cval = intel_de_read(dev_priv, GEN3_SDVOC);
 238         else
 239                 bval = intel_de_read(dev_priv, GEN3_SDVOB);
 240
 241         /*
 242          * Write the registers twice for luck. Sometimes,
 243          * writing them only once doesn't appear to 'stick'.
 244          * The BIOS does this too. Yay, magic
 245          */
 246         for (i = 0; i < 2; i++) {
 247                 intel_de_write(dev_priv, GEN3_SDVOB, bval);
 248                 intel_de_posting_read(dev_priv, GEN3_SDVOB);
 249
 250                 intel_de_write(dev_priv, GEN3_SDVOC, cval);
 251                 intel_de_posting_read(dev_priv, GEN3_SDVOC);
 252         }
 253 }
 254
 255 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 256 {
 257         struct i2c_msg msgs[] = {
 258                 {
 259                         .addr = intel_sdvo->slave_addr,
 260                         .flags = 0,
 261                         .len = 1,
 262                         .buf = &addr,
 263                 },
 264                 {
 265                         .addr = intel_sdvo->slave_addr,
 266                         .flags = I2C_M_RD,
 267                         .len = 1,
 268                         .buf = ch,
 269                 }
 270         };
 271         int ret;
 272
 273         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 274                 return true;
 275
 276         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 277         return false;
 278 }
 279
 280 #define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ }
 281
 282 /** Mapping of command numbers to names, for debug output */
 283 static const struct {
 284         u8 cmd;
 285         const char *name;
 286 } __packed sdvo_cmd_names[] = {
 287         SDVO_CMD_NAME_ENTRY(RESET),
 288         SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS),
 289         SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV),
 290         SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS),
 291         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS),
 292         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS),
 293         SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP),
 294         SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP),
 295         SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS),
 296         SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT),
 297         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG),
 298         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG),
 299         SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE),
 300         SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT),
 301         SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT),
 302         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1),
 303         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2),
 304         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1),
 305         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2),
 306         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1),
 307         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2),
 308         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1),
 309         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2),
 310         SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING),
 311         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1),
 312         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2),
 313         SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE),
 314         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE),
 315         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS),
 316         SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT),
 317         SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT),
 318         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS),
 319         SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT),
 320         SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT),
 321         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES),
 322         SDVO_CMD_NAME_ENTRY(GET_POWER_STATE),
 323         SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE),
 324         SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE),
 325         SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH),
 326         SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT),
 327         SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 328         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS),
 329
 330         /* Add the op code for SDVO enhancements */
 331         SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS),
 332         SDVO_CMD_NAME_ENTRY(GET_HPOS),
 333         SDVO_CMD_NAME_ENTRY(SET_HPOS),
 334         SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS),
 335         SDVO_CMD_NAME_ENTRY(GET_VPOS),
 336         SDVO_CMD_NAME_ENTRY(SET_VPOS),
 337         SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION),
 338         SDVO_CMD_NAME_ENTRY(GET_SATURATION),
 339         SDVO_CMD_NAME_ENTRY(SET_SATURATION),
 340         SDVO_CMD_NAME_ENTRY(GET_MAX_HUE),
 341         SDVO_CMD_NAME_ENTRY(GET_HUE),
 342         SDVO_CMD_NAME_ENTRY(SET_HUE),
 343         SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST),
 344         SDVO_CMD_NAME_ENTRY(GET_CONTRAST),
 345         SDVO_CMD_NAME_ENTRY(SET_CONTRAST),
 346         SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS),
 347         SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS),
 348         SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS),
 349         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H),
 350         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H),
 351         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H),
 352         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V),
 353         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V),
 354         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V),
 355         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER),
 356         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER),
 357         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER),
 358         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE),
 359         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE),
 360         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE),
 361         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D),
 362         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D),
 363         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D),
 364         SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS),
 365         SDVO_CMD_NAME_ENTRY(GET_SHARPNESS),
 366         SDVO_CMD_NAME_ENTRY(SET_SHARPNESS),
 367         SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL),
 368         SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL),
 369         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER),
 370         SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER),
 371         SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER),
 372         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER),
 373         SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER),
 374         SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER),
 375
 376         /* HDMI op code */
 377         SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE),
 378         SDVO_CMD_NAME_ENTRY(GET_ENCODE),
 379         SDVO_CMD_NAME_ENTRY(SET_ENCODE),
 380         SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI),
 381         SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI),
 382         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP),
 383         SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY),
 384         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY),
 385         SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER),
 386         SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT),
 387         SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT),
 388         SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX),
 389         SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX),
 390         SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO),
 391         SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT),
 392         SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT),
 393         SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE),
 394         SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE),
 395         SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA),
 396         SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA),
 397 };
 398
 399 #undef SDVO_CMD_NAME_ENTRY
 400
 401 static const char *sdvo_cmd_name(u8 cmd)
 402 {
 403         int i;
 404
 405         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 406                 if (cmd == sdvo_cmd_names[i].cmd)
 407                         return sdvo_cmd_names[i].name;
 408         }
 409
 410         return NULL;
 411 }
 412
 413 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 414
 415 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 416                                    const void *args, int args_len)
 417 {
 418         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 419         const char *cmd_name;
 420         int i, pos = 0;
 421         char buffer[64];
 422
 423 #define BUF_PRINT(args...) \
 424         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 425
 426         for (i = 0; i < args_len; i++) {
 427                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 428         }
 429         for (; i < 8; i++) {
 430                 BUF_PRINT("   ");
 431         }
 432
 433         cmd_name = sdvo_cmd_name(cmd);
 434         if (cmd_name)
 435                 BUF_PRINT("(%s)", cmd_name);
 436         else
 437                 BUF_PRINT("(%02X)", cmd);
 438
 439         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 440 #undef BUF_PRINT
 441
 442         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 443 }
 444
 445 static const char * const cmd_status_names[] = {
 446         [SDVO_CMD_STATUS_POWER_ON] = "Power on",
 447         [SDVO_CMD_STATUS_SUCCESS] = "Success",
 448         [SDVO_CMD_STATUS_NOTSUPP] = "Not supported",
 449         [SDVO_CMD_STATUS_INVALID_ARG] = "Invalid arg",
 450         [SDVO_CMD_STATUS_PENDING] = "Pending",
 451         [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED] = "Target not specified",
 452         [SDVO_CMD_STATUS_SCALING_NOT_SUPP] = "Scaling not supported",
 453 };
 454
 455 static const char *sdvo_cmd_status(u8 status)
 456 {
 457         if (status < ARRAY_SIZE(cmd_status_names))
 458                 return cmd_status_names[status];
 459         else
 460                 return NULL;
 461 }
 462
 463 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 464                                    const void *args, int args_len,
 465                                    bool unlocked)
 466 {
 467         u8 *buf, status;
 468         struct i2c_msg *msgs;
 469         int i, ret = true;
 470
 471         /* Would be simpler to allocate both in one go ? */
 472         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 473         if (!buf)
 474                 return false;
 475
 476         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 477         if (!msgs) {
 478                 kfree(buf);
 479                 return false;
 480         }
 481
 482         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 483
 484         for (i = 0; i < args_len; i++) {
 485                 msgs[i].addr = intel_sdvo->slave_addr;
 486                 msgs[i].flags = 0;
 487                 msgs[i].len = 2;
 488                 msgs[i].buf = buf + 2 *i;
 489                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 490                 buf[2*i + 1] = ((u8*)args)[i];
 491         }
 492         msgs[i].addr = intel_sdvo->slave_addr;
 493         msgs[i].flags = 0;
 494         msgs[i].len = 2;
 495         msgs[i].buf = buf + 2*i;
 496         buf[2*i + 0] = SDVO_I2C_OPCODE;
 497         buf[2*i + 1] = cmd;
 498
 499         /* the following two are to read the response */
 500         status = SDVO_I2C_CMD_STATUS;
 501         msgs[i+1].addr = intel_sdvo->slave_addr;
 502         msgs[i+1].flags = 0;
 503         msgs[i+1].len = 1;
 504         msgs[i+1].buf = &status;
 505
 506         msgs[i+2].addr = intel_sdvo->slave_addr;
 507         msgs[i+2].flags = I2C_M_RD;
 508         msgs[i+2].len = 1;
 509         msgs[i+2].buf = &status;
 510
 511         if (unlocked)
 512                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 513         else
 514                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 515         if (ret < 0) {
 516                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 517                 ret = false;
 518                 goto out;
 519         }
 520         if (ret != i+3) {
 521                 /* failure in I2C transfer */
 522                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 523                 ret = false;
 524         }
 525
 526 out:
 527         kfree(msgs);
 528         kfree(buf);
 529         return ret;
 530 }
 531
 532 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 533                                  const void *args, int args_len)
 534 {
 535         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 536 }
 537
 538 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 539                                      void *response, int response_len)
 540 {
 541         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 542         const char *cmd_status;
 543         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 544         u8 status;
 545         int i, pos = 0;
 546         char buffer[64];
 547
 548         buffer[0] = '\0';
 549
 550         /*
 551          * The documentation states that all commands will be
 552          * processed within 15µs, and that we need only poll
 553          * the status byte a maximum of 3 times in order for the
 554          * command to be complete.
 555          *
 556          * Check 5 times in case the hardware failed to read the docs.
 557          *
 558          * Also beware that the first response by many devices is to
 559          * reply PENDING and stall for time. TVs are notorious for
 560          * requiring longer than specified to complete their replies.
 561          * Originally (in the DDX long ago), the delay was only ever 15ms
 562          * with an additional delay of 30ms applied for TVs added later after
 563          * many experiments. To accommodate both sets of delays, we do a
 564          * sequence of slow checks if the device is falling behind and fails
 565          * to reply within 5*15µs.
 566          */
 567         if (!intel_sdvo_read_byte(intel_sdvo,
 568                                   SDVO_I2C_CMD_STATUS,
 569                                   &status))
 570                 goto log_fail;
 571
 572         while ((status == SDVO_CMD_STATUS_PENDING ||
 573                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 574                 if (retry < 10)
 575                         msleep(15);
 576                 else
 577                         udelay(15);
 578
 579                 if (!intel_sdvo_read_byte(intel_sdvo,
 580                                           SDVO_I2C_CMD_STATUS,
 581                                           &status))
 582                         goto log_fail;
 583         }
 584
 585 #define BUF_PRINT(args...) \
 586         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 587
 588         cmd_status = sdvo_cmd_status(status);
 589         if (cmd_status)
 590                 BUF_PRINT("(%s)", cmd_status);
 591         else
 592                 BUF_PRINT("(??? %d)", status);
 593
 594         if (status != SDVO_CMD_STATUS_SUCCESS)
 595                 goto log_fail;
 596
 597         /* Read the command response */
 598         for (i = 0; i < response_len; i++) {
 599                 if (!intel_sdvo_read_byte(intel_sdvo,
 600                                           SDVO_I2C_RETURN_0 + i,
 601                                           &((u8 *)response)[i]))
 602                         goto log_fail;
 603                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 604         }
 605
 606         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 607 #undef BUF_PRINT
 608
 609         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 610         return true;
 611
 612 log_fail:
 613         DRM_DEBUG_KMS("%s: R: ... failed %s\n",
 614                       SDVO_NAME(intel_sdvo), buffer);
 615         return false;
 616 }
 617
 618 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 619 {
 620         if (adjusted_mode->crtc_clock >= 100000)
 621                 return 1;
 622         else if (adjusted_mode->crtc_clock >= 50000)
 623                 return 2;
 624         else
 625                 return 4;
 626 }
 627
 628 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 629                                                 u8 ddc_bus)
 630 {
 631         /* This must be the immediately preceding write before the i2c xfer */
 632         return __intel_sdvo_write_cmd(intel_sdvo,
 633                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 634                                       &ddc_bus, 1, false);
 635 }
 636
 637 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 638 {
 639         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 640                 return false;
 641
 642         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 643 }
 644
 645 static bool
 646 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 647 {
 648         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 649                 return false;
 650
 651         return intel_sdvo_read_response(intel_sdvo, value, len);
 652 }
 653
 654 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 655 {
 656         struct intel_sdvo_set_target_input_args targets = {0};
 657         return intel_sdvo_set_value(intel_sdvo,
 658                                     SDVO_CMD_SET_TARGET_INPUT,
 659                                     &targets, sizeof(targets));
 660 }
 661
 662 /*
 663  * Return whether each input is trained.
 664  *
 665  * This function is making an assumption about the layout of the response,
 666  * which should be checked against the docs.
 667  */
 668 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 669 {
 670         struct intel_sdvo_get_trained_inputs_response response;
 671
 672         BUILD_BUG_ON(sizeof(response) != 1);
 673         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 674                                   &response, sizeof(response)))
 675                 return false;
 676
 677         *input_1 = response.input0_trained;
 678         *input_2 = response.input1_trained;
 679         return true;
 680 }
 681
 682 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 683                                           u16 outputs)
 684 {
 685         return intel_sdvo_set_value(intel_sdvo,
 686                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 687                                     &outputs, sizeof(outputs));
 688 }
 689
 690 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 691                                           u16 *outputs)
 692 {
 693         return intel_sdvo_get_value(intel_sdvo,
 694                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 695                                     outputs, sizeof(*outputs));
 696 }
 697
 698 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 699                                                int mode)
 700 {
 701         u8 state = SDVO_ENCODER_STATE_ON;
 702
 703         switch (mode) {
 704         case DRM_MODE_DPMS_ON:
 705                 state = SDVO_ENCODER_STATE_ON;
 706                 break;
 707         case DRM_MODE_DPMS_STANDBY:
 708                 state = SDVO_ENCODER_STATE_STANDBY;
 709                 break;
 710         case DRM_MODE_DPMS_SUSPEND:
 711                 state = SDVO_ENCODER_STATE_SUSPEND;
 712                 break;
 713         case DRM_MODE_DPMS_OFF:
 714                 state = SDVO_ENCODER_STATE_OFF;
 715                 break;
 716         }
 717
 718         return intel_sdvo_set_value(intel_sdvo,
 719                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 720 }
 721
 722 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 723                                                    int *clock_min,
 724                                                    int *clock_max)
 725 {
 726         struct intel_sdvo_pixel_clock_range clocks;
 727
 728         BUILD_BUG_ON(sizeof(clocks) != 4);
 729         if (!intel_sdvo_get_value(intel_sdvo,
 730                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 731                                   &clocks, sizeof(clocks)))
 732                 return false;
 733
 734         /* Convert the values from units of 10 kHz to kHz. */
 735         *clock_min = clocks.min * 10;
 736         *clock_max = clocks.max * 10;
 737         return true;
 738 }
 739
 740 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 741                                          u16 outputs)
 742 {
 743         return intel_sdvo_set_value(intel_sdvo,
 744                                     SDVO_CMD_SET_TARGET_OUTPUT,
 745                                     &outputs, sizeof(outputs));
 746 }
 747
 748 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 749                                   struct intel_sdvo_dtd *dtd)
 750 {
 751         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 752                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 753 }
 754
 755 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 756                                   struct intel_sdvo_dtd *dtd)
 757 {
 758         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 759                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 760 }
 761
 762 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 763                                          struct intel_sdvo_dtd *dtd)
 764 {
 765         return intel_sdvo_set_timing(intel_sdvo,
 766                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 767 }
 768
 769 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 770                                          struct intel_sdvo_dtd *dtd)
 771 {
 772         return intel_sdvo_set_timing(intel_sdvo,
 773                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 774 }
 775
 776 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 777                                         struct intel_sdvo_dtd *dtd)
 778 {
 779         return intel_sdvo_get_timing(intel_sdvo,
 780                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 781 }
 782
 783 static bool
 784 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 785                                          struct intel_sdvo_connector *intel_sdvo_connector,
 786                                          const struct drm_display_mode *mode)
 787 {
 788         struct intel_sdvo_preferred_input_timing_args args;
 789
 790         memset(&args, 0, sizeof(args));
 791         args.clock = mode->clock / 10;
 792         args.width = mode->hdisplay;
 793         args.height = mode->vdisplay;
 794         args.interlace = 0;
 795
 796         if (IS_LVDS(intel_sdvo_connector)) {
 797                 const struct drm_display_mode *fixed_mode =
 798                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
 799
 800                 if (fixed_mode->hdisplay != args.width ||
 801                     fixed_mode->vdisplay != args.height)
 802                         args.scaled = 1;
 803         }
 804
 805         return intel_sdvo_set_value(intel_sdvo,
 806                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 807                                     &args, sizeof(args));
 808 }
 809
 810 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 811                                                   struct intel_sdvo_dtd *dtd)
 812 {
 813         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 814         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 815         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 816                                     &dtd->part1, sizeof(dtd->part1)) &&
 817                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 818                                      &dtd->part2, sizeof(dtd->part2));
 819 }
 820
 821 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 822 {
 823         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 824 }
 825
 826 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 827                                          const struct drm_display_mode *mode)
 828 {
 829         u16 width, height;
 830         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 831         u16 h_sync_offset, v_sync_offset;
 832         int mode_clock;
 833
 834         memset(dtd, 0, sizeof(*dtd));
 835
 836         width = mode->hdisplay;
 837         height = mode->vdisplay;
 838
 839         /* do some mode translations */
 840         h_blank_len = mode->htotal - mode->hdisplay;
 841         h_sync_len = mode->hsync_end - mode->hsync_start;
 842
 843         v_blank_len = mode->vtotal - mode->vdisplay;
 844         v_sync_len = mode->vsync_end - mode->vsync_start;
 845
 846         h_sync_offset = mode->hsync_start - mode->hdisplay;
 847         v_sync_offset = mode->vsync_start - mode->vdisplay;
 848
 849         mode_clock = mode->clock;
 850         mode_clock /= 10;
 851         dtd->part1.clock = mode_clock;
 852
 853         dtd->part1.h_active = width & 0xff;
 854         dtd->part1.h_blank = h_blank_len & 0xff;
 855         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 856                 ((h_blank_len >> 8) & 0xf);
 857         dtd->part1.v_active = height & 0xff;
 858         dtd->part1.v_blank = v_blank_len & 0xff;
 859         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 860                 ((v_blank_len >> 8) & 0xf);
 861
 862         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 863         dtd->part2.h_sync_width = h_sync_len & 0xff;
 864         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 865                 (v_sync_len & 0xf);
 866         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 867                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 868                 ((v_sync_len & 0x30) >> 4);
 869
 870         dtd->part2.dtd_flags = 0x18;
 871         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 872                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 873         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 874                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 875         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 876                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 877
 878         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 879 }
 880
 881 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 882                                          const struct intel_sdvo_dtd *dtd)
 883 {
 884         struct drm_display_mode mode = {};
 885
 886         mode.hdisplay = dtd->part1.h_active;
 887         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 888         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 889         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 890         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 891         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 892         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 893         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 894
 895         mode.vdisplay = dtd->part1.v_active;
 896         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 897         mode.vsync_start = mode.vdisplay;
 898         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 899         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 900         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 901         mode.vsync_end = mode.vsync_start +
 902                 (dtd->part2.v_sync_off_width & 0xf);
 903         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 904         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 905         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 906
 907         mode.clock = dtd->part1.clock * 10;
 908
 909         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 910                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 911         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 912                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 913         else
 914                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 915         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 916                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 917         else
 918                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 919
 920         drm_mode_set_crtcinfo(&mode, 0);
 921
 922         drm_mode_copy(pmode, &mode);
 923 }
 924
 925 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 926 {
 927         struct intel_sdvo_encode encode;
 928
 929         BUILD_BUG_ON(sizeof(encode) != 2);
 930         return intel_sdvo_get_value(intel_sdvo,
 931                                   SDVO_CMD_GET_SUPP_ENCODE,
 932                                   &encode, sizeof(encode));
 933 }
 934
 935 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 936                                   u8 mode)
 937 {
 938         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 939 }
 940
 941 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 942                                        u8 mode)
 943 {
 944         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 945 }
 946
 947 static bool intel_sdvo_set_pixel_replication(struct intel_sdvo *intel_sdvo,
 948                                              u8 pixel_repeat)
 949 {
 950         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_PIXEL_REPLI,
 951                                     &pixel_repeat, 1);
 952 }
 953
 954 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
 955                                        u8 audio_state)
 956 {
 957         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT,
 958                                     &audio_state, 1);
 959 }
 960
 961 static bool intel_sdvo_get_hbuf_size(struct intel_sdvo *intel_sdvo,
 962                                      u8 *hbuf_size)
 963 {
 964         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 965                                   hbuf_size, 1))
 966                 return false;
 967
 968         /* Buffer size is 0 based, hooray! However zero means zero. */
 969         if (*hbuf_size)
 970                 (*hbuf_size)++;
 971
 972         return true;
 973 }
 974
 975 #if 0
 976 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 977 {
 978         int i, j;
 979         u8 set_buf_index[2];
 980         u8 av_split;
 981         u8 buf_size;
 982         u8 buf[48];
 983         u8 *pos;
 984
 985         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 986
 987         for (i = 0; i <= av_split; i++) {
 988                 set_buf_index[0] = i; set_buf_index[1] = 0;
 989                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 990                                      set_buf_index, 2);
 991                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 992                 intel_sdvo_read_response(encoder, &buf_size, 1);
 993
 994                 pos = buf;
 995                 for (j = 0; j <= buf_size; j += 8) {
 996                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 997                                              NULL, 0);
 998                         intel_sdvo_read_response(encoder, pos, 8);
 999                         pos += 8;
1000                 }
1001         }
1002 }
1003 #endif
1004
1005 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
1006                                        unsigned int if_index, u8 tx_rate,
1007                                        const u8 *data, unsigned int length)
1008 {
1009         u8 set_buf_index[2] = { if_index, 0 };
1010         u8 hbuf_size, tmp[8];
1011         int i;
1012
1013         if (!intel_sdvo_set_value(intel_sdvo,
1014                                   SDVO_CMD_SET_HBUF_INDEX,
1015                                   set_buf_index, 2))
1016                 return false;
1017
1018         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1019                 return false;
1020
1021         DRM_DEBUG_KMS("writing sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1022                       if_index, length, hbuf_size);
1023
1024         if (hbuf_size < length)
1025                 return false;
1026
1027         for (i = 0; i < hbuf_size; i += 8) {
1028                 memset(tmp, 0, 8);
1029                 if (i < length)
1030                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
1031
1032                 if (!intel_sdvo_set_value(intel_sdvo,
1033                                           SDVO_CMD_SET_HBUF_DATA,
1034                                           tmp, 8))
1035                         return false;
1036         }
1037
1038         return intel_sdvo_set_value(intel_sdvo,
1039                                     SDVO_CMD_SET_HBUF_TXRATE,
1040                                     &tx_rate, 1);
1041 }
1042
1043 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
1044                                          unsigned int if_index,
1045                                          u8 *data, unsigned int length)
1046 {
1047         u8 set_buf_index[2] = { if_index, 0 };
1048         u8 hbuf_size, tx_rate, av_split;
1049         int i;
1050
1051         if (!intel_sdvo_get_value(intel_sdvo,
1052                                   SDVO_CMD_GET_HBUF_AV_SPLIT,
1053                                   &av_split, 1))
1054                 return -ENXIO;
1055
1056         if (av_split < if_index)
1057                 return 0;
1058
1059         if (!intel_sdvo_set_value(intel_sdvo,
1060                                   SDVO_CMD_SET_HBUF_INDEX,
1061                                   set_buf_index, 2))
1062                 return -ENXIO;
1063
1064         if (!intel_sdvo_get_value(intel_sdvo,
1065                                   SDVO_CMD_GET_HBUF_TXRATE,
1066                                   &tx_rate, 1))
1067                 return -ENXIO;
1068
1069         /* TX_DISABLED doesn't mean disabled for ELD */
1070         if (if_index != SDVO_HBUF_INDEX_ELD && tx_rate == SDVO_HBUF_TX_DISABLED)
1071                 return 0;
1072
1073         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1074                 return false;
1075
1076         DRM_DEBUG_KMS("reading sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1077                       if_index, length, hbuf_size);
1078
1079         hbuf_size = min_t(unsigned int, length, hbuf_size);
1080
1081         for (i = 0; i < hbuf_size; i += 8) {
1082                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0))
1083                         return -ENXIO;
1084                 if (!intel_sdvo_read_response(intel_sdvo, &data[i],
1085                                               min_t(unsigned int, 8, hbuf_size - i)))
1086                         return -ENXIO;
1087         }
1088
1089         return hbuf_size;
1090 }
1091
1092 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
1093                                              struct intel_crtc_state *crtc_state,
1094                                              struct drm_connector_state *conn_state)
1095 {
1096         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1097         struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
1098         const struct drm_display_mode *adjusted_mode =
1099                 &crtc_state->hw.adjusted_mode;
1100         int ret;
1101
1102         if (!crtc_state->has_hdmi_sink)
1103                 return true;
1104
1105         crtc_state->infoframes.enable |=
1106                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1107
1108         ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
1109                                                        conn_state->connector,
1110                                                        adjusted_mode);
1111         if (ret)
1112                 return false;
1113
1114         drm_hdmi_avi_infoframe_quant_range(frame,
1115                                            conn_state->connector,
1116                                            adjusted_mode,
1117                                            crtc_state->limited_color_range ?
1118                                            HDMI_QUANTIZATION_RANGE_LIMITED :
1119                                            HDMI_QUANTIZATION_RANGE_FULL);
1120
1121         ret = hdmi_avi_infoframe_check(frame);
1122         if (drm_WARN_ON(&dev_priv->drm, ret))
1123                 return false;
1124
1125         return true;
1126 }
1127
1128 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1129                                          const struct intel_crtc_state *crtc_state)
1130 {
1131         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1132         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1133         const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1134         ssize_t len;
1135
1136         if ((crtc_state->infoframes.enable &
1137              intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
1138                 return true;
1139
1140         if (drm_WARN_ON(&dev_priv->drm,
1141                         frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
1142                 return false;
1143
1144         len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
1145         if (drm_WARN_ON(&dev_priv->drm, len < 0))
1146                 return false;
1147
1148         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1149                                           SDVO_HBUF_TX_VSYNC,
1150                                           sdvo_data, len);
1151 }
1152
1153 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
1154                                          struct intel_crtc_state *crtc_state)
1155 {
1156         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1157         union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1158         ssize_t len;
1159         int ret;
1160
1161         if (!crtc_state->has_hdmi_sink)
1162                 return;
1163
1164         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1165                                         sdvo_data, sizeof(sdvo_data));
1166         if (len < 0) {
1167                 DRM_DEBUG_KMS("failed to read AVI infoframe\n");
1168                 return;
1169         } else if (len == 0) {
1170                 return;
1171         }
1172
1173         crtc_state->infoframes.enable |=
1174                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1175
1176         ret = hdmi_infoframe_unpack(frame, sdvo_data, len);
1177         if (ret) {
1178                 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n");
1179                 return;
1180         }
1181
1182         if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
1183                 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1184                               frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
1185 }
1186
1187 static void intel_sdvo_get_eld(struct intel_sdvo *intel_sdvo,
1188                                struct intel_crtc_state *crtc_state)
1189 {
1190         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
1191         ssize_t len;
1192         u8 val;
1193
1194         if (!crtc_state->has_audio)
1195                 return;
1196
1197         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT, &val, 1))
1198                 return;
1199
1200         if ((val & SDVO_AUDIO_ELD_VALID) == 0)
1201                 return;
1202
1203         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1204                                         crtc_state->eld, sizeof(crtc_state->eld));
1205         if (len < 0)
1206                 drm_dbg_kms(&i915->drm, "failed to read ELD\n");
1207 }
1208
1209 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1210                                      const struct drm_connector_state *conn_state)
1211 {
1212         struct intel_sdvo_tv_format format;
1213         u32 format_map;
1214
1215         format_map = 1 << conn_state->tv.mode;
1216         memset(&format, 0, sizeof(format));
1217         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1218
1219         BUILD_BUG_ON(sizeof(format) != 6);
1220         return intel_sdvo_set_value(intel_sdvo,
1221                                     SDVO_CMD_SET_TV_FORMAT,
1222                                     &format, sizeof(format));
1223 }
1224
1225 static bool
1226 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1227                                         const struct drm_display_mode *mode)
1228 {
1229         struct intel_sdvo_dtd output_dtd;
1230
1231         if (!intel_sdvo_set_target_output(intel_sdvo,
1232                                           intel_sdvo->attached_output))
1233                 return false;
1234
1235         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1236         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1237                 return false;
1238
1239         return true;
1240 }
1241
1242 /*
1243  * Asks the sdvo controller for the preferred input mode given the output mode.
1244  * Unfortunately we have to set up the full output mode to do that.
1245  */
1246 static bool
1247 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1248                                     struct intel_sdvo_connector *intel_sdvo_connector,
1249                                     const struct drm_display_mode *mode,
1250                                     struct drm_display_mode *adjusted_mode)
1251 {
1252         struct intel_sdvo_dtd input_dtd;
1253
1254         /* Reset the input timing to the screen. Assume always input 0. */
1255         if (!intel_sdvo_set_target_input(intel_sdvo))
1256                 return false;
1257
1258         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1259                                                       intel_sdvo_connector,
1260                                                       mode))
1261                 return false;
1262
1263         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1264                                                    &input_dtd))
1265                 return false;
1266
1267         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1268         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1269
1270         return true;
1271 }
1272
1273 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1274 {
1275         struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev);
1276         unsigned dotclock = pipe_config->port_clock;
1277         struct dpll *clock = &pipe_config->dpll;
1278
1279         /*
1280          * SDVO TV has fixed PLL values depend on its clock range,
1281          * this mirrors vbios setting.
1282          */
1283         if (dotclock >= 100000 && dotclock < 140500) {
1284                 clock->p1 = 2;
1285                 clock->p2 = 10;
1286                 clock->n = 3;
1287                 clock->m1 = 16;
1288                 clock->m2 = 8;
1289         } else if (dotclock >= 140500 && dotclock <= 200000) {
1290                 clock->p1 = 1;
1291                 clock->p2 = 10;
1292                 clock->n = 6;
1293                 clock->m1 = 12;
1294                 clock->m2 = 8;
1295         } else {
1296                 drm_WARN(&dev_priv->drm, 1,
1297                          "SDVO TV clock out of range: %i\n", dotclock);
1298         }
1299
1300         pipe_config->clock_set = true;
1301 }
1302
1303 static bool intel_has_hdmi_sink(struct intel_sdvo_connector *intel_sdvo_connector,
1304                                 const struct drm_connector_state *conn_state)
1305 {
1306         struct drm_connector *connector = conn_state->connector;
1307
1308         return intel_sdvo_connector->is_hdmi &&
1309                 connector->display_info.is_hdmi &&
1310                 READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
1311 }
1312
1313 static bool intel_sdvo_limited_color_range(struct intel_encoder *encoder,
1314                                            const struct intel_crtc_state *crtc_state,
1315                                            const struct drm_connector_state *conn_state)
1316 {
1317         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1318
1319         if ((intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220) == 0)
1320                 return false;
1321
1322         return intel_hdmi_limited_color_range(crtc_state, conn_state);
1323 }
1324
1325 static bool intel_sdvo_has_audio(struct intel_encoder *encoder,
1326                                  const struct intel_crtc_state *crtc_state,
1327                                  const struct drm_connector_state *conn_state)
1328 {
1329         struct drm_connector *connector = conn_state->connector;
1330         struct intel_sdvo_connector *intel_sdvo_connector =
1331                 to_intel_sdvo_connector(connector);
1332         const struct intel_digital_connector_state *intel_conn_state =
1333                 to_intel_digital_connector_state(conn_state);
1334
1335         if (!crtc_state->has_hdmi_sink)
1336                 return false;
1337
1338         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
1339                 return intel_sdvo_connector->is_hdmi &&
1340                         connector->display_info.has_audio;
1341         else
1342                 return intel_conn_state->force_audio == HDMI_AUDIO_ON;
1343 }
1344
1345 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1346                                      struct intel_crtc_state *pipe_config,
1347                                      struct drm_connector_state *conn_state)
1348 {
1349         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1350         struct intel_sdvo_connector *intel_sdvo_connector =
1351                 to_intel_sdvo_connector(conn_state->connector);
1352         struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
1353         struct drm_display_mode *mode = &pipe_config->hw.mode;
1354
1355         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1356         pipe_config->pipe_bpp = 8*3;
1357         pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
1358         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1359
1360         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1361                 pipe_config->has_pch_encoder = true;
1362
1363         /*
1364          * We need to construct preferred input timings based on our
1365          * output timings.  To do that, we have to set the output
1366          * timings, even though this isn't really the right place in
1367          * the sequence to do it. Oh well.
1368          */
1369         if (IS_TV(intel_sdvo_connector)) {
1370                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1371                         return -EINVAL;
1372
1373                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1374                                                            intel_sdvo_connector,
1375                                                            mode,
1376                                                            adjusted_mode);
1377                 pipe_config->sdvo_tv_clock = true;
1378         } else if (IS_LVDS(intel_sdvo_connector)) {
1379                 const struct drm_display_mode *fixed_mode =
1380                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1381                 int ret;
1382
1383                 ret = intel_panel_compute_config(&intel_sdvo_connector->base,
1384                                                  adjusted_mode);
1385                 if (ret)
1386                         return ret;
1387
1388                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, fixed_mode))
1389                         return -EINVAL;
1390
1391                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1392                                                            intel_sdvo_connector,
1393                                                            mode,
1394                                                            adjusted_mode);
1395         }
1396
1397         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1398                 return -EINVAL;
1399
1400         /*
1401          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1402          * SDVO device will factor out the multiplier during mode_set.
1403          */
1404         pipe_config->pixel_multiplier =
1405                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1406
1407         pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, conn_state);
1408
1409         pipe_config->has_audio =
1410                 intel_sdvo_has_audio(encoder, pipe_config, conn_state) &&
1411                 intel_audio_compute_config(encoder, pipe_config, conn_state);
1412
1413         pipe_config->limited_color_range =
1414                 intel_sdvo_limited_color_range(encoder, pipe_config,
1415                                                conn_state);
1416
1417         /* Clock computation needs to happen after pixel multiplier. */
1418         if (IS_TV(intel_sdvo_connector))
1419                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1420
1421         if (conn_state->picture_aspect_ratio)
1422                 adjusted_mode->picture_aspect_ratio =
1423                         conn_state->picture_aspect_ratio;
1424
1425         if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
1426                                               pipe_config, conn_state)) {
1427                 DRM_DEBUG_KMS("bad AVI infoframe\n");
1428                 return -EINVAL;
1429         }
1430
1431         return 0;
1432 }
1433
1434 #define UPDATE_PROPERTY(input, NAME) \
1435         do { \
1436                 val = input; \
1437                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1438         } while (0)
1439
1440 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1441                                     const struct intel_sdvo_connector_state *sdvo_state)
1442 {
1443         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1444         struct intel_sdvo_connector *intel_sdvo_conn =
1445                 to_intel_sdvo_connector(conn_state->connector);
1446         u16 val;
1447
1448         if (intel_sdvo_conn->left)
1449                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1450
1451         if (intel_sdvo_conn->top)
1452                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1453
1454         if (intel_sdvo_conn->hpos)
1455                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1456
1457         if (intel_sdvo_conn->vpos)
1458                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1459
1460         if (intel_sdvo_conn->saturation)
1461                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1462
1463         if (intel_sdvo_conn->contrast)
1464                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1465
1466         if (intel_sdvo_conn->hue)
1467                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1468
1469         if (intel_sdvo_conn->brightness)
1470                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1471
1472         if (intel_sdvo_conn->sharpness)
1473                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1474
1475         if (intel_sdvo_conn->flicker_filter)
1476                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1477
1478         if (intel_sdvo_conn->flicker_filter_2d)
1479                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1480
1481         if (intel_sdvo_conn->flicker_filter_adaptive)
1482                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1483
1484         if (intel_sdvo_conn->tv_chroma_filter)
1485                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1486
1487         if (intel_sdvo_conn->tv_luma_filter)
1488                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1489
1490         if (intel_sdvo_conn->dot_crawl)
1491                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1492
1493 #undef UPDATE_PROPERTY
1494 }
1495
1496 static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
1497                                   struct intel_encoder *intel_encoder,
1498                                   const struct intel_crtc_state *crtc_state,
1499                                   const struct drm_connector_state *conn_state)
1500 {
1501         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1502         struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
1503         const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
1504         const struct intel_sdvo_connector_state *sdvo_state =
1505                 to_intel_sdvo_connector_state(conn_state);
1506         struct intel_sdvo_connector *intel_sdvo_connector =
1507                 to_intel_sdvo_connector(conn_state->connector);
1508         const struct drm_display_mode *mode = &crtc_state->hw.mode;
1509         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1510         u32 sdvox;
1511         struct intel_sdvo_in_out_map in_out;
1512         struct intel_sdvo_dtd input_dtd, output_dtd;
1513         int rate;
1514
1515         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1516
1517         /*
1518          * First, set the input mapping for the first input to our controlled
1519          * output. This is only correct if we're a single-input device, in
1520          * which case the first input is the output from the appropriate SDVO
1521          * channel on the motherboard.  In a two-input device, the first input
1522          * will be SDVOB and the second SDVOC.
1523          */
1524         in_out.in0 = intel_sdvo->attached_output;
1525         in_out.in1 = 0;
1526
1527         intel_sdvo_set_value(intel_sdvo,
1528                              SDVO_CMD_SET_IN_OUT_MAP,
1529                              &in_out, sizeof(in_out));
1530
1531         /* Set the output timings to the screen */
1532         if (!intel_sdvo_set_target_output(intel_sdvo,
1533                                           intel_sdvo->attached_output))
1534                 return;
1535
1536         /* lvds has a special fixed output timing. */
1537         if (IS_LVDS(intel_sdvo_connector)) {
1538                 const struct drm_display_mode *fixed_mode =
1539                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1540
1541                 intel_sdvo_get_dtd_from_mode(&output_dtd, fixed_mode);
1542         } else {
1543                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1544         }
1545         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1546                 drm_info(&dev_priv->drm,
1547                          "Setting output timings on %s failed\n",
1548                          SDVO_NAME(intel_sdvo));
1549
1550         /* Set the input timing to the screen. Assume always input 0. */
1551         if (!intel_sdvo_set_target_input(intel_sdvo))
1552                 return;
1553
1554         if (crtc_state->has_hdmi_sink) {
1555                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1556                 intel_sdvo_set_colorimetry(intel_sdvo,
1557                                            crtc_state->limited_color_range ?
1558                                            SDVO_COLORIMETRY_RGB220 :
1559                                            SDVO_COLORIMETRY_RGB256);
1560                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1561                 intel_sdvo_set_pixel_replication(intel_sdvo,
1562                                                  !!(adjusted_mode->flags &
1563                                                     DRM_MODE_FLAG_DBLCLK));
1564         } else
1565                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1566
1567         if (IS_TV(intel_sdvo_connector) &&
1568             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1569                 return;
1570
1571         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1572
1573         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1574                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1575         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1576                 drm_info(&dev_priv->drm,
1577                          "Setting input timings on %s failed\n",
1578                          SDVO_NAME(intel_sdvo));
1579
1580         switch (crtc_state->pixel_multiplier) {
1581         default:
1582                 drm_WARN(&dev_priv->drm, 1,
1583                          "unknown pixel multiplier specified\n");
1584                 fallthrough;
1585         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1586         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1587         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1588         }
1589         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1590                 return;
1591
1592         /* Set the SDVO control regs. */
1593         if (DISPLAY_VER(dev_priv) >= 4) {
1594                 /* The real mode polarity is set by the SDVO commands, using
1595                  * struct intel_sdvo_dtd. */
1596                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1597                 if (DISPLAY_VER(dev_priv) < 5)
1598                         sdvox |= SDVO_BORDER_ENABLE;
1599         } else {
1600                 sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1601                 if (intel_sdvo->port == PORT_B)
1602                         sdvox &= SDVOB_PRESERVE_MASK;
1603                 else
1604                         sdvox &= SDVOC_PRESERVE_MASK;
1605                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1606         }
1607
1608         if (HAS_PCH_CPT(dev_priv))
1609                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1610         else
1611                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1612
1613         if (DISPLAY_VER(dev_priv) >= 4) {
1614                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1615         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1616                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1617                 /* done in crtc_mode_set as it lives inside the dpll register */
1618         } else {
1619                 sdvox |= (crtc_state->pixel_multiplier - 1)
1620                         << SDVO_PORT_MULTIPLY_SHIFT;
1621         }
1622
1623         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1624             DISPLAY_VER(dev_priv) < 5)
1625                 sdvox |= SDVO_STALL_SELECT;
1626         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1627 }
1628
1629 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1630 {
1631         struct intel_sdvo_connector *intel_sdvo_connector =
1632                 to_intel_sdvo_connector(&connector->base);
1633         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1634         u16 active_outputs = 0;
1635
1636         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1637
1638         return active_outputs & intel_sdvo_connector->output_flag;
1639 }
1640
1641 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1642                              i915_reg_t sdvo_reg, enum pipe *pipe)
1643 {
1644         u32 val;
1645
1646         val = intel_de_read(dev_priv, sdvo_reg);
1647
1648         /* asserts want to know the pipe even if the port is disabled */
1649         if (HAS_PCH_CPT(dev_priv))
1650                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1651         else if (IS_CHERRYVIEW(dev_priv))
1652                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1653         else
1654                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1655
1656         return val & SDVO_ENABLE;
1657 }
1658
1659 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1660                                     enum pipe *pipe)
1661 {
1662         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1663         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1664         u16 active_outputs = 0;
1665         bool ret;
1666
1667         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1668
1669         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1670
1671         return ret || active_outputs;
1672 }
1673
1674 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1675                                   struct intel_crtc_state *pipe_config)
1676 {
1677         struct drm_device *dev = encoder->base.dev;
1678         struct drm_i915_private *dev_priv = to_i915(dev);
1679         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1680         struct intel_sdvo_dtd dtd;
1681         int encoder_pixel_multiplier = 0;
1682         int dotclock;
1683         u32 flags = 0, sdvox;
1684         u8 val;
1685         bool ret;
1686
1687         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1688
1689         sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1690
1691         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1692         if (!ret) {
1693                 /*
1694                  * Some sdvo encoders are not spec compliant and don't
1695                  * implement the mandatory get_timings function.
1696                  */
1697                 drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n");
1698                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1699         } else {
1700                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1701                         flags |= DRM_MODE_FLAG_PHSYNC;
1702                 else
1703                         flags |= DRM_MODE_FLAG_NHSYNC;
1704
1705                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1706                         flags |= DRM_MODE_FLAG_PVSYNC;
1707                 else
1708                         flags |= DRM_MODE_FLAG_NVSYNC;
1709         }
1710
1711         pipe_config->hw.adjusted_mode.flags |= flags;
1712
1713         /*
1714          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1715          * the sdvo port register, on all other platforms it is part of the dpll
1716          * state. Since the general pipe state readout happens before the
1717          * encoder->get_config we so already have a valid pixel multplier on all
1718          * other platfroms.
1719          */
1720         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1721                 pipe_config->pixel_multiplier =
1722                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1723                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1724         }
1725
1726         dotclock = pipe_config->port_clock;
1727
1728         if (pipe_config->pixel_multiplier)
1729                 dotclock /= pipe_config->pixel_multiplier;
1730
1731         pipe_config->hw.adjusted_mode.crtc_clock = dotclock;
1732
1733         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1734         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1735                                  &val, 1)) {
1736                 switch (val) {
1737                 case SDVO_CLOCK_RATE_MULT_1X:
1738                         encoder_pixel_multiplier = 1;
1739                         break;
1740                 case SDVO_CLOCK_RATE_MULT_2X:
1741                         encoder_pixel_multiplier = 2;
1742                         break;
1743                 case SDVO_CLOCK_RATE_MULT_4X:
1744                         encoder_pixel_multiplier = 4;
1745                         break;
1746                 }
1747         }
1748
1749         drm_WARN(dev,
1750                  encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1751                  "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1752                  pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1753
1754         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY,
1755                                  &val, 1)) {
1756                 if (val == SDVO_COLORIMETRY_RGB220)
1757                         pipe_config->limited_color_range = true;
1758         }
1759
1760         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
1761                                  &val, 1)) {
1762                 if (val & SDVO_AUDIO_PRESENCE_DETECT)
1763                         pipe_config->has_audio = true;
1764         }
1765
1766         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1767                                  &val, 1)) {
1768                 if (val == SDVO_ENCODE_HDMI)
1769                         pipe_config->has_hdmi_sink = true;
1770         }
1771
1772         intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
1773
1774         intel_sdvo_get_eld(intel_sdvo, pipe_config);
1775 }
1776
1777 static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo)
1778 {
1779         intel_sdvo_set_audio_state(intel_sdvo, 0);
1780 }
1781
1782 static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo,
1783                                     const struct intel_crtc_state *crtc_state,
1784                                     const struct drm_connector_state *conn_state)
1785 {
1786         const u8 *eld = crtc_state->eld;
1787
1788         intel_sdvo_set_audio_state(intel_sdvo, 0);
1789
1790         intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1791                                    SDVO_HBUF_TX_DISABLED,
1792                                    eld, drm_eld_size(eld));
1793
1794         intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID |
1795                                    SDVO_AUDIO_PRESENCE_DETECT);
1796 }
1797
1798 static void intel_disable_sdvo(struct intel_atomic_state *state,
1799                                struct intel_encoder *encoder,
1800                                const struct intel_crtc_state *old_crtc_state,
1801                                const struct drm_connector_state *conn_state)
1802 {
1803         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1804         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1805         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
1806         u32 temp;
1807
1808         if (old_crtc_state->has_audio)
1809                 intel_sdvo_disable_audio(intel_sdvo);
1810
1811         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1812         if (0)
1813                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1814                                                    DRM_MODE_DPMS_OFF);
1815
1816         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1817
1818         temp &= ~SDVO_ENABLE;
1819         intel_sdvo_write_sdvox(intel_sdvo, temp);
1820
1821         /*
1822          * HW workaround for IBX, we need to move the port
1823          * to transcoder A after disabling it to allow the
1824          * matching DP port to be enabled on transcoder A.
1825          */
1826         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1827                 /*
1828                  * We get CPU/PCH FIFO underruns on the other pipe when
1829                  * doing the workaround. Sweep them under the rug.
1830                  */
1831                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1832                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1833
1834                 temp &= ~SDVO_PIPE_SEL_MASK;
1835                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1836                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1837
1838                 temp &= ~SDVO_ENABLE;
1839                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1840
1841                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1842                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1843                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1844         }
1845 }
1846
1847 static void pch_disable_sdvo(struct intel_atomic_state *state,
1848                              struct intel_encoder *encoder,
1849                              const struct intel_crtc_state *old_crtc_state,
1850                              const struct drm_connector_state *old_conn_state)
1851 {
1852 }
1853
1854 static void pch_post_disable_sdvo(struct intel_atomic_state *state,
1855                                   struct intel_encoder *encoder,
1856                                   const struct intel_crtc_state *old_crtc_state,
1857                                   const struct drm_connector_state *old_conn_state)
1858 {
1859         intel_disable_sdvo(state, encoder, old_crtc_state, old_conn_state);
1860 }
1861
1862 static void intel_enable_sdvo(struct intel_atomic_state *state,
1863                               struct intel_encoder *encoder,
1864                               const struct intel_crtc_state *pipe_config,
1865                               const struct drm_connector_state *conn_state)
1866 {
1867         struct drm_device *dev = encoder->base.dev;
1868         struct drm_i915_private *dev_priv = to_i915(dev);
1869         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1870         struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
1871         u32 temp;
1872         bool input1, input2;
1873         int i;
1874         bool success;
1875
1876         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1877         temp |= SDVO_ENABLE;
1878         intel_sdvo_write_sdvox(intel_sdvo, temp);
1879
1880         for (i = 0; i < 2; i++)
1881                 intel_crtc_wait_for_next_vblank(crtc);
1882
1883         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1884         /*
1885          * Warn if the device reported failure to sync.
1886          *
1887          * A lot of SDVO devices fail to notify of sync, but it's
1888          * a given it the status is a success, we succeeded.
1889          */
1890         if (success && !input1) {
1891                 drm_dbg_kms(&dev_priv->drm,
1892                             "First %s output reported failure to "
1893                             "sync\n", SDVO_NAME(intel_sdvo));
1894         }
1895
1896         if (0)
1897                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1898                                                    DRM_MODE_DPMS_ON);
1899         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1900
1901         if (pipe_config->has_audio)
1902                 intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state);
1903 }
1904
1905 static enum drm_mode_status
1906 intel_sdvo_mode_valid(struct drm_connector *connector,
1907                       struct drm_display_mode *mode)
1908 {
1909         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
1910         struct intel_sdvo_connector *intel_sdvo_connector =
1911                 to_intel_sdvo_connector(connector);
1912         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1913         bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, connector->state);
1914         int clock = mode->clock;
1915
1916         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1917                 return MODE_NO_DBLESCAN;
1918
1919         if (clock > max_dotclk)
1920                 return MODE_CLOCK_HIGH;
1921
1922         if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
1923                 if (!has_hdmi_sink)
1924                         return MODE_CLOCK_LOW;
1925                 clock *= 2;
1926         }
1927
1928         if (intel_sdvo->pixel_clock_min > clock)
1929                 return MODE_CLOCK_LOW;
1930
1931         if (intel_sdvo->pixel_clock_max < clock)
1932                 return MODE_CLOCK_HIGH;
1933
1934         if (IS_LVDS(intel_sdvo_connector)) {
1935                 enum drm_mode_status status;
1936
1937                 status = intel_panel_mode_valid(&intel_sdvo_connector->base, mode);
1938                 if (status != MODE_OK)
1939                         return status;
1940         }
1941
1942         return MODE_OK;
1943 }
1944
1945 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1946 {
1947         BUILD_BUG_ON(sizeof(*caps) != 8);
1948         if (!intel_sdvo_get_value(intel_sdvo,
1949                                   SDVO_CMD_GET_DEVICE_CAPS,
1950                                   caps, sizeof(*caps)))
1951                 return false;
1952
1953         DRM_DEBUG_KMS("SDVO capabilities:\n"
1954                       "  vendor_id: %d\n"
1955                       "  device_id: %d\n"
1956                       "  device_rev_id: %d\n"
1957                       "  sdvo_version_major: %d\n"
1958                       "  sdvo_version_minor: %d\n"
1959                       "  sdvo_inputs_mask: %d\n"
1960                       "  smooth_scaling: %d\n"
1961                       "  sharp_scaling: %d\n"
1962                       "  up_scaling: %d\n"
1963                       "  down_scaling: %d\n"
1964                       "  stall_support: %d\n"
1965                       "  output_flags: %d\n",
1966                       caps->vendor_id,
1967                       caps->device_id,
1968                       caps->device_rev_id,
1969                       caps->sdvo_version_major,
1970                       caps->sdvo_version_minor,
1971                       caps->sdvo_inputs_mask,
1972                       caps->smooth_scaling,
1973                       caps->sharp_scaling,
1974                       caps->up_scaling,
1975                       caps->down_scaling,
1976                       caps->stall_support,
1977                       caps->output_flags);
1978
1979         return true;
1980 }
1981
1982 static u8 intel_sdvo_get_colorimetry_cap(struct intel_sdvo *intel_sdvo)
1983 {
1984         u8 cap;
1985
1986         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY_CAP,
1987                                   &cap, sizeof(cap)))
1988                 return SDVO_COLORIMETRY_RGB256;
1989
1990         return cap;
1991 }
1992
1993 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1994 {
1995         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1996         u16 hotplug;
1997
1998         if (!I915_HAS_HOTPLUG(dev_priv))
1999                 return 0;
2000
2001         /*
2002          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
2003          * on the line.
2004          */
2005         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
2006                 return 0;
2007
2008         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
2009                                         &hotplug, sizeof(hotplug)))
2010                 return 0;
2011
2012         return hotplug;
2013 }
2014
2015 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
2016 {
2017         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
2018
2019         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
2020                              &intel_sdvo->hotplug_active, 2);
2021 }
2022
2023 static enum intel_hotplug_state
2024 intel_sdvo_hotplug(struct intel_encoder *encoder,
2025                    struct intel_connector *connector)
2026 {
2027         intel_sdvo_enable_hotplug(encoder);
2028
2029         return intel_encoder_hotplug(encoder, connector);
2030 }
2031
2032 static bool
2033 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
2034 {
2035         /* Is there more than one type of output? */
2036         return hweight16(intel_sdvo->caps.output_flags) > 1;
2037 }
2038
2039 static struct edid *
2040 intel_sdvo_get_edid(struct drm_connector *connector)
2041 {
2042         struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2043         return drm_get_edid(connector, &sdvo->ddc);
2044 }
2045
2046 /* Mac mini hack -- use the same DDC as the analog connector */
2047 static struct edid *
2048 intel_sdvo_get_analog_edid(struct drm_connector *connector)
2049 {
2050         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2051
2052         return drm_get_edid(connector,
2053                             intel_gmbus_get_adapter(dev_priv,
2054                                                     dev_priv->display.vbt.crt_ddc_pin));
2055 }
2056
2057 static enum drm_connector_status
2058 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
2059 {
2060         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2061         enum drm_connector_status status;
2062         struct edid *edid;
2063
2064         edid = intel_sdvo_get_edid(connector);
2065
2066         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
2067                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
2068
2069                 /*
2070                  * Don't use the 1 as the argument of DDC bus switch to get
2071                  * the EDID. It is used for SDVO SPD ROM.
2072                  */
2073                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
2074                         intel_sdvo->ddc_bus = ddc;
2075                         edid = intel_sdvo_get_edid(connector);
2076                         if (edid)
2077                                 break;
2078                 }
2079                 /*
2080                  * If we found the EDID on the other bus,
2081                  * assume that is the correct DDC bus.
2082                  */
2083                 if (edid == NULL)
2084                         intel_sdvo->ddc_bus = saved_ddc;
2085         }
2086
2087         /*
2088          * When there is no edid and no monitor is connected with VGA
2089          * port, try to use the CRT ddc to read the EDID for DVI-connector.
2090          */
2091         if (edid == NULL)
2092                 edid = intel_sdvo_get_analog_edid(connector);
2093
2094         status = connector_status_unknown;
2095         if (edid != NULL) {
2096                 /* DDC bus is shared, match EDID to connector type */
2097                 if (edid->input & DRM_EDID_INPUT_DIGITAL)
2098                         status = connector_status_connected;
2099                 else
2100                         status = connector_status_disconnected;
2101                 kfree(edid);
2102         }
2103
2104         return status;
2105 }
2106
2107 static bool
2108 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
2109                                   struct edid *edid)
2110 {
2111         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
2112         bool connector_is_digital = !!IS_DIGITAL(sdvo);
2113
2114         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
2115                       connector_is_digital, monitor_is_digital);
2116         return connector_is_digital == monitor_is_digital;
2117 }
2118
2119 static enum drm_connector_status
2120 intel_sdvo_detect(struct drm_connector *connector, bool force)
2121 {
2122         struct drm_i915_private *i915 = to_i915(connector->dev);
2123         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2124         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2125         enum drm_connector_status ret;
2126         u16 response;
2127
2128         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2129                       connector->base.id, connector->name);
2130
2131         if (!INTEL_DISPLAY_ENABLED(i915))
2132                 return connector_status_disconnected;
2133
2134         if (!intel_sdvo_get_value(intel_sdvo,
2135                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
2136                                   &response, 2))
2137                 return connector_status_unknown;
2138
2139         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
2140                       response & 0xff, response >> 8,
2141                       intel_sdvo_connector->output_flag);
2142
2143         if (response == 0)
2144                 return connector_status_disconnected;
2145
2146         intel_sdvo->attached_output = response;
2147
2148         if ((intel_sdvo_connector->output_flag & response) == 0)
2149                 ret = connector_status_disconnected;
2150         else if (IS_TMDS(intel_sdvo_connector))
2151                 ret = intel_sdvo_tmds_sink_detect(connector);
2152         else {
2153                 struct edid *edid;
2154
2155                 /* if we have an edid check it matches the connection */
2156                 edid = intel_sdvo_get_edid(connector);
2157                 if (edid == NULL)
2158                         edid = intel_sdvo_get_analog_edid(connector);
2159                 if (edid != NULL) {
2160                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
2161                                                               edid))
2162                                 ret = connector_status_connected;
2163                         else
2164                                 ret = connector_status_disconnected;
2165
2166                         kfree(edid);
2167                 } else
2168                         ret = connector_status_connected;
2169         }
2170
2171         return ret;
2172 }
2173
2174 static int intel_sdvo_get_ddc_modes(struct drm_connector *connector)
2175 {
2176         int num_modes = 0;
2177         struct edid *edid;
2178
2179         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2180                       connector->base.id, connector->name);
2181
2182         /* set the bus switch and get the modes */
2183         edid = intel_sdvo_get_edid(connector);
2184
2185         /*
2186          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
2187          * link between analog and digital outputs. So, if the regular SDVO
2188          * DDC fails, check to see if the analog output is disconnected, in
2189          * which case we'll look there for the digital DDC data.
2190          */
2191         if (!edid)
2192                 edid = intel_sdvo_get_analog_edid(connector);
2193
2194         if (!edid)
2195                 return 0;
2196
2197         if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
2198                                               edid))
2199                 num_modes += intel_connector_update_modes(connector, edid);
2200
2201         kfree(edid);
2202
2203         return num_modes;
2204 }
2205
2206 /*
2207  * Set of SDVO TV modes.
2208  * Note!  This is in reply order (see loop in get_tv_modes).
2209  * XXX: all 60Hz refresh?
2210  */
2211 static const struct drm_display_mode sdvo_tv_modes[] = {
2212         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
2213                    416, 0, 200, 201, 232, 233, 0,
2214                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2215         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
2216                    416, 0, 240, 241, 272, 273, 0,
2217                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2218         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
2219                    496, 0, 300, 301, 332, 333, 0,
2220                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2221         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
2222                    736, 0, 350, 351, 382, 383, 0,
2223                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2224         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
2225                    736, 0, 400, 401, 432, 433, 0,
2226                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2227         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
2228                    736, 0, 480, 481, 512, 513, 0,
2229                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2230         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
2231                    800, 0, 480, 481, 512, 513, 0,
2232                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2233         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
2234                    800, 0, 576, 577, 608, 609, 0,
2235                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2236         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
2237                    816, 0, 350, 351, 382, 383, 0,
2238                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2239         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
2240                    816, 0, 400, 401, 432, 433, 0,
2241                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2242         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
2243                    816, 0, 480, 481, 512, 513, 0,
2244                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2245         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
2246                    816, 0, 540, 541, 572, 573, 0,
2247                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2248         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
2249                    816, 0, 576, 577, 608, 609, 0,
2250                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2251         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
2252                    864, 0, 576, 577, 608, 609, 0,
2253                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2254         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
2255                    896, 0, 600, 601, 632, 633, 0,
2256                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2257         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
2258                    928, 0, 624, 625, 656, 657, 0,
2259                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2260         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
2261                    1016, 0, 766, 767, 798, 799, 0,
2262                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2263         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
2264                    1120, 0, 768, 769, 800, 801, 0,
2265                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2266         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
2267                    1376, 0, 1024, 1025, 1056, 1057, 0,
2268                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2269 };
2270
2271 static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
2272 {
2273         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2274         const struct drm_connector_state *conn_state = connector->state;
2275         struct intel_sdvo_sdtv_resolution_request tv_res;
2276         u32 reply = 0, format_map = 0;
2277         int num_modes = 0;
2278         int i;
2279
2280         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2281                       connector->base.id, connector->name);
2282
2283         /*
2284          * Read the list of supported input resolutions for the selected TV
2285          * format.
2286          */
2287         format_map = 1 << conn_state->tv.mode;
2288         memcpy(&tv_res, &format_map,
2289                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2290
2291         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
2292                 return 0;
2293
2294         BUILD_BUG_ON(sizeof(tv_res) != 3);
2295         if (!intel_sdvo_write_cmd(intel_sdvo,
2296                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2297                                   &tv_res, sizeof(tv_res)))
2298                 return 0;
2299         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2300                 return 0;
2301
2302         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) {
2303                 if (reply & (1 << i)) {
2304                         struct drm_display_mode *nmode;
2305                         nmode = drm_mode_duplicate(connector->dev,
2306                                                    &sdvo_tv_modes[i]);
2307                         if (nmode) {
2308                                 drm_mode_probed_add(connector, nmode);
2309                                 num_modes++;
2310                         }
2311                 }
2312         }
2313
2314         return num_modes;
2315 }
2316
2317 static int intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2318 {
2319         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2320
2321         drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
2322                     connector->base.id, connector->name);
2323
2324         return intel_panel_get_modes(to_intel_connector(connector));
2325 }
2326
2327 static int intel_sdvo_get_modes(struct drm_connector *connector)
2328 {
2329         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2330
2331         if (IS_TV(intel_sdvo_connector))
2332                 return intel_sdvo_get_tv_modes(connector);
2333         else if (IS_LVDS(intel_sdvo_connector))
2334                 return intel_sdvo_get_lvds_modes(connector);
2335         else
2336                 return intel_sdvo_get_ddc_modes(connector);
2337 }
2338
2339 static int
2340 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2341                                          const struct drm_connector_state *state,
2342                                          struct drm_property *property,
2343                                          u64 *val)
2344 {
2345         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2346         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2347
2348         if (property == intel_sdvo_connector->tv_format) {
2349                 int i;
2350
2351                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2352                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2353                                 *val = i;
2354
2355                                 return 0;
2356                         }
2357
2358                 drm_WARN_ON(connector->dev, 1);
2359                 *val = 0;
2360         } else if (property == intel_sdvo_connector->top ||
2361                    property == intel_sdvo_connector->bottom)
2362                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2363         else if (property == intel_sdvo_connector->left ||
2364                  property == intel_sdvo_connector->right)
2365                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2366         else if (property == intel_sdvo_connector->hpos)
2367                 *val = sdvo_state->tv.hpos;
2368         else if (property == intel_sdvo_connector->vpos)
2369                 *val = sdvo_state->tv.vpos;
2370         else if (property == intel_sdvo_connector->saturation)
2371                 *val = state->tv.saturation;
2372         else if (property == intel_sdvo_connector->contrast)
2373                 *val = state->tv.contrast;
2374         else if (property == intel_sdvo_connector->hue)
2375                 *val = state->tv.hue;
2376         else if (property == intel_sdvo_connector->brightness)
2377                 *val = state->tv.brightness;
2378         else if (property == intel_sdvo_connector->sharpness)
2379                 *val = sdvo_state->tv.sharpness;
2380         else if (property == intel_sdvo_connector->flicker_filter)
2381                 *val = sdvo_state->tv.flicker_filter;
2382         else if (property == intel_sdvo_connector->flicker_filter_2d)
2383                 *val = sdvo_state->tv.flicker_filter_2d;
2384         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2385                 *val = sdvo_state->tv.flicker_filter_adaptive;
2386         else if (property == intel_sdvo_connector->tv_chroma_filter)
2387                 *val = sdvo_state->tv.chroma_filter;
2388         else if (property == intel_sdvo_connector->tv_luma_filter)
2389                 *val = sdvo_state->tv.luma_filter;
2390         else if (property == intel_sdvo_connector->dot_crawl)
2391                 *val = sdvo_state->tv.dot_crawl;
2392         else
2393                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2394
2395         return 0;
2396 }
2397
2398 static int
2399 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2400                                          struct drm_connector_state *state,
2401                                          struct drm_property *property,
2402                                          u64 val)
2403 {
2404         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2405         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2406
2407         if (property == intel_sdvo_connector->tv_format) {
2408                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2409
2410                 if (state->crtc) {
2411                         struct drm_crtc_state *crtc_state =
2412                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2413
2414                         crtc_state->connectors_changed = true;
2415                 }
2416         } else if (property == intel_sdvo_connector->top ||
2417                    property == intel_sdvo_connector->bottom)
2418                 /* Cannot set these independent from each other */
2419                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2420         else if (property == intel_sdvo_connector->left ||
2421                  property == intel_sdvo_connector->right)
2422                 /* Cannot set these independent from each other */
2423                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2424         else if (property == intel_sdvo_connector->hpos)
2425                 sdvo_state->tv.hpos = val;
2426         else if (property == intel_sdvo_connector->vpos)
2427                 sdvo_state->tv.vpos = val;
2428         else if (property == intel_sdvo_connector->saturation)
2429                 state->tv.saturation = val;
2430         else if (property == intel_sdvo_connector->contrast)
2431                 state->tv.contrast = val;
2432         else if (property == intel_sdvo_connector->hue)
2433                 state->tv.hue = val;
2434         else if (property == intel_sdvo_connector->brightness)
2435                 state->tv.brightness = val;
2436         else if (property == intel_sdvo_connector->sharpness)
2437                 sdvo_state->tv.sharpness = val;
2438         else if (property == intel_sdvo_connector->flicker_filter)
2439                 sdvo_state->tv.flicker_filter = val;
2440         else if (property == intel_sdvo_connector->flicker_filter_2d)
2441                 sdvo_state->tv.flicker_filter_2d = val;
2442         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2443                 sdvo_state->tv.flicker_filter_adaptive = val;
2444         else if (property == intel_sdvo_connector->tv_chroma_filter)
2445                 sdvo_state->tv.chroma_filter = val;
2446         else if (property == intel_sdvo_connector->tv_luma_filter)
2447                 sdvo_state->tv.luma_filter = val;
2448         else if (property == intel_sdvo_connector->dot_crawl)
2449                 sdvo_state->tv.dot_crawl = val;
2450         else
2451                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2452
2453         return 0;
2454 }
2455
2456 static int
2457 intel_sdvo_connector_register(struct drm_connector *connector)
2458 {
2459         struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2460         int ret;
2461
2462         ret = intel_connector_register(connector);
2463         if (ret)
2464                 return ret;
2465
2466         return sysfs_create_link(&connector->kdev->kobj,
2467                                  &sdvo->ddc.dev.kobj,
2468                                  sdvo->ddc.dev.kobj.name);
2469 }
2470
2471 static void
2472 intel_sdvo_connector_unregister(struct drm_connector *connector)
2473 {
2474         struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2475
2476         sysfs_remove_link(&connector->kdev->kobj,
2477                           sdvo->ddc.dev.kobj.name);
2478         intel_connector_unregister(connector);
2479 }
2480
2481 static struct drm_connector_state *
2482 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2483 {
2484         struct intel_sdvo_connector_state *state;
2485
2486         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2487         if (!state)
2488                 return NULL;
2489
2490         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2491         return &state->base.base;
2492 }
2493
2494 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2495         .detect = intel_sdvo_detect,
2496         .fill_modes = drm_helper_probe_single_connector_modes,
2497         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2498         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2499         .late_register = intel_sdvo_connector_register,
2500         .early_unregister = intel_sdvo_connector_unregister,
2501         .destroy = intel_connector_destroy,
2502         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2503         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2504 };
2505
2506 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2507                                    struct drm_atomic_state *state)
2508 {
2509         struct drm_connector_state *new_conn_state =
2510                 drm_atomic_get_new_connector_state(state, conn);
2511         struct drm_connector_state *old_conn_state =
2512                 drm_atomic_get_old_connector_state(state, conn);
2513         struct intel_sdvo_connector_state *old_state =
2514                 to_intel_sdvo_connector_state(old_conn_state);
2515         struct intel_sdvo_connector_state *new_state =
2516                 to_intel_sdvo_connector_state(new_conn_state);
2517
2518         if (new_conn_state->crtc &&
2519             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2520              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2521                 struct drm_crtc_state *crtc_state =
2522                         drm_atomic_get_new_crtc_state(state,
2523                                                       new_conn_state->crtc);
2524
2525                 crtc_state->connectors_changed = true;
2526         }
2527
2528         return intel_digital_connector_atomic_check(conn, state);
2529 }
2530
2531 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2532         .get_modes = intel_sdvo_get_modes,
2533         .mode_valid = intel_sdvo_mode_valid,
2534         .atomic_check = intel_sdvo_atomic_check,
2535 };
2536
2537 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2538 {
2539         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2540
2541         i2c_del_adapter(&intel_sdvo->ddc);
2542         intel_encoder_destroy(encoder);
2543 }
2544
2545 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2546         .destroy = intel_sdvo_enc_destroy,
2547 };
2548
2549 static void
2550 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2551 {
2552         u16 mask = 0;
2553         unsigned int num_bits;
2554
2555         /*
2556          * Make a mask of outputs less than or equal to our own priority in the
2557          * list.
2558          */
2559         switch (sdvo->controlled_output) {
2560         case SDVO_OUTPUT_LVDS1:
2561                 mask |= SDVO_OUTPUT_LVDS1;
2562                 fallthrough;
2563         case SDVO_OUTPUT_LVDS0:
2564                 mask |= SDVO_OUTPUT_LVDS0;
2565                 fallthrough;
2566         case SDVO_OUTPUT_TMDS1:
2567                 mask |= SDVO_OUTPUT_TMDS1;
2568                 fallthrough;
2569         case SDVO_OUTPUT_TMDS0:
2570                 mask |= SDVO_OUTPUT_TMDS0;
2571                 fallthrough;
2572         case SDVO_OUTPUT_RGB1:
2573                 mask |= SDVO_OUTPUT_RGB1;
2574                 fallthrough;
2575         case SDVO_OUTPUT_RGB0:
2576                 mask |= SDVO_OUTPUT_RGB0;
2577                 break;
2578         }
2579
2580         /* Count bits to find what number we are in the priority list. */
2581         mask &= sdvo->caps.output_flags;
2582         num_bits = hweight16(mask);
2583         /* If more than 3 outputs, default to DDC bus 3 for now. */
2584         if (num_bits > 3)
2585                 num_bits = 3;
2586
2587         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2588         sdvo->ddc_bus = 1 << num_bits;
2589 }
2590
2591 /*
2592  * Choose the appropriate DDC bus for control bus switch command for this
2593  * SDVO output based on the controlled output.
2594  *
2595  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2596  * outputs, then LVDS outputs.
2597  */
2598 static void
2599 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2600                           struct intel_sdvo *sdvo)
2601 {
2602         struct sdvo_device_mapping *mapping;
2603
2604         if (sdvo->port == PORT_B)
2605                 mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2606         else
2607                 mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2608
2609         if (mapping->initialized)
2610                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2611         else
2612                 intel_sdvo_guess_ddc_bus(sdvo);
2613 }
2614
2615 static void
2616 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2617                           struct intel_sdvo *sdvo)
2618 {
2619         struct sdvo_device_mapping *mapping;
2620         u8 pin;
2621
2622         if (sdvo->port == PORT_B)
2623                 mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2624         else
2625                 mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2626
2627         if (mapping->initialized &&
2628             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2629                 pin = mapping->i2c_pin;
2630         else
2631                 pin = GMBUS_PIN_DPB;
2632
2633         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2634
2635         /*
2636          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2637          * our code totally fails once we start using gmbus. Hence fall back to
2638          * bit banging for now.
2639          */
2640         intel_gmbus_force_bit(sdvo->i2c, true);
2641 }
2642
2643 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2644 static void
2645 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2646 {
2647         intel_gmbus_force_bit(sdvo->i2c, false);
2648 }
2649
2650 static bool
2651 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo)
2652 {
2653         return intel_sdvo_check_supp_encode(intel_sdvo);
2654 }
2655
2656 static u8
2657 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2658                           struct intel_sdvo *sdvo)
2659 {
2660         struct sdvo_device_mapping *my_mapping, *other_mapping;
2661
2662         if (sdvo->port == PORT_B) {
2663                 my_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2664                 other_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2665         } else {
2666                 my_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2667                 other_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2668         }
2669
2670         /* If the BIOS described our SDVO device, take advantage of it. */
2671         if (my_mapping->slave_addr)
2672                 return my_mapping->slave_addr;
2673
2674         /*
2675          * If the BIOS only described a different SDVO device, use the
2676          * address that it isn't using.
2677          */
2678         if (other_mapping->slave_addr) {
2679                 if (other_mapping->slave_addr == 0x70)
2680                         return 0x72;
2681                 else
2682                         return 0x70;
2683         }
2684
2685         /*
2686          * No SDVO device info is found for another DVO port,
2687          * so use mapping assumption we had before BIOS parsing.
2688          */
2689         if (sdvo->port == PORT_B)
2690                 return 0x70;
2691         else
2692                 return 0x72;
2693 }
2694
2695 static int
2696 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2697                           struct intel_sdvo *encoder)
2698 {
2699         struct drm_connector *drm_connector;
2700         int ret;
2701
2702         drm_connector = &connector->base.base;
2703         ret = drm_connector_init(encoder->base.base.dev,
2704                            drm_connector,
2705                            &intel_sdvo_connector_funcs,
2706                            connector->base.base.connector_type);
2707         if (ret < 0)
2708                 return ret;
2709
2710         drm_connector_helper_add(drm_connector,
2711                                  &intel_sdvo_connector_helper_funcs);
2712
2713         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2714         connector->base.base.interlace_allowed = true;
2715         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2716
2717         intel_connector_attach_encoder(&connector->base, &encoder->base);
2718
2719         return 0;
2720 }
2721
2722 static void
2723 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2724                                struct intel_sdvo_connector *connector)
2725 {
2726         intel_attach_force_audio_property(&connector->base.base);
2727         if (intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220)
2728                 intel_attach_broadcast_rgb_property(&connector->base.base);
2729         intel_attach_aspect_ratio_property(&connector->base.base);
2730 }
2731
2732 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2733 {
2734         struct intel_sdvo_connector *sdvo_connector;
2735         struct intel_sdvo_connector_state *conn_state;
2736
2737         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2738         if (!sdvo_connector)
2739                 return NULL;
2740
2741         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2742         if (!conn_state) {
2743                 kfree(sdvo_connector);
2744                 return NULL;
2745         }
2746
2747         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2748                                             &conn_state->base.base);
2749
2750         INIT_LIST_HEAD(&sdvo_connector->base.panel.fixed_modes);
2751
2752         return sdvo_connector;
2753 }
2754
2755 static bool
2756 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, u16 type)
2757 {
2758         struct drm_encoder *encoder = &intel_sdvo->base.base;
2759         struct drm_connector *connector;
2760         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2761         struct intel_connector *intel_connector;
2762         struct intel_sdvo_connector *intel_sdvo_connector;
2763
2764         DRM_DEBUG_KMS("initialising DVI type 0x%x\n", type);
2765
2766         intel_sdvo_connector = intel_sdvo_connector_alloc();
2767         if (!intel_sdvo_connector)
2768                 return false;
2769
2770         intel_sdvo_connector->output_flag = type;
2771
2772         intel_connector = &intel_sdvo_connector->base;
2773         connector = &intel_connector->base;
2774         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2775                 intel_sdvo_connector->output_flag) {
2776                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2777                 /*
2778                  * Some SDVO devices have one-shot hotplug interrupts.
2779                  * Ensure that they get re-enabled when an interrupt happens.
2780                  */
2781                 intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
2782                 intel_encoder->hotplug = intel_sdvo_hotplug;
2783                 intel_sdvo_enable_hotplug(intel_encoder);
2784         } else {
2785                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2786         }
2787         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2788         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2789
2790         if (intel_sdvo_is_hdmi_connector(intel_sdvo)) {
2791                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2792                 intel_sdvo_connector->is_hdmi = true;
2793         }
2794
2795         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2796                 kfree(intel_sdvo_connector);
2797                 return false;
2798         }
2799
2800         if (intel_sdvo_connector->is_hdmi)
2801                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2802
2803         return true;
2804 }
2805
2806 static bool
2807 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, u16 type)
2808 {
2809         struct drm_encoder *encoder = &intel_sdvo->base.base;
2810         struct drm_connector *connector;
2811         struct intel_connector *intel_connector;
2812         struct intel_sdvo_connector *intel_sdvo_connector;
2813
2814         DRM_DEBUG_KMS("initialising TV type 0x%x\n", type);
2815
2816         intel_sdvo_connector = intel_sdvo_connector_alloc();
2817         if (!intel_sdvo_connector)
2818                 return false;
2819
2820         intel_connector = &intel_sdvo_connector->base;
2821         connector = &intel_connector->base;
2822         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2823         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2824
2825         intel_sdvo_connector->output_flag = type;
2826
2827         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2828                 kfree(intel_sdvo_connector);
2829                 return false;
2830         }
2831
2832         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2833                 goto err;
2834
2835         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2836                 goto err;
2837
2838         return true;
2839
2840 err:
2841         intel_connector_destroy(connector);
2842         return false;
2843 }
2844
2845 static bool
2846 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, u16 type)
2847 {
2848         struct drm_encoder *encoder = &intel_sdvo->base.base;
2849         struct drm_connector *connector;
2850         struct intel_connector *intel_connector;
2851         struct intel_sdvo_connector *intel_sdvo_connector;
2852
2853         DRM_DEBUG_KMS("initialising analog type 0x%x\n", type);
2854
2855         intel_sdvo_connector = intel_sdvo_connector_alloc();
2856         if (!intel_sdvo_connector)
2857                 return false;
2858
2859         intel_connector = &intel_sdvo_connector->base;
2860         connector = &intel_connector->base;
2861         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2862         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2863         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2864
2865         intel_sdvo_connector->output_flag = type;
2866
2867         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2868                 kfree(intel_sdvo_connector);
2869                 return false;
2870         }
2871
2872         return true;
2873 }
2874
2875 static bool
2876 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, u16 type)
2877 {
2878         struct drm_encoder *encoder = &intel_sdvo->base.base;
2879         struct drm_i915_private *i915 = to_i915(encoder->dev);
2880         struct drm_connector *connector;
2881         struct intel_connector *intel_connector;
2882         struct intel_sdvo_connector *intel_sdvo_connector;
2883
2884         DRM_DEBUG_KMS("initialising LVDS type 0x%x\n", type);
2885
2886         intel_sdvo_connector = intel_sdvo_connector_alloc();
2887         if (!intel_sdvo_connector)
2888                 return false;
2889
2890         intel_connector = &intel_sdvo_connector->base;
2891         connector = &intel_connector->base;
2892         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2893         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2894
2895         intel_sdvo_connector->output_flag = type;
2896
2897         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2898                 kfree(intel_sdvo_connector);
2899                 return false;
2900         }
2901
2902         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2903                 goto err;
2904
2905         intel_bios_init_panel_late(i915, &intel_connector->panel, NULL, NULL);
2906
2907         /*
2908          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2909          * SDVO->LVDS transcoders can't cope with the EDID mode.
2910          */
2911         intel_panel_add_vbt_sdvo_fixed_mode(intel_connector);
2912
2913         if (!intel_panel_preferred_fixed_mode(intel_connector)) {
2914                 mutex_lock(&i915->drm.mode_config.mutex);
2915
2916                 intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2917                 intel_panel_add_edid_fixed_modes(intel_connector, false);
2918
2919                 mutex_unlock(&i915->drm.mode_config.mutex);
2920         }
2921
2922         intel_panel_init(intel_connector, NULL);
2923
2924         if (!intel_panel_preferred_fixed_mode(intel_connector))
2925                 goto err;
2926
2927         return true;
2928
2929 err:
2930         intel_connector_destroy(connector);
2931         return false;
2932 }
2933
2934 static u16 intel_sdvo_filter_output_flags(u16 flags)
2935 {
2936         flags &= SDVO_OUTPUT_MASK;
2937
2938         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2939         if (!(flags & SDVO_OUTPUT_TMDS0))
2940                 flags &= ~SDVO_OUTPUT_TMDS1;
2941
2942         if (!(flags & SDVO_OUTPUT_RGB0))
2943                 flags &= ~SDVO_OUTPUT_RGB1;
2944
2945         if (!(flags & SDVO_OUTPUT_LVDS0))
2946                 flags &= ~SDVO_OUTPUT_LVDS1;
2947
2948         return flags;
2949 }
2950
2951 static bool intel_sdvo_output_init(struct intel_sdvo *sdvo, u16 type)
2952 {
2953         if (type & SDVO_TMDS_MASK)
2954                 return intel_sdvo_dvi_init(sdvo, type);
2955         else if (type & SDVO_TV_MASK)
2956                 return intel_sdvo_tv_init(sdvo, type);
2957         else if (type & SDVO_RGB_MASK)
2958                 return intel_sdvo_analog_init(sdvo, type);
2959         else if (type & SDVO_LVDS_MASK)
2960                 return intel_sdvo_lvds_init(sdvo, type);
2961         else
2962                 return false;
2963 }
2964
2965 static bool
2966 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo)
2967 {
2968         static const u16 probe_order[] = {
2969                 SDVO_OUTPUT_TMDS0,
2970                 SDVO_OUTPUT_TMDS1,
2971                 /* TV has no XXX1 function block */
2972                 SDVO_OUTPUT_SVID0,
2973                 SDVO_OUTPUT_CVBS0,
2974                 SDVO_OUTPUT_YPRPB0,
2975                 SDVO_OUTPUT_RGB0,
2976                 SDVO_OUTPUT_RGB1,
2977                 SDVO_OUTPUT_LVDS0,
2978                 SDVO_OUTPUT_LVDS1,
2979         };
2980         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
2981         u16 flags;
2982         int i;
2983
2984         flags = intel_sdvo_filter_output_flags(intel_sdvo->caps.output_flags);
2985
2986         if (flags == 0) {
2987                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%04x)\n",
2988                               SDVO_NAME(intel_sdvo), intel_sdvo->caps.output_flags);
2989                 return false;
2990         }
2991
2992         intel_sdvo->controlled_output = flags;
2993
2994         intel_sdvo_select_ddc_bus(i915, intel_sdvo);
2995
2996         for (i = 0; i < ARRAY_SIZE(probe_order); i++) {
2997                 u16 type = flags & probe_order[i];
2998
2999                 if (!type)
3000                         continue;
3001
3002                 if (!intel_sdvo_output_init(intel_sdvo, type))
3003                         return false;
3004         }
3005
3006         intel_sdvo->base.pipe_mask = ~0;
3007
3008         return true;
3009 }
3010
3011 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
3012 {
3013         struct drm_device *dev = intel_sdvo->base.base.dev;
3014         struct drm_connector *connector, *tmp;
3015
3016         list_for_each_entry_safe(connector, tmp,
3017                                  &dev->mode_config.connector_list, head) {
3018                 if (intel_attached_encoder(to_intel_connector(connector)) == &intel_sdvo->base) {
3019                         drm_connector_unregister(connector);
3020                         intel_connector_destroy(connector);
3021                 }
3022         }
3023 }
3024
3025 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
3026                                           struct intel_sdvo_connector *intel_sdvo_connector,
3027                                           int type)
3028 {
3029         struct drm_device *dev = intel_sdvo->base.base.dev;
3030         struct intel_sdvo_tv_format format;
3031         u32 format_map, i;
3032
3033         if (!intel_sdvo_set_target_output(intel_sdvo, type))
3034                 return false;
3035
3036         BUILD_BUG_ON(sizeof(format) != 6);
3037         if (!intel_sdvo_get_value(intel_sdvo,
3038                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
3039                                   &format, sizeof(format)))
3040                 return false;
3041
3042         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
3043
3044         if (format_map == 0)
3045                 return false;
3046
3047         intel_sdvo_connector->format_supported_num = 0;
3048         for (i = 0 ; i < TV_FORMAT_NUM; i++)
3049                 if (format_map & (1 << i))
3050                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
3051
3052
3053         intel_sdvo_connector->tv_format =
3054                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
3055                                             "mode", intel_sdvo_connector->format_supported_num);
3056         if (!intel_sdvo_connector->tv_format)
3057                 return false;
3058
3059         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
3060                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
3061                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
3062
3063         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
3064         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
3065                                    intel_sdvo_connector->tv_format, 0);
3066         return true;
3067
3068 }
3069
3070 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
3071         if (enhancements.name) { \
3072                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
3073                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
3074                         return false; \
3075                 intel_sdvo_connector->name = \
3076                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
3077                 if (!intel_sdvo_connector->name) return false; \
3078                 state_assignment = response; \
3079                 drm_object_attach_property(&connector->base, \
3080                                            intel_sdvo_connector->name, 0); \
3081                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
3082                               data_value[0], data_value[1], response); \
3083         } \
3084 } while (0)
3085
3086 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
3087
3088 static bool
3089 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
3090                                       struct intel_sdvo_connector *intel_sdvo_connector,
3091                                       struct intel_sdvo_enhancements_reply enhancements)
3092 {
3093         struct drm_device *dev = intel_sdvo->base.base.dev;
3094         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3095         struct drm_connector_state *conn_state = connector->state;
3096         struct intel_sdvo_connector_state *sdvo_state =
3097                 to_intel_sdvo_connector_state(conn_state);
3098         u16 response, data_value[2];
3099
3100         /* when horizontal overscan is supported, Add the left/right property */
3101         if (enhancements.overscan_h) {
3102                 if (!intel_sdvo_get_value(intel_sdvo,
3103                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
3104                                           &data_value, 4))
3105                         return false;
3106
3107                 if (!intel_sdvo_get_value(intel_sdvo,
3108                                           SDVO_CMD_GET_OVERSCAN_H,
3109                                           &response, 2))
3110                         return false;
3111
3112                 sdvo_state->tv.overscan_h = response;
3113
3114                 intel_sdvo_connector->max_hscan = data_value[0];
3115                 intel_sdvo_connector->left =
3116                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
3117                 if (!intel_sdvo_connector->left)
3118                         return false;
3119
3120                 drm_object_attach_property(&connector->base,
3121                                            intel_sdvo_connector->left, 0);
3122
3123                 intel_sdvo_connector->right =
3124                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
3125                 if (!intel_sdvo_connector->right)
3126                         return false;
3127
3128                 drm_object_attach_property(&connector->base,
3129                                               intel_sdvo_connector->right, 0);
3130                 DRM_DEBUG_KMS("h_overscan: max %d, "
3131                               "default %d, current %d\n",
3132                               data_value[0], data_value[1], response);
3133         }
3134
3135         if (enhancements.overscan_v) {
3136                 if (!intel_sdvo_get_value(intel_sdvo,
3137                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
3138                                           &data_value, 4))
3139                         return false;
3140
3141                 if (!intel_sdvo_get_value(intel_sdvo,
3142                                           SDVO_CMD_GET_OVERSCAN_V,
3143                                           &response, 2))
3144                         return false;
3145
3146                 sdvo_state->tv.overscan_v = response;
3147
3148                 intel_sdvo_connector->max_vscan = data_value[0];
3149                 intel_sdvo_connector->top =
3150                         drm_property_create_range(dev, 0,
3151                                             "top_margin", 0, data_value[0]);
3152                 if (!intel_sdvo_connector->top)
3153                         return false;
3154
3155                 drm_object_attach_property(&connector->base,
3156                                            intel_sdvo_connector->top, 0);
3157
3158                 intel_sdvo_connector->bottom =
3159                         drm_property_create_range(dev, 0,
3160                                             "bottom_margin", 0, data_value[0]);
3161                 if (!intel_sdvo_connector->bottom)
3162                         return false;
3163
3164                 drm_object_attach_property(&connector->base,
3165                                               intel_sdvo_connector->bottom, 0);
3166                 DRM_DEBUG_KMS("v_overscan: max %d, "
3167                               "default %d, current %d\n",
3168                               data_value[0], data_value[1], response);
3169         }
3170
3171         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
3172         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
3173         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
3174         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
3175         ENHANCEMENT(&conn_state->tv, hue, HUE);
3176         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
3177         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
3178         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
3179         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
3180         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
3181         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
3182         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
3183
3184         if (enhancements.dot_crawl) {
3185                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
3186                         return false;
3187
3188                 sdvo_state->tv.dot_crawl = response & 0x1;
3189                 intel_sdvo_connector->dot_crawl =
3190                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
3191                 if (!intel_sdvo_connector->dot_crawl)
3192                         return false;
3193
3194                 drm_object_attach_property(&connector->base,
3195                                            intel_sdvo_connector->dot_crawl, 0);
3196                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
3197         }
3198
3199         return true;
3200 }
3201
3202 static bool
3203 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
3204                                         struct intel_sdvo_connector *intel_sdvo_connector,
3205                                         struct intel_sdvo_enhancements_reply enhancements)
3206 {
3207         struct drm_device *dev = intel_sdvo->base.base.dev;
3208         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3209         u16 response, data_value[2];
3210
3211         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
3212
3213         return true;
3214 }
3215 #undef ENHANCEMENT
3216 #undef _ENHANCEMENT
3217
3218 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
3219                                                struct intel_sdvo_connector *intel_sdvo_connector)
3220 {
3221         union {
3222                 struct intel_sdvo_enhancements_reply reply;
3223                 u16 response;
3224         } enhancements;
3225
3226         BUILD_BUG_ON(sizeof(enhancements) != 2);
3227
3228         if (!intel_sdvo_get_value(intel_sdvo,
3229                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
3230                                   &enhancements, sizeof(enhancements)) ||
3231             enhancements.response == 0) {
3232                 DRM_DEBUG_KMS("No enhancement is supported\n");
3233                 return true;
3234         }
3235
3236         if (IS_TV(intel_sdvo_connector))
3237                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3238         else if (IS_LVDS(intel_sdvo_connector))
3239                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3240         else
3241                 return true;
3242 }
3243
3244 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
3245                                      struct i2c_msg *msgs,
3246                                      int num)
3247 {
3248         struct intel_sdvo *sdvo = adapter->algo_data;
3249
3250         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
3251                 return -EIO;
3252
3253         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
3254 }
3255
3256 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
3257 {
3258         struct intel_sdvo *sdvo = adapter->algo_data;
3259         return sdvo->i2c->algo->functionality(sdvo->i2c);
3260 }
3261
3262 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3263         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3264         .functionality  = intel_sdvo_ddc_proxy_func
3265 };
3266
3267 static void proxy_lock_bus(struct i2c_adapter *adapter,
3268                            unsigned int flags)
3269 {
3270         struct intel_sdvo *sdvo = adapter->algo_data;
3271         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3272 }
3273
3274 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3275                              unsigned int flags)
3276 {
3277         struct intel_sdvo *sdvo = adapter->algo_data;
3278         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3279 }
3280
3281 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3282                              unsigned int flags)
3283 {
3284         struct intel_sdvo *sdvo = adapter->algo_data;
3285         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3286 }
3287
3288 static const struct i2c_lock_operations proxy_lock_ops = {
3289         .lock_bus =    proxy_lock_bus,
3290         .trylock_bus = proxy_trylock_bus,
3291         .unlock_bus =  proxy_unlock_bus,
3292 };
3293
3294 static bool
3295 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3296                           struct drm_i915_private *dev_priv)
3297 {
3298         struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
3299
3300         sdvo->ddc.owner = THIS_MODULE;
3301         sdvo->ddc.class = I2C_CLASS_DDC;
3302         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3303         sdvo->ddc.dev.parent = &pdev->dev;
3304         sdvo->ddc.algo_data = sdvo;
3305         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3306         sdvo->ddc.lock_ops = &proxy_lock_ops;
3307
3308         return i2c_add_adapter(&sdvo->ddc) == 0;
3309 }
3310
3311 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3312                                    enum port port)
3313 {
3314         if (HAS_PCH_SPLIT(dev_priv))
3315                 drm_WARN_ON(&dev_priv->drm, port != PORT_B);
3316         else
3317                 drm_WARN_ON(&dev_priv->drm, port != PORT_B && port != PORT_C);
3318 }
3319
3320 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3321                      i915_reg_t sdvo_reg, enum port port)
3322 {
3323         struct intel_encoder *intel_encoder;
3324         struct intel_sdvo *intel_sdvo;
3325         int i;
3326
3327         assert_sdvo_port_valid(dev_priv, port);
3328
3329         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3330         if (!intel_sdvo)
3331                 return false;
3332
3333         intel_sdvo->sdvo_reg = sdvo_reg;
3334         intel_sdvo->port = port;
3335         intel_sdvo->slave_addr =
3336                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3337         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3338         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3339                 goto err_i2c_bus;
3340
3341         /* encoder type will be decided later */
3342         intel_encoder = &intel_sdvo->base;
3343         intel_encoder->type = INTEL_OUTPUT_SDVO;
3344         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3345         intel_encoder->port = port;
3346         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3347                          &intel_sdvo_enc_funcs, 0,
3348                          "SDVO %c", port_name(port));
3349
3350         /* Read the regs to test if we can talk to the device */
3351         for (i = 0; i < 0x40; i++) {
3352                 u8 byte;
3353
3354                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3355                         drm_dbg_kms(&dev_priv->drm,
3356                                     "No SDVO device found on %s\n",
3357                                     SDVO_NAME(intel_sdvo));
3358                         goto err;
3359                 }
3360         }
3361
3362         intel_encoder->compute_config = intel_sdvo_compute_config;
3363         if (HAS_PCH_SPLIT(dev_priv)) {
3364                 intel_encoder->disable = pch_disable_sdvo;
3365                 intel_encoder->post_disable = pch_post_disable_sdvo;
3366         } else {
3367                 intel_encoder->disable = intel_disable_sdvo;
3368         }
3369         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3370         intel_encoder->enable = intel_enable_sdvo;
3371         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3372         intel_encoder->get_config = intel_sdvo_get_config;
3373
3374         /* In default case sdvo lvds is false */
3375         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3376                 goto err;
3377
3378         intel_sdvo->colorimetry_cap =
3379                 intel_sdvo_get_colorimetry_cap(intel_sdvo);
3380
3381         if (!intel_sdvo_output_setup(intel_sdvo)) {
3382                 drm_dbg_kms(&dev_priv->drm,
3383                             "SDVO output failed to setup on %s\n",
3384                             SDVO_NAME(intel_sdvo));
3385                 /* Output_setup can leave behind connectors! */
3386                 goto err_output;
3387         }
3388
3389         /*
3390          * Only enable the hotplug irq if we need it, to work around noisy
3391          * hotplug lines.
3392          */
3393         if (intel_sdvo->hotplug_active) {
3394                 if (intel_sdvo->port == PORT_B)
3395                         intel_encoder->hpd_pin = HPD_SDVO_B;
3396                 else
3397                         intel_encoder->hpd_pin = HPD_SDVO_C;
3398         }
3399
3400         /*
3401          * Cloning SDVO with anything is often impossible, since the SDVO
3402          * encoder can request a special input timing mode. And even if that's
3403          * not the case we have evidence that cloning a plain unscaled mode with
3404          * VGA doesn't really work. Furthermore the cloning flags are way too
3405          * simplistic anyway to express such constraints, so just give up on
3406          * cloning for SDVO encoders.
3407          */
3408         intel_sdvo->base.cloneable = 0;
3409
3410         /* Set the input timing to the screen. Assume always input 0. */
3411         if (!intel_sdvo_set_target_input(intel_sdvo))
3412                 goto err_output;
3413
3414         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3415                                                     &intel_sdvo->pixel_clock_min,
3416                                                     &intel_sdvo->pixel_clock_max))
3417                 goto err_output;
3418
3419         drm_dbg_kms(&dev_priv->drm, "%s device VID/DID: %02X:%02X.%02X, "
3420                         "clock range %dMHz - %dMHz, "
3421                         "input 1: %c, input 2: %c, "
3422                         "output 1: %c, output 2: %c\n",
3423                         SDVO_NAME(intel_sdvo),
3424                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3425                         intel_sdvo->caps.device_rev_id,
3426                         intel_sdvo->pixel_clock_min / 1000,
3427                         intel_sdvo->pixel_clock_max / 1000,
3428                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3429                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3430                         /* check currently supported outputs */
3431                         intel_sdvo->caps.output_flags &
3432                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0 |
3433                          SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_SVID0 |
3434                          SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_YPRPB0) ? 'Y' : 'N',
3435                         intel_sdvo->caps.output_flags &
3436                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1 |
3437                          SDVO_OUTPUT_LVDS1) ? 'Y' : 'N');
3438         return true;
3439
3440 err_output:
3441         intel_sdvo_output_cleanup(intel_sdvo);
3442
3443 err:
3444         drm_encoder_cleanup(&intel_encoder->base);
3445         i2c_del_adapter(&intel_sdvo->ddc);
3446 err_i2c_bus:
3447         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3448         kfree(intel_sdvo);
3449
3450         return false;
3451 }