drivers/gpu/drm/i915/display/intel_display_driver.c

   1 // SPDX-License-Identifier: MIT
   2 /*
   3  * Copyright © 2022-2023 Intel Corporation
   4  *
   5  * High level display driver entry points. This is a layer between top level
   6  * driver code and low level display functionality; no low level display code or
   7  * details here.
   8  */
   9
  10 #include <linux/vga_switcheroo.h>
  11 #include <acpi/video.h>
  12 #include <drm/display/drm_dp_mst_helper.h>
  13 #include <drm/drm_atomic_helper.h>
  14 #include <drm/drm_mode_config.h>
  15 #include <drm/drm_privacy_screen_consumer.h>
  16 #include <drm/drm_probe_helper.h>
  17 #include <drm/drm_vblank.h>
  18
  19 #include "i915_drv.h"
  20 #include "i9xx_wm.h"
  21 #include "intel_acpi.h"
  22 #include "intel_atomic.h"
  23 #include "intel_audio.h"
  24 #include "intel_bios.h"
  25 #include "intel_bw.h"
  26 #include "intel_cdclk.h"
  27 #include "intel_color.h"
  28 #include "intel_crtc.h"
  29 #include "intel_display_debugfs.h"
  30 #include "intel_display_driver.h"
  31 #include "intel_display_power.h"
  32 #include "intel_display_types.h"
  33 #include "intel_dmc.h"
  34 #include "intel_dp.h"
  35 #include "intel_dpll_mgr.h"
  36 #include "intel_fb.h"
  37 #include "intel_fbc.h"
  38 #include "intel_fbdev.h"
  39 #include "intel_fdi.h"
  40 #include "intel_gmbus.h"
  41 #include "intel_hdcp.h"
  42 #include "intel_hotplug.h"
  43 #include "intel_hti.h"
  44 #include "intel_modeset_setup.h"
  45 #include "intel_opregion.h"
  46 #include "intel_overlay.h"
  47 #include "intel_plane_initial.h"
  48 #include "intel_pps.h"
  49 #include "intel_quirks.h"
  50 #include "intel_vga.h"
  51 #include "intel_wm.h"
  52 #include "skl_watermark.h"
  53
  54 bool intel_display_driver_probe_defer(struct pci_dev *pdev)
  55 {
  56         struct drm_privacy_screen *privacy_screen;
  57
  58         /*
  59          * apple-gmux is needed on dual GPU MacBook Pro
  60          * to probe the panel if we're the inactive GPU.
  61          */
  62         if (vga_switcheroo_client_probe_defer(pdev))
  63                 return true;
  64
  65         /* If the LCD panel has a privacy-screen, wait for it */
  66         privacy_screen = drm_privacy_screen_get(&pdev->dev, NULL);
  67         if (IS_ERR(privacy_screen) && PTR_ERR(privacy_screen) == -EPROBE_DEFER)
  68                 return true;
  69
  70         drm_privacy_screen_put(privacy_screen);
  71
  72         return false;
  73 }
  74
  75 void intel_display_driver_init_hw(struct drm_i915_private *i915)
  76 {
  77         struct intel_cdclk_state *cdclk_state;
  78
  79         if (!HAS_DISPLAY(i915))
  80                 return;
  81
  82         cdclk_state = to_intel_cdclk_state(i915->display.cdclk.obj.state);
  83
  84         intel_update_cdclk(i915);
  85         intel_cdclk_dump_config(i915, &i915->display.cdclk.hw, "Current CDCLK");
  86         cdclk_state->logical = cdclk_state->actual = i915->display.cdclk.hw;
  87 }
  88
  89 static const struct drm_mode_config_funcs intel_mode_funcs = {
  90         .fb_create = intel_user_framebuffer_create,
  91         .get_format_info = intel_fb_get_format_info,
  92         .output_poll_changed = intel_fbdev_output_poll_changed,
  93         .mode_valid = intel_mode_valid,
  94         .atomic_check = intel_atomic_check,
  95         .atomic_commit = intel_atomic_commit,
  96         .atomic_state_alloc = intel_atomic_state_alloc,
  97         .atomic_state_clear = intel_atomic_state_clear,
  98         .atomic_state_free = intel_atomic_state_free,
  99 };
 100
 101 static const struct drm_mode_config_helper_funcs intel_mode_config_funcs = {
 102         .atomic_commit_setup = drm_dp_mst_atomic_setup_commit,
 103 };
 104
 105 static void intel_mode_config_init(struct drm_i915_private *i915)
 106 {
 107         struct drm_mode_config *mode_config = &i915->drm.mode_config;
 108
 109         drm_mode_config_init(&i915->drm);
 110         INIT_LIST_HEAD(&i915->display.global.obj_list);
 111
 112         mode_config->min_width = 0;
 113         mode_config->min_height = 0;
 114
 115         mode_config->preferred_depth = 24;
 116         mode_config->prefer_shadow = 1;
 117
 118         mode_config->funcs = &intel_mode_funcs;
 119         mode_config->helper_private = &intel_mode_config_funcs;
 120
 121         mode_config->async_page_flip = HAS_ASYNC_FLIPS(i915);
 122
 123         /*
 124          * Maximum framebuffer dimensions, chosen to match
 125          * the maximum render engine surface size on gen4+.
 126          */
 127         if (DISPLAY_VER(i915) >= 7) {
 128                 mode_config->max_width = 16384;
 129                 mode_config->max_height = 16384;
 130         } else if (DISPLAY_VER(i915) >= 4) {
 131                 mode_config->max_width = 8192;
 132                 mode_config->max_height = 8192;
 133         } else if (DISPLAY_VER(i915) == 3) {
 134                 mode_config->max_width = 4096;
 135                 mode_config->max_height = 4096;
 136         } else {
 137                 mode_config->max_width = 2048;
 138                 mode_config->max_height = 2048;
 139         }
 140
 141         if (IS_I845G(i915) || IS_I865G(i915)) {
 142                 mode_config->cursor_width = IS_I845G(i915) ? 64 : 512;
 143                 mode_config->cursor_height = 1023;
 144         } else if (IS_I830(i915) || IS_I85X(i915) ||
 145                    IS_I915G(i915) || IS_I915GM(i915)) {
 146                 mode_config->cursor_width = 64;
 147                 mode_config->cursor_height = 64;
 148         } else {
 149                 mode_config->cursor_width = 256;
 150                 mode_config->cursor_height = 256;
 151         }
 152 }
 153
 154 static void intel_mode_config_cleanup(struct drm_i915_private *i915)
 155 {
 156         intel_atomic_global_obj_cleanup(i915);
 157         drm_mode_config_cleanup(&i915->drm);
 158 }
 159
 160 static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
 161 {
 162         struct intel_plane *plane;
 163
 164         for_each_intel_plane(&dev_priv->drm, plane) {
 165                 struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv,
 166                                                               plane->pipe);
 167
 168                 plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
 169         }
 170 }
 171
 172 /* part #1: call before irq install */
 173 int intel_display_driver_probe_noirq(struct drm_i915_private *i915)
 174 {
 175         int ret;
 176
 177         if (i915_inject_probe_failure(i915))
 178                 return -ENODEV;
 179
 180         if (HAS_DISPLAY(i915)) {
 181                 ret = drm_vblank_init(&i915->drm,
 182                                       INTEL_NUM_PIPES(i915));
 183                 if (ret)
 184                         return ret;
 185         }
 186
 187         intel_bios_init(i915);
 188
 189         ret = intel_vga_register(i915);
 190         if (ret)
 191                 goto cleanup_bios;
 192
 193         /* FIXME: completely on the wrong abstraction layer */
 194         ret = intel_power_domains_init(i915);
 195         if (ret < 0)
 196                 goto cleanup_vga;
 197
 198         intel_power_domains_init_hw(i915, false);
 199
 200         if (!HAS_DISPLAY(i915))
 201                 return 0;
 202
 203         intel_dmc_init(i915);
 204
 205         i915->display.wq.modeset = alloc_ordered_workqueue("i915_modeset", 0);
 206         i915->display.wq.flip = alloc_workqueue("i915_flip", WQ_HIGHPRI |
 207                                                 WQ_UNBOUND, WQ_UNBOUND_MAX_ACTIVE);
 208
 209         intel_mode_config_init(i915);
 210
 211         ret = intel_cdclk_init(i915);
 212         if (ret)
 213                 goto cleanup_vga_client_pw_domain_dmc;
 214
 215         ret = intel_color_init(i915);
 216         if (ret)
 217                 goto cleanup_vga_client_pw_domain_dmc;
 218
 219         ret = intel_dbuf_init(i915);
 220         if (ret)
 221                 goto cleanup_vga_client_pw_domain_dmc;
 222
 223         ret = intel_bw_init(i915);
 224         if (ret)
 225                 goto cleanup_vga_client_pw_domain_dmc;
 226
 227         init_llist_head(&i915->display.atomic_helper.free_list);
 228         INIT_WORK(&i915->display.atomic_helper.free_work,
 229                   intel_atomic_helper_free_state_worker);
 230
 231         intel_init_quirks(i915);
 232
 233         intel_fbc_init(i915);
 234
 235         return 0;
 236
 237 cleanup_vga_client_pw_domain_dmc:
 238         intel_dmc_fini(i915);
 239         intel_power_domains_driver_remove(i915);
 240 cleanup_vga:
 241         intel_vga_unregister(i915);
 242 cleanup_bios:
 243         intel_bios_driver_remove(i915);
 244
 245         return ret;
 246 }
 247
 248 /* part #2: call after irq install, but before gem init */
 249 int intel_display_driver_probe_nogem(struct drm_i915_private *i915)
 250 {
 251         struct drm_device *dev = &i915->drm;
 252         enum pipe pipe;
 253         struct intel_crtc *crtc;
 254         int ret;
 255
 256         if (!HAS_DISPLAY(i915))
 257                 return 0;
 258
 259         intel_wm_init(i915);
 260
 261         intel_panel_sanitize_ssc(i915);
 262
 263         intel_pps_setup(i915);
 264
 265         intel_gmbus_setup(i915);
 266
 267         drm_dbg_kms(&i915->drm, "%d display pipe%s available.\n",
 268                     INTEL_NUM_PIPES(i915),
 269                     INTEL_NUM_PIPES(i915) > 1 ? "s" : "");
 270
 271         for_each_pipe(i915, pipe) {
 272                 ret = intel_crtc_init(i915, pipe);
 273                 if (ret) {
 274                         intel_mode_config_cleanup(i915);
 275                         return ret;
 276                 }
 277         }
 278
 279         intel_plane_possible_crtcs_init(i915);
 280         intel_shared_dpll_init(i915);
 281         intel_fdi_pll_freq_update(i915);
 282
 283         intel_update_czclk(i915);
 284         intel_display_driver_init_hw(i915);
 285         intel_dpll_update_ref_clks(i915);
 286
 287         intel_hdcp_component_init(i915);
 288
 289         if (i915->display.cdclk.max_cdclk_freq == 0)
 290                 intel_update_max_cdclk(i915);
 291
 292         intel_hti_init(i915);
 293
 294         /* Just disable it once at startup */
 295         intel_vga_disable(i915);
 296         intel_setup_outputs(i915);
 297
 298         drm_modeset_lock_all(dev);
 299         intel_modeset_setup_hw_state(i915, dev->mode_config.acquire_ctx);
 300         intel_acpi_assign_connector_fwnodes(i915);
 301         drm_modeset_unlock_all(dev);
 302
 303         for_each_intel_crtc(dev, crtc) {
 304                 if (!to_intel_crtc_state(crtc->base.state)->uapi.active)
 305                         continue;
 306                 intel_crtc_initial_plane_config(crtc);
 307         }
 308
 309         /*
 310          * Make sure hardware watermarks really match the state we read out.
 311          * Note that we need to do this after reconstructing the BIOS fb's
 312          * since the watermark calculation done here will use pstate->fb.
 313          */
 314         if (!HAS_GMCH(i915))
 315                 ilk_wm_sanitize(i915);
 316
 317         return 0;
 318 }
 319
 320 /* part #3: call after gem init */
 321 int intel_display_driver_probe(struct drm_i915_private *i915)
 322 {
 323         int ret;
 324
 325         if (!HAS_DISPLAY(i915))
 326                 return 0;
 327
 328         /*
 329          * Force all active planes to recompute their states. So that on
 330          * mode_setcrtc after probe, all the intel_plane_state variables
 331          * are already calculated and there is no assert_plane warnings
 332          * during bootup.
 333          */
 334         ret = intel_initial_commit(&i915->drm);
 335         if (ret)
 336                 drm_dbg_kms(&i915->drm, "Initial modeset failed, %d\n", ret);
 337
 338         intel_overlay_setup(i915);
 339
 340         ret = intel_fbdev_init(&i915->drm);
 341         if (ret)
 342                 return ret;
 343
 344         /* Only enable hotplug handling once the fbdev is fully set up. */
 345         intel_hpd_init(i915);
 346         intel_hpd_poll_disable(i915);
 347
 348         skl_watermark_ipc_init(i915);
 349
 350         return 0;
 351 }
 352
 353 void intel_display_driver_register(struct drm_i915_private *i915)
 354 {
 355         if (!HAS_DISPLAY(i915))
 356                 return;
 357
 358         /* Must be done after probing outputs */
 359         intel_opregion_register(i915);
 360         intel_acpi_video_register(i915);
 361
 362         intel_audio_init(i915);
 363
 364         intel_display_debugfs_register(i915);
 365
 366         /*
 367          * Some ports require correctly set-up hpd registers for
 368          * detection to work properly (leading to ghost connected
 369          * connector status), e.g. VGA on gm45.  Hence we can only set
 370          * up the initial fbdev config after hpd irqs are fully
 371          * enabled. We do it last so that the async config cannot run
 372          * before the connectors are registered.
 373          */
 374         intel_fbdev_initial_config_async(i915);
 375
 376         /*
 377          * We need to coordinate the hotplugs with the asynchronous
 378          * fbdev configuration, for which we use the
 379          * fbdev->async_cookie.
 380          */
 381         drm_kms_helper_poll_init(&i915->drm);
 382 }
 383
 384 /* part #1: call before irq uninstall */
 385 void intel_display_driver_remove(struct drm_i915_private *i915)
 386 {
 387         if (!HAS_DISPLAY(i915))
 388                 return;
 389
 390         flush_workqueue(i915->display.wq.flip);
 391         flush_workqueue(i915->display.wq.modeset);
 392
 393         flush_work(&i915->display.atomic_helper.free_work);
 394         drm_WARN_ON(&i915->drm, !llist_empty(&i915->display.atomic_helper.free_list));
 395
 396         /*
 397          * MST topology needs to be suspended so we don't have any calls to
 398          * fbdev after it's finalized. MST will be destroyed later as part of
 399          * drm_mode_config_cleanup()
 400          */
 401         intel_dp_mst_suspend(i915);
 402 }
 403
 404 /* part #2: call after irq uninstall */
 405 void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
 406 {
 407         if (!HAS_DISPLAY(i915))
 408                 return;
 409
 410         /*
 411          * Due to the hpd irq storm handling the hotplug work can re-arm the
 412          * poll handlers. Hence disable polling after hpd handling is shut down.
 413          */
 414         intel_hpd_poll_fini(i915);
 415
 416         /* poll work can call into fbdev, hence clean that up afterwards */
 417         intel_fbdev_fini(i915);
 418
 419         intel_unregister_dsm_handler();
 420
 421         /* flush any delayed tasks or pending work */
 422         flush_scheduled_work();
 423
 424         intel_hdcp_component_fini(i915);
 425
 426         intel_mode_config_cleanup(i915);
 427
 428         intel_overlay_cleanup(i915);
 429
 430         intel_gmbus_teardown(i915);
 431
 432         destroy_workqueue(i915->display.wq.flip);
 433         destroy_workqueue(i915->display.wq.modeset);
 434
 435         intel_fbc_cleanup(i915);
 436 }
 437
 438 /* part #3: call after gem init */
 439 void intel_display_driver_remove_nogem(struct drm_i915_private *i915)
 440 {
 441         intel_dmc_fini(i915);
 442
 443         intel_power_domains_driver_remove(i915);
 444
 445         intel_vga_unregister(i915);
 446
 447         intel_bios_driver_remove(i915);
 448 }
 449
 450 void intel_display_driver_unregister(struct drm_i915_private *i915)
 451 {
 452         if (!HAS_DISPLAY(i915))
 453                 return;
 454
 455         intel_fbdev_unregister(i915);
 456         intel_audio_deinit(i915);
 457
 458         /*
 459          * After flushing the fbdev (incl. a late async config which
 460          * will have delayed queuing of a hotplug event), then flush
 461          * the hotplug events.
 462          */
 463         drm_kms_helper_poll_fini(&i915->drm);
 464         drm_atomic_helper_shutdown(&i915->drm);
 465
 466         acpi_video_unregister();
 467         intel_opregion_unregister(i915);
 468 }
 469
 470 /*
 471  * turn all crtc's off, but do not adjust state
 472  * This has to be paired with a call to intel_modeset_setup_hw_state.
 473  */
 474 int intel_display_driver_suspend(struct drm_i915_private *i915)
 475 {
 476         struct drm_atomic_state *state;
 477         int ret;
 478
 479         if (!HAS_DISPLAY(i915))
 480                 return 0;
 481
 482         state = drm_atomic_helper_suspend(&i915->drm);
 483         ret = PTR_ERR_OR_ZERO(state);
 484         if (ret)
 485                 drm_err(&i915->drm, "Suspending crtc's failed with %i\n",
 486                         ret);
 487         else
 488                 i915->display.restore.modeset_state = state;
 489         return ret;
 490 }
 491
 492 int
 493 __intel_display_driver_resume(struct drm_i915_private *i915,
 494                               struct drm_atomic_state *state,
 495                               struct drm_modeset_acquire_ctx *ctx)
 496 {
 497         struct drm_crtc_state *crtc_state;
 498         struct drm_crtc *crtc;
 499         int ret, i;
 500
 501         intel_modeset_setup_hw_state(i915, ctx);
 502         intel_vga_redisable(i915);
 503
 504         if (!state)
 505                 return 0;
 506
 507         /*
 508          * We've duplicated the state, pointers to the old state are invalid.
 509          *
 510          * Don't attempt to use the old state until we commit the duplicated state.
 511          */
 512         for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
 513                 /*
 514                  * Force recalculation even if we restore
 515                  * current state. With fast modeset this may not result
 516                  * in a modeset when the state is compatible.
 517                  */
 518                 crtc_state->mode_changed = true;
 519         }
 520
 521         /* ignore any reset values/BIOS leftovers in the WM registers */
 522         if (!HAS_GMCH(i915))
 523                 to_intel_atomic_state(state)->skip_intermediate_wm = true;
 524
 525         ret = drm_atomic_helper_commit_duplicated_state(state, ctx);
 526
 527         drm_WARN_ON(&i915->drm, ret == -EDEADLK);
 528
 529         return ret;
 530 }
 531
 532 void intel_display_driver_resume(struct drm_i915_private *i915)
 533 {
 534         struct drm_atomic_state *state = i915->display.restore.modeset_state;
 535         struct drm_modeset_acquire_ctx ctx;
 536         int ret;
 537
 538         if (!HAS_DISPLAY(i915))
 539                 return;
 540
 541         i915->display.restore.modeset_state = NULL;
 542         if (state)
 543                 state->acquire_ctx = &ctx;
 544
 545         drm_modeset_acquire_init(&ctx, 0);
 546
 547         while (1) {
 548                 ret = drm_modeset_lock_all_ctx(&i915->drm, &ctx);
 549                 if (ret != -EDEADLK)
 550                         break;
 551
 552                 drm_modeset_backoff(&ctx);
 553         }
 554
 555         if (!ret)
 556                 ret = __intel_display_driver_resume(i915, state, &ctx);
 557
 558         skl_watermark_ipc_update(i915);
 559         drm_modeset_drop_locks(&ctx);
 560         drm_modeset_acquire_fini(&ctx);
 561
 562         if (ret)
 563                 drm_err(&i915->drm,
 564                         "Restoring old state failed with %i\n", ret);
 565         if (state)
 566                 drm_atomic_state_put(state);
 567 }