drivers/gpu/drm/i915/display/intel_display_driver.c

   1 // SPDX-License-Identifier: MIT
   2 /*
   3  * Copyright © 2022-2023 Intel Corporation
   4  *
   5  * High level display driver entry points. This is a layer between top level
   6  * driver code and low level display functionality; no low level display code or
   7  * details here.
   8  */
   9
  10 #include <linux/vga_switcheroo.h>
  11 #include <acpi/video.h>
  12 #include <drm/display/drm_dp_mst_helper.h>
  13 #include <drm/drm_atomic_helper.h>
  14 #include <drm/drm_mode_config.h>
  15 #include <drm/drm_privacy_screen_consumer.h>
  16 #include <drm/drm_probe_helper.h>
  17 #include <drm/drm_vblank.h>
  18
  19 #include "i915_drv.h"
  20 #include "i9xx_wm.h"
  21 #include "intel_acpi.h"
  22 #include "intel_atomic.h"
  23 #include "intel_audio.h"
  24 #include "intel_bios.h"
  25 #include "intel_bw.h"
  26 #include "intel_cdclk.h"
  27 #include "intel_color.h"
  28 #include "intel_crtc.h"
  29 #include "intel_display_debugfs.h"
  30 #include "intel_display_driver.h"
  31 #include "intel_display_power.h"
  32 #include "intel_display_types.h"
  33 #include "intel_dmc.h"
  34 #include "intel_dp.h"
  35 #include "intel_dpll.h"
  36 #include "intel_dpll_mgr.h"
  37 #include "intel_fb.h"
  38 #include "intel_fbc.h"
  39 #include "intel_fbdev.h"
  40 #include "intel_fdi.h"
  41 #include "intel_gmbus.h"
  42 #include "intel_hdcp.h"
  43 #include "intel_hotplug.h"
  44 #include "intel_hti.h"
  45 #include "intel_modeset_setup.h"
  46 #include "intel_opregion.h"
  47 #include "intel_overlay.h"
  48 #include "intel_plane_initial.h"
  49 #include "intel_pps.h"
  50 #include "intel_quirks.h"
  51 #include "intel_vga.h"
  52 #include "intel_wm.h"
  53 #include "skl_watermark.h"
  54
  55 bool intel_display_driver_probe_defer(struct pci_dev *pdev)
  56 {
  57         struct drm_privacy_screen *privacy_screen;
  58
  59         /*
  60          * apple-gmux is needed on dual GPU MacBook Pro
  61          * to probe the panel if we're the inactive GPU.
  62          */
  63         if (vga_switcheroo_client_probe_defer(pdev))
  64                 return true;
  65
  66         /* If the LCD panel has a privacy-screen, wait for it */
  67         privacy_screen = drm_privacy_screen_get(&pdev->dev, NULL);
  68         if (IS_ERR(privacy_screen) && PTR_ERR(privacy_screen) == -EPROBE_DEFER)
  69                 return true;
  70
  71         drm_privacy_screen_put(privacy_screen);
  72
  73         return false;
  74 }
  75
  76 void intel_display_driver_init_hw(struct drm_i915_private *i915)
  77 {
  78         struct intel_cdclk_state *cdclk_state;
  79
  80         if (!HAS_DISPLAY(i915))
  81                 return;
  82
  83         cdclk_state = to_intel_cdclk_state(i915->display.cdclk.obj.state);
  84
  85         intel_update_cdclk(i915);
  86         intel_cdclk_dump_config(i915, &i915->display.cdclk.hw, "Current CDCLK");
  87         cdclk_state->logical = cdclk_state->actual = i915->display.cdclk.hw;
  88 }
  89
  90 static const struct drm_mode_config_funcs intel_mode_funcs = {
  91         .fb_create = intel_user_framebuffer_create,
  92         .get_format_info = intel_fb_get_format_info,
  93         .output_poll_changed = intel_fbdev_output_poll_changed,
  94         .mode_valid = intel_mode_valid,
  95         .atomic_check = intel_atomic_check,
  96         .atomic_commit = intel_atomic_commit,
  97         .atomic_state_alloc = intel_atomic_state_alloc,
  98         .atomic_state_clear = intel_atomic_state_clear,
  99         .atomic_state_free = intel_atomic_state_free,
 100 };
 101
 102 static const struct drm_mode_config_helper_funcs intel_mode_config_funcs = {
 103         .atomic_commit_setup = drm_dp_mst_atomic_setup_commit,
 104 };
 105
 106 static void intel_mode_config_init(struct drm_i915_private *i915)
 107 {
 108         struct drm_mode_config *mode_config = &i915->drm.mode_config;
 109
 110         drm_mode_config_init(&i915->drm);
 111         INIT_LIST_HEAD(&i915->display.global.obj_list);
 112
 113         mode_config->min_width = 0;
 114         mode_config->min_height = 0;
 115
 116         mode_config->preferred_depth = 24;
 117         mode_config->prefer_shadow = 1;
 118
 119         mode_config->funcs = &intel_mode_funcs;
 120         mode_config->helper_private = &intel_mode_config_funcs;
 121
 122         mode_config->async_page_flip = HAS_ASYNC_FLIPS(i915);
 123
 124         /*
 125          * Maximum framebuffer dimensions, chosen to match
 126          * the maximum render engine surface size on gen4+.
 127          */
 128         if (DISPLAY_VER(i915) >= 7) {
 129                 mode_config->max_width = 16384;
 130                 mode_config->max_height = 16384;
 131         } else if (DISPLAY_VER(i915) >= 4) {
 132                 mode_config->max_width = 8192;
 133                 mode_config->max_height = 8192;
 134         } else if (DISPLAY_VER(i915) == 3) {
 135                 mode_config->max_width = 4096;
 136                 mode_config->max_height = 4096;
 137         } else {
 138                 mode_config->max_width = 2048;
 139                 mode_config->max_height = 2048;
 140         }
 141
 142         if (IS_I845G(i915) || IS_I865G(i915)) {
 143                 mode_config->cursor_width = IS_I845G(i915) ? 64 : 512;
 144                 mode_config->cursor_height = 1023;
 145         } else if (IS_I830(i915) || IS_I85X(i915) ||
 146                    IS_I915G(i915) || IS_I915GM(i915)) {
 147                 mode_config->cursor_width = 64;
 148                 mode_config->cursor_height = 64;
 149         } else {
 150                 mode_config->cursor_width = 256;
 151                 mode_config->cursor_height = 256;
 152         }
 153 }
 154
 155 static void intel_mode_config_cleanup(struct drm_i915_private *i915)
 156 {
 157         intel_atomic_global_obj_cleanup(i915);
 158         drm_mode_config_cleanup(&i915->drm);
 159 }
 160
 161 static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
 162 {
 163         struct intel_plane *plane;
 164
 165         for_each_intel_plane(&dev_priv->drm, plane) {
 166                 struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv,
 167                                                               plane->pipe);
 168
 169                 plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
 170         }
 171 }
 172
 173 void intel_display_driver_early_probe(struct drm_i915_private *i915)
 174 {
 175         if (!HAS_DISPLAY(i915))
 176                 return;
 177
 178         intel_color_init_hooks(i915);
 179         intel_init_cdclk_hooks(i915);
 180         intel_audio_hooks_init(i915);
 181         intel_dpll_init_clock_hook(i915);
 182         intel_init_display_hooks(i915);
 183         intel_fdi_init_hook(i915);
 184 }
 185
 186 /* part #1: call before irq install */
 187 int intel_display_driver_probe_noirq(struct drm_i915_private *i915)
 188 {
 189         int ret;
 190
 191         if (i915_inject_probe_failure(i915))
 192                 return -ENODEV;
 193
 194         if (HAS_DISPLAY(i915)) {
 195                 ret = drm_vblank_init(&i915->drm,
 196                                       INTEL_NUM_PIPES(i915));
 197                 if (ret)
 198                         return ret;
 199         }
 200
 201         intel_bios_init(i915);
 202
 203         ret = intel_vga_register(i915);
 204         if (ret)
 205                 goto cleanup_bios;
 206
 207         /* FIXME: completely on the wrong abstraction layer */
 208         ret = intel_power_domains_init(i915);
 209         if (ret < 0)
 210                 goto cleanup_vga;
 211
 212         intel_power_domains_init_hw(i915, false);
 213
 214         if (!HAS_DISPLAY(i915))
 215                 return 0;
 216
 217         intel_dmc_init(i915);
 218
 219         i915->display.wq.modeset = alloc_ordered_workqueue("i915_modeset", 0);
 220         i915->display.wq.flip = alloc_workqueue("i915_flip", WQ_HIGHPRI |
 221                                                 WQ_UNBOUND, WQ_UNBOUND_MAX_ACTIVE);
 222
 223         intel_mode_config_init(i915);
 224
 225         ret = intel_cdclk_init(i915);
 226         if (ret)
 227                 goto cleanup_vga_client_pw_domain_dmc;
 228
 229         ret = intel_color_init(i915);
 230         if (ret)
 231                 goto cleanup_vga_client_pw_domain_dmc;
 232
 233         ret = intel_dbuf_init(i915);
 234         if (ret)
 235                 goto cleanup_vga_client_pw_domain_dmc;
 236
 237         ret = intel_bw_init(i915);
 238         if (ret)
 239                 goto cleanup_vga_client_pw_domain_dmc;
 240
 241         init_llist_head(&i915->display.atomic_helper.free_list);
 242         INIT_WORK(&i915->display.atomic_helper.free_work,
 243                   intel_atomic_helper_free_state_worker);
 244
 245         intel_init_quirks(i915);
 246
 247         intel_fbc_init(i915);
 248
 249         return 0;
 250
 251 cleanup_vga_client_pw_domain_dmc:
 252         intel_dmc_fini(i915);
 253         intel_power_domains_driver_remove(i915);
 254 cleanup_vga:
 255         intel_vga_unregister(i915);
 256 cleanup_bios:
 257         intel_bios_driver_remove(i915);
 258
 259         return ret;
 260 }
 261
 262 /* part #2: call after irq install, but before gem init */
 263 int intel_display_driver_probe_nogem(struct drm_i915_private *i915)
 264 {
 265         struct drm_device *dev = &i915->drm;
 266         enum pipe pipe;
 267         struct intel_crtc *crtc;
 268         int ret;
 269
 270         if (!HAS_DISPLAY(i915))
 271                 return 0;
 272
 273         intel_wm_init(i915);
 274
 275         intel_panel_sanitize_ssc(i915);
 276
 277         intel_pps_setup(i915);
 278
 279         intel_gmbus_setup(i915);
 280
 281         drm_dbg_kms(&i915->drm, "%d display pipe%s available.\n",
 282                     INTEL_NUM_PIPES(i915),
 283                     INTEL_NUM_PIPES(i915) > 1 ? "s" : "");
 284
 285         for_each_pipe(i915, pipe) {
 286                 ret = intel_crtc_init(i915, pipe);
 287                 if (ret) {
 288                         intel_mode_config_cleanup(i915);
 289                         return ret;
 290                 }
 291         }
 292
 293         intel_plane_possible_crtcs_init(i915);
 294         intel_shared_dpll_init(i915);
 295         intel_fdi_pll_freq_update(i915);
 296
 297         intel_update_czclk(i915);
 298         intel_display_driver_init_hw(i915);
 299         intel_dpll_update_ref_clks(i915);
 300
 301         intel_hdcp_component_init(i915);
 302
 303         if (i915->display.cdclk.max_cdclk_freq == 0)
 304                 intel_update_max_cdclk(i915);
 305
 306         intel_hti_init(i915);
 307
 308         /* Just disable it once at startup */
 309         intel_vga_disable(i915);
 310         intel_setup_outputs(i915);
 311
 312         drm_modeset_lock_all(dev);
 313         intel_modeset_setup_hw_state(i915, dev->mode_config.acquire_ctx);
 314         intel_acpi_assign_connector_fwnodes(i915);
 315         drm_modeset_unlock_all(dev);
 316
 317         for_each_intel_crtc(dev, crtc) {
 318                 if (!to_intel_crtc_state(crtc->base.state)->uapi.active)
 319                         continue;
 320                 intel_crtc_initial_plane_config(crtc);
 321         }
 322
 323         /*
 324          * Make sure hardware watermarks really match the state we read out.
 325          * Note that we need to do this after reconstructing the BIOS fb's
 326          * since the watermark calculation done here will use pstate->fb.
 327          */
 328         if (!HAS_GMCH(i915))
 329                 ilk_wm_sanitize(i915);
 330
 331         return 0;
 332 }
 333
 334 /* part #3: call after gem init */
 335 int intel_display_driver_probe(struct drm_i915_private *i915)
 336 {
 337         int ret;
 338
 339         if (!HAS_DISPLAY(i915))
 340                 return 0;
 341
 342         /*
 343          * Force all active planes to recompute their states. So that on
 344          * mode_setcrtc after probe, all the intel_plane_state variables
 345          * are already calculated and there is no assert_plane warnings
 346          * during bootup.
 347          */
 348         ret = intel_initial_commit(&i915->drm);
 349         if (ret)
 350                 drm_dbg_kms(&i915->drm, "Initial modeset failed, %d\n", ret);
 351
 352         intel_overlay_setup(i915);
 353
 354         ret = intel_fbdev_init(&i915->drm);
 355         if (ret)
 356                 return ret;
 357
 358         /* Only enable hotplug handling once the fbdev is fully set up. */
 359         intel_hpd_init(i915);
 360         intel_hpd_poll_disable(i915);
 361
 362         skl_watermark_ipc_init(i915);
 363
 364         return 0;
 365 }
 366
 367 void intel_display_driver_register(struct drm_i915_private *i915)
 368 {
 369         if (!HAS_DISPLAY(i915))
 370                 return;
 371
 372         /* Must be done after probing outputs */
 373         intel_opregion_register(i915);
 374         intel_acpi_video_register(i915);
 375
 376         intel_audio_init(i915);
 377
 378         intel_display_debugfs_register(i915);
 379
 380         /*
 381          * Some ports require correctly set-up hpd registers for
 382          * detection to work properly (leading to ghost connected
 383          * connector status), e.g. VGA on gm45.  Hence we can only set
 384          * up the initial fbdev config after hpd irqs are fully
 385          * enabled. We do it last so that the async config cannot run
 386          * before the connectors are registered.
 387          */
 388         intel_fbdev_initial_config_async(i915);
 389
 390         /*
 391          * We need to coordinate the hotplugs with the asynchronous
 392          * fbdev configuration, for which we use the
 393          * fbdev->async_cookie.
 394          */
 395         drm_kms_helper_poll_init(&i915->drm);
 396 }
 397
 398 /* part #1: call before irq uninstall */
 399 void intel_display_driver_remove(struct drm_i915_private *i915)
 400 {
 401         if (!HAS_DISPLAY(i915))
 402                 return;
 403
 404         flush_workqueue(i915->display.wq.flip);
 405         flush_workqueue(i915->display.wq.modeset);
 406
 407         flush_work(&i915->display.atomic_helper.free_work);
 408         drm_WARN_ON(&i915->drm, !llist_empty(&i915->display.atomic_helper.free_list));
 409
 410         /*
 411          * MST topology needs to be suspended so we don't have any calls to
 412          * fbdev after it's finalized. MST will be destroyed later as part of
 413          * drm_mode_config_cleanup()
 414          */
 415         intel_dp_mst_suspend(i915);
 416 }
 417
 418 /* part #2: call after irq uninstall */
 419 void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
 420 {
 421         if (!HAS_DISPLAY(i915))
 422                 return;
 423
 424         /*
 425          * Due to the hpd irq storm handling the hotplug work can re-arm the
 426          * poll handlers. Hence disable polling after hpd handling is shut down.
 427          */
 428         intel_hpd_poll_fini(i915);
 429
 430         /* poll work can call into fbdev, hence clean that up afterwards */
 431         intel_fbdev_fini(i915);
 432
 433         intel_unregister_dsm_handler();
 434
 435         /* flush any delayed tasks or pending work */
 436         flush_scheduled_work();
 437
 438         intel_hdcp_component_fini(i915);
 439
 440         intel_mode_config_cleanup(i915);
 441
 442         intel_overlay_cleanup(i915);
 443
 444         intel_gmbus_teardown(i915);
 445
 446         destroy_workqueue(i915->display.wq.flip);
 447         destroy_workqueue(i915->display.wq.modeset);
 448
 449         intel_fbc_cleanup(i915);
 450 }
 451
 452 /* part #3: call after gem init */
 453 void intel_display_driver_remove_nogem(struct drm_i915_private *i915)
 454 {
 455         intel_dmc_fini(i915);
 456
 457         intel_power_domains_driver_remove(i915);
 458
 459         intel_vga_unregister(i915);
 460
 461         intel_bios_driver_remove(i915);
 462 }
 463
 464 void intel_display_driver_unregister(struct drm_i915_private *i915)
 465 {
 466         if (!HAS_DISPLAY(i915))
 467                 return;
 468
 469         intel_fbdev_unregister(i915);
 470         intel_audio_deinit(i915);
 471
 472         /*
 473          * After flushing the fbdev (incl. a late async config which
 474          * will have delayed queuing of a hotplug event), then flush
 475          * the hotplug events.
 476          */
 477         drm_kms_helper_poll_fini(&i915->drm);
 478         drm_atomic_helper_shutdown(&i915->drm);
 479
 480         acpi_video_unregister();
 481         intel_opregion_unregister(i915);
 482 }
 483
 484 /*
 485  * turn all crtc's off, but do not adjust state
 486  * This has to be paired with a call to intel_modeset_setup_hw_state.
 487  */
 488 int intel_display_driver_suspend(struct drm_i915_private *i915)
 489 {
 490         struct drm_atomic_state *state;
 491         int ret;
 492
 493         if (!HAS_DISPLAY(i915))
 494                 return 0;
 495
 496         state = drm_atomic_helper_suspend(&i915->drm);
 497         ret = PTR_ERR_OR_ZERO(state);
 498         if (ret)
 499                 drm_err(&i915->drm, "Suspending crtc's failed with %i\n",
 500                         ret);
 501         else
 502                 i915->display.restore.modeset_state = state;
 503         return ret;
 504 }
 505
 506 int
 507 __intel_display_driver_resume(struct drm_i915_private *i915,
 508                               struct drm_atomic_state *state,
 509                               struct drm_modeset_acquire_ctx *ctx)
 510 {
 511         struct drm_crtc_state *crtc_state;
 512         struct drm_crtc *crtc;
 513         int ret, i;
 514
 515         intel_modeset_setup_hw_state(i915, ctx);
 516         intel_vga_redisable(i915);
 517
 518         if (!state)
 519                 return 0;
 520
 521         /*
 522          * We've duplicated the state, pointers to the old state are invalid.
 523          *
 524          * Don't attempt to use the old state until we commit the duplicated state.
 525          */
 526         for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
 527                 /*
 528                  * Force recalculation even if we restore
 529                  * current state. With fast modeset this may not result
 530                  * in a modeset when the state is compatible.
 531                  */
 532                 crtc_state->mode_changed = true;
 533         }
 534
 535         /* ignore any reset values/BIOS leftovers in the WM registers */
 536         if (!HAS_GMCH(i915))
 537                 to_intel_atomic_state(state)->skip_intermediate_wm = true;
 538
 539         ret = drm_atomic_helper_commit_duplicated_state(state, ctx);
 540
 541         drm_WARN_ON(&i915->drm, ret == -EDEADLK);
 542
 543         return ret;
 544 }
 545
 546 void intel_display_driver_resume(struct drm_i915_private *i915)
 547 {
 548         struct drm_atomic_state *state = i915->display.restore.modeset_state;
 549         struct drm_modeset_acquire_ctx ctx;
 550         int ret;
 551
 552         if (!HAS_DISPLAY(i915))
 553                 return;
 554
 555         i915->display.restore.modeset_state = NULL;
 556         if (state)
 557                 state->acquire_ctx = &ctx;
 558
 559         drm_modeset_acquire_init(&ctx, 0);
 560
 561         while (1) {
 562                 ret = drm_modeset_lock_all_ctx(&i915->drm, &ctx);
 563                 if (ret != -EDEADLK)
 564                         break;
 565
 566                 drm_modeset_backoff(&ctx);
 567         }
 568
 569         if (!ret)
 570                 ret = __intel_display_driver_resume(i915, state, &ctx);
 571
 572         skl_watermark_ipc_update(i915);
 573         drm_modeset_drop_locks(&ctx);
 574         drm_modeset_acquire_fini(&ctx);
 575
 576         if (ret)
 577                 drm_err(&i915->drm,
 578                         "Restoring old state failed with %i\n", ret);
 579         if (state)
 580                 drm_atomic_state_put(state);
 581 }