2 * Copyright © 2006 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Eric Anholt <eric@anholt.net>
28 #include <drm/display/drm_dp_helper.h>
29 #include <drm/display/drm_dsc_helper.h>
30 #include <drm/drm_edid.h>
34 #include "intel_display.h"
35 #include "intel_display_types.h"
36 #include "intel_gmbus.h"
38 #define _INTEL_BIOS_PRIVATE
39 #include "intel_vbt_defs.h"
42 * DOC: Video BIOS Table (VBT)
44 * The Video BIOS Table, or VBT, provides platform and board specific
45 * configuration information to the driver that is not discoverable or available
46 * through other means. The configuration is mostly related to display
47 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
50 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
51 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
52 * contain the actual configuration information. The VBT Header, and thus the
53 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
54 * BDB Header. The data blocks are concatenated after the BDB Header. The data
55 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
56 * data. (Block 53, the MIPI Sequence Block is an exception.)
58 * The driver parses the VBT during load. The relevant information is stored in
59 * driver private data for ease of use, and the actual VBT is not read after
63 /* Wrapper for VBT child device config */
64 struct intel_bios_encoder_data {
65 struct drm_i915_private *i915;
67 struct child_device_config child;
68 struct dsc_compression_parameters_entry *dsc;
69 struct list_head node;
72 #define SLAVE_ADDR1 0x70
73 #define SLAVE_ADDR2 0x72
75 /* Get BDB block size given a pointer to Block ID. */
76 static u32 _get_blocksize(const u8 *block_base)
78 /* The MIPI Sequence Block v3+ has a separate size field. */
79 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
80 return *((const u32 *)(block_base + 4));
82 return *((const u16 *)(block_base + 1));
85 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
86 static u32 get_blocksize(const void *block_data)
88 return _get_blocksize(block_data - 3);
92 find_raw_section(const void *_bdb, enum bdb_block_id section_id)
94 const struct bdb_header *bdb = _bdb;
95 const u8 *base = _bdb;
97 u32 total, current_size;
98 enum bdb_block_id current_id;
100 /* skip to first section */
101 index += bdb->header_size;
102 total = bdb->bdb_size;
104 /* walk the sections looking for section_id */
105 while (index + 3 < total) {
106 current_id = *(base + index);
107 current_size = _get_blocksize(base + index);
110 if (index + current_size > total)
113 if (current_id == section_id)
116 index += current_size;
123 * Offset from the start of BDB to the start of the
124 * block data (just past the block header).
126 static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
130 block = find_raw_section(bdb, section_id);
137 struct bdb_block_entry {
138 struct list_head node;
139 enum bdb_block_id section_id;
144 find_section(struct drm_i915_private *i915,
145 enum bdb_block_id section_id)
147 struct bdb_block_entry *entry;
149 list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) {
150 if (entry->section_id == section_id)
151 return entry->data + 3;
157 static const struct {
158 enum bdb_block_id section_id;
161 { .section_id = BDB_GENERAL_FEATURES,
162 .min_size = sizeof(struct bdb_general_features), },
163 { .section_id = BDB_GENERAL_DEFINITIONS,
164 .min_size = sizeof(struct bdb_general_definitions), },
165 { .section_id = BDB_PSR,
166 .min_size = sizeof(struct bdb_psr), },
167 { .section_id = BDB_DRIVER_FEATURES,
168 .min_size = sizeof(struct bdb_driver_features), },
169 { .section_id = BDB_SDVO_LVDS_OPTIONS,
170 .min_size = sizeof(struct bdb_sdvo_lvds_options), },
171 { .section_id = BDB_SDVO_PANEL_DTDS,
172 .min_size = sizeof(struct bdb_sdvo_panel_dtds), },
173 { .section_id = BDB_EDP,
174 .min_size = sizeof(struct bdb_edp), },
175 { .section_id = BDB_LVDS_OPTIONS,
176 .min_size = sizeof(struct bdb_lvds_options), },
178 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
179 * so keep the two ordered.
181 { .section_id = BDB_LVDS_LFP_DATA_PTRS,
182 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
183 { .section_id = BDB_LVDS_LFP_DATA,
184 .min_size = 0, /* special case */ },
185 { .section_id = BDB_LVDS_BACKLIGHT,
186 .min_size = sizeof(struct bdb_lfp_backlight_data), },
187 { .section_id = BDB_LFP_POWER,
188 .min_size = sizeof(struct bdb_lfp_power), },
189 { .section_id = BDB_MIPI_CONFIG,
190 .min_size = sizeof(struct bdb_mipi_config), },
191 { .section_id = BDB_MIPI_SEQUENCE,
192 .min_size = sizeof(struct bdb_mipi_sequence) },
193 { .section_id = BDB_COMPRESSION_PARAMETERS,
194 .min_size = sizeof(struct bdb_compression_parameters), },
195 { .section_id = BDB_GENERIC_DTD,
196 .min_size = sizeof(struct bdb_generic_dtd), },
199 static size_t lfp_data_min_size(struct drm_i915_private *i915)
201 const struct bdb_lvds_lfp_data_ptrs *ptrs;
204 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
208 size = sizeof(struct bdb_lvds_lfp_data);
209 if (ptrs->panel_name.table_size)
210 size = max(size, ptrs->panel_name.offset +
211 sizeof(struct bdb_lvds_lfp_data_tail));
216 static bool validate_lfp_data_ptrs(const void *bdb,
217 const struct bdb_lvds_lfp_data_ptrs *ptrs)
219 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
220 int data_block_size, lfp_data_size;
221 const void *data_block;
224 data_block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
228 data_block_size = get_blocksize(data_block);
229 if (data_block_size == 0)
232 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
233 if (ptrs->lvds_entries != 3)
236 fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
237 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
238 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
239 panel_name_size = ptrs->panel_name.table_size;
241 /* fp_timing has variable size */
242 if (fp_timing_size < 32 ||
243 dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
244 panel_pnp_id_size != sizeof(struct lvds_pnp_id))
247 /* panel_name is not present in old VBTs */
248 if (panel_name_size != 0 &&
249 panel_name_size != sizeof(struct lvds_lfp_panel_name))
252 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
253 if (16 * lfp_data_size > data_block_size)
256 /* make sure the table entries have uniform size */
257 for (i = 1; i < 16; i++) {
258 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
259 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
260 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
263 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
264 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
265 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
270 * Except for vlv/chv machines all real VBTs seem to have 6
271 * unaccounted bytes in the fp_timing table. And it doesn't
272 * appear to be a really intentional hole as the fp_timing
273 * 0xffff terminator is always within those 6 missing bytes.
275 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size)
278 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
281 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||
282 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
283 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
286 /* make sure the tables fit inside the data block */
287 for (i = 0; i < 16; i++) {
288 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
289 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
290 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
294 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
297 /* make sure fp_timing terminators are present at expected locations */
298 for (i = 0; i < 16; i++) {
299 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +
309 /* make the data table offsets relative to the data block */
310 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
312 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block;
316 offset = raw_block_offset(bdb, BDB_LVDS_LFP_DATA);
318 for (i = 0; i < 16; i++) {
319 if (ptrs->ptr[i].fp_timing.offset < offset ||
320 ptrs->ptr[i].dvo_timing.offset < offset ||
321 ptrs->ptr[i].panel_pnp_id.offset < offset)
324 ptrs->ptr[i].fp_timing.offset -= offset;
325 ptrs->ptr[i].dvo_timing.offset -= offset;
326 ptrs->ptr[i].panel_pnp_id.offset -= offset;
329 if (ptrs->panel_name.table_size) {
330 if (ptrs->panel_name.offset < offset)
333 ptrs->panel_name.offset -= offset;
336 return validate_lfp_data_ptrs(bdb, ptrs);
339 static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
340 int table_size, int total_size)
342 if (total_size < table_size)
345 table->table_size = table_size;
346 table->offset = total_size - table_size;
348 return total_size - table_size;
351 static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
352 const struct lvds_lfp_data_ptr_table *prev,
355 next->table_size = prev->table_size;
356 next->offset = prev->offset + size;
359 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
362 int i, size, table_size, block_size, offset, fp_timing_size;
363 struct bdb_lvds_lfp_data_ptrs *ptrs;
368 * The hardcoded fp_timing_size is only valid for
369 * modernish VBTs. All older VBTs definitely should
370 * include block 41 and thus we don't need to
373 if (i915->display.vbt.version < 155)
378 block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
382 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
384 block_size = get_blocksize(block);
386 size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
387 sizeof(struct lvds_pnp_id);
388 if (size * 16 > block_size)
391 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
395 *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
396 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
397 ptrs = ptrs_block + 3;
399 table_size = sizeof(struct lvds_pnp_id);
400 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
402 table_size = sizeof(struct lvds_dvo_timing);
403 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
405 table_size = fp_timing_size;
406 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
408 if (ptrs->ptr[0].fp_timing.table_size)
409 ptrs->lvds_entries++;
410 if (ptrs->ptr[0].dvo_timing.table_size)
411 ptrs->lvds_entries++;
412 if (ptrs->ptr[0].panel_pnp_id.table_size)
413 ptrs->lvds_entries++;
415 if (size != 0 || ptrs->lvds_entries != 3) {
420 size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
421 sizeof(struct lvds_pnp_id);
422 for (i = 1; i < 16; i++) {
423 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
424 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
425 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
428 table_size = sizeof(struct lvds_lfp_panel_name);
430 if (16 * (size + table_size) <= block_size) {
431 ptrs->panel_name.table_size = table_size;
432 ptrs->panel_name.offset = size * 16;
435 offset = block - bdb;
437 for (i = 0; i < 16; i++) {
438 ptrs->ptr[i].fp_timing.offset += offset;
439 ptrs->ptr[i].dvo_timing.offset += offset;
440 ptrs->ptr[i].panel_pnp_id.offset += offset;
443 if (ptrs->panel_name.table_size)
444 ptrs->panel_name.offset += offset;
450 init_bdb_block(struct drm_i915_private *i915,
451 const void *bdb, enum bdb_block_id section_id,
454 struct bdb_block_entry *entry;
455 void *temp_block = NULL;
459 block = find_raw_section(bdb, section_id);
461 /* Modern VBTs lack the LFP data table pointers block, make one up */
462 if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) {
463 temp_block = generate_lfp_data_ptrs(i915, bdb);
465 block = temp_block + 3;
470 drm_WARN(&i915->drm, min_size == 0,
471 "Block %d min_size is zero\n", section_id);
473 block_size = get_blocksize(block);
476 * Version number and new block size are considered
477 * part of the header for MIPI sequenece block v3+.
479 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
482 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
489 entry->section_id = section_id;
490 memcpy(entry->data, block - 3, block_size + 3);
494 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
495 section_id, block_size, min_size);
497 if (section_id == BDB_LVDS_LFP_DATA_PTRS &&
498 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
499 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
504 list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks);
507 static void init_bdb_blocks(struct drm_i915_private *i915,
512 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
513 enum bdb_block_id section_id = bdb_blocks[i].section_id;
514 size_t min_size = bdb_blocks[i].min_size;
516 if (section_id == BDB_LVDS_LFP_DATA)
517 min_size = lfp_data_min_size(i915);
519 init_bdb_block(i915, bdb, section_id, min_size);
524 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
525 const struct lvds_dvo_timing *dvo_timing)
527 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
528 dvo_timing->hactive_lo;
529 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
530 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
531 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
532 ((dvo_timing->hsync_pulse_width_hi << 8) |
533 dvo_timing->hsync_pulse_width_lo);
534 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
535 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
537 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
538 dvo_timing->vactive_lo;
539 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
540 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
541 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
542 ((dvo_timing->vsync_pulse_width_hi << 4) |
543 dvo_timing->vsync_pulse_width_lo);
544 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
545 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
546 panel_fixed_mode->clock = dvo_timing->clock * 10;
547 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
549 if (dvo_timing->hsync_positive)
550 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
552 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
554 if (dvo_timing->vsync_positive)
555 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
557 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
559 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
560 dvo_timing->himage_lo;
561 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
562 dvo_timing->vimage_lo;
564 /* Some VBTs have bogus h/vtotal values */
565 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
566 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
567 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
568 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
570 drm_mode_set_name(panel_fixed_mode);
573 static const struct lvds_dvo_timing *
574 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
575 const struct bdb_lvds_lfp_data_ptrs *ptrs,
578 return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
581 static const struct lvds_fp_timing *
582 get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
583 const struct bdb_lvds_lfp_data_ptrs *ptrs,
586 return (const void *)data + ptrs->ptr[index].fp_timing.offset;
589 static const struct lvds_pnp_id *
590 get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,
591 const struct bdb_lvds_lfp_data_ptrs *ptrs,
594 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
597 static const struct bdb_lvds_lfp_data_tail *
598 get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
599 const struct bdb_lvds_lfp_data_ptrs *ptrs)
601 if (ptrs->panel_name.table_size)
602 return (const void *)data + ptrs->panel_name.offset;
607 static void dump_pnp_id(struct drm_i915_private *i915,
608 const struct lvds_pnp_id *pnp_id,
611 u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name);
614 drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n",
615 name, drm_edid_decode_mfg_id(mfg_name, vend),
616 pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial,
617 pnp_id->mfg_week, pnp_id->mfg_year + 1990);
620 static int opregion_get_panel_type(struct drm_i915_private *i915,
621 const struct intel_bios_encoder_data *devdata,
622 const struct drm_edid *drm_edid, bool use_fallback)
624 return intel_opregion_get_panel_type(i915);
627 static int vbt_get_panel_type(struct drm_i915_private *i915,
628 const struct intel_bios_encoder_data *devdata,
629 const struct drm_edid *drm_edid, bool use_fallback)
631 const struct bdb_lvds_options *lvds_options;
633 lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
637 if (lvds_options->panel_type > 0xf &&
638 lvds_options->panel_type != 0xff) {
639 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n",
640 lvds_options->panel_type);
644 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
645 return lvds_options->panel_type2;
647 drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
649 return lvds_options->panel_type;
652 static int pnpid_get_panel_type(struct drm_i915_private *i915,
653 const struct intel_bios_encoder_data *devdata,
654 const struct drm_edid *drm_edid, bool use_fallback)
656 const struct bdb_lvds_lfp_data *data;
657 const struct bdb_lvds_lfp_data_ptrs *ptrs;
658 const struct lvds_pnp_id *edid_id;
659 struct lvds_pnp_id edid_id_nodate;
660 const struct edid *edid = drm_edid_raw(drm_edid); /* FIXME */
666 edid_id = (const void *)&edid->mfg_id[0];
668 edid_id_nodate = *edid_id;
669 edid_id_nodate.mfg_week = 0;
670 edid_id_nodate.mfg_year = 0;
672 dump_pnp_id(i915, edid_id, "EDID");
674 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
678 data = find_section(i915, BDB_LVDS_LFP_DATA);
682 for (i = 0; i < 16; i++) {
683 const struct lvds_pnp_id *vbt_id =
684 get_lvds_pnp_id(data, ptrs, i);
687 if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id)))
691 * Accept a match w/o date if no full match is found,
692 * and the VBT entry does not specify a date.
695 !memcmp(vbt_id, &edid_id_nodate, sizeof(*vbt_id)))
702 static int fallback_get_panel_type(struct drm_i915_private *i915,
703 const struct intel_bios_encoder_data *devdata,
704 const struct drm_edid *drm_edid, bool use_fallback)
706 return use_fallback ? 0 : -1;
716 static int get_panel_type(struct drm_i915_private *i915,
717 const struct intel_bios_encoder_data *devdata,
718 const struct drm_edid *drm_edid, bool use_fallback)
722 int (*get_panel_type)(struct drm_i915_private *i915,
723 const struct intel_bios_encoder_data *devdata,
724 const struct drm_edid *drm_edid, bool use_fallback);
727 [PANEL_TYPE_OPREGION] = {
729 .get_panel_type = opregion_get_panel_type,
733 .get_panel_type = vbt_get_panel_type,
735 [PANEL_TYPE_PNPID] = {
737 .get_panel_type = pnpid_get_panel_type,
739 [PANEL_TYPE_FALLBACK] = {
741 .get_panel_type = fallback_get_panel_type,
746 for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
747 panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata,
748 drm_edid, use_fallback);
750 drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
751 panel_types[i].panel_type != 0xff);
753 if (panel_types[i].panel_type >= 0)
754 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n",
755 panel_types[i].name, panel_types[i].panel_type);
758 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
759 i = PANEL_TYPE_OPREGION;
760 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
761 panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
762 i = PANEL_TYPE_PNPID;
763 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
764 panel_types[PANEL_TYPE_VBT].panel_type >= 0)
767 i = PANEL_TYPE_FALLBACK;
769 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n",
770 panel_types[i].name, panel_types[i].panel_type);
772 return panel_types[i].panel_type;
775 static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
777 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
780 static bool panel_bool(unsigned int value, int panel_type)
782 return panel_bits(value, panel_type, 1);
785 /* Parse general panel options */
787 parse_panel_options(struct drm_i915_private *i915,
788 struct intel_panel *panel)
790 const struct bdb_lvds_options *lvds_options;
791 int panel_type = panel->vbt.panel_type;
794 lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
798 panel->vbt.lvds_dither = lvds_options->pixel_dither;
801 * Empirical evidence indicates the block size can be
802 * either 4,14,16,24+ bytes. For older VBTs no clear
803 * relationship between the block size vs. BDB version.
805 if (get_blocksize(lvds_options) < 16)
808 drrs_mode = panel_bits(lvds_options->dps_panel_type_bits,
811 * VBT has static DRRS = 0 and seamless DRRS = 2.
812 * The below piece of code is required to adjust vbt.drrs_type
813 * to match the enum drrs_support_type.
817 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
818 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
821 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
822 drm_dbg_kms(&i915->drm,
823 "DRRS supported mode is seamless\n");
826 panel->vbt.drrs_type = DRRS_TYPE_NONE;
827 drm_dbg_kms(&i915->drm,
828 "DRRS not supported (VBT input)\n");
834 parse_lfp_panel_dtd(struct drm_i915_private *i915,
835 struct intel_panel *panel,
836 const struct bdb_lvds_lfp_data *lvds_lfp_data,
837 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
839 const struct lvds_dvo_timing *panel_dvo_timing;
840 const struct lvds_fp_timing *fp_timing;
841 struct drm_display_mode *panel_fixed_mode;
842 int panel_type = panel->vbt.panel_type;
844 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
848 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
849 if (!panel_fixed_mode)
852 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
854 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
856 drm_dbg_kms(&i915->drm,
857 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
858 DRM_MODE_ARG(panel_fixed_mode));
860 fp_timing = get_lvds_fp_timing(lvds_lfp_data,
864 /* check the resolution, just to be sure */
865 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
866 fp_timing->y_res == panel_fixed_mode->vdisplay) {
867 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
868 drm_dbg_kms(&i915->drm,
869 "VBT initial LVDS value %x\n",
870 panel->vbt.bios_lvds_val);
875 parse_lfp_data(struct drm_i915_private *i915,
876 struct intel_panel *panel)
878 const struct bdb_lvds_lfp_data *data;
879 const struct bdb_lvds_lfp_data_tail *tail;
880 const struct bdb_lvds_lfp_data_ptrs *ptrs;
881 const struct lvds_pnp_id *pnp_id;
882 int panel_type = panel->vbt.panel_type;
884 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
888 data = find_section(i915, BDB_LVDS_LFP_DATA);
892 if (!panel->vbt.lfp_lvds_vbt_mode)
893 parse_lfp_panel_dtd(i915, panel, data, ptrs);
895 pnp_id = get_lvds_pnp_id(data, ptrs, panel_type);
896 dump_pnp_id(i915, pnp_id, "Panel");
898 tail = get_lfp_data_tail(data, ptrs);
902 drm_dbg_kms(&i915->drm, "Panel name: %.*s\n",
903 (int)sizeof(tail->panel_name[0].name),
904 tail->panel_name[panel_type].name);
906 if (i915->display.vbt.version >= 188) {
907 panel->vbt.seamless_drrs_min_refresh_rate =
908 tail->seamless_drrs_min_refresh_rate[panel_type];
909 drm_dbg_kms(&i915->drm,
910 "Seamless DRRS min refresh rate: %d Hz\n",
911 panel->vbt.seamless_drrs_min_refresh_rate);
916 parse_generic_dtd(struct drm_i915_private *i915,
917 struct intel_panel *panel)
919 const struct bdb_generic_dtd *generic_dtd;
920 const struct generic_dtd_entry *dtd;
921 struct drm_display_mode *panel_fixed_mode;
925 * Older VBTs provided DTD information for internal displays through
926 * the "LFP panel tables" block (42). As of VBT revision 229 the
927 * DTD information should be provided via a newer "generic DTD"
928 * block (58). Just to be safe, we'll try the new generic DTD block
929 * first on VBT >= 229, but still fall back to trying the old LFP
930 * block if that fails.
932 if (i915->display.vbt.version < 229)
935 generic_dtd = find_section(i915, BDB_GENERIC_DTD);
939 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
940 drm_err(&i915->drm, "GDTD size %u is too small.\n",
941 generic_dtd->gdtd_size);
943 } else if (generic_dtd->gdtd_size !=
944 sizeof(struct generic_dtd_entry)) {
945 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
946 generic_dtd->gdtd_size);
947 /* DTD has unknown fields, but keep going */
950 num_dtd = (get_blocksize(generic_dtd) -
951 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
952 if (panel->vbt.panel_type >= num_dtd) {
954 "Panel type %d not found in table of %d DTD's\n",
955 panel->vbt.panel_type, num_dtd);
959 dtd = &generic_dtd->dtd[panel->vbt.panel_type];
961 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
962 if (!panel_fixed_mode)
965 panel_fixed_mode->hdisplay = dtd->hactive;
966 panel_fixed_mode->hsync_start =
967 panel_fixed_mode->hdisplay + dtd->hfront_porch;
968 panel_fixed_mode->hsync_end =
969 panel_fixed_mode->hsync_start + dtd->hsync;
970 panel_fixed_mode->htotal =
971 panel_fixed_mode->hdisplay + dtd->hblank;
973 panel_fixed_mode->vdisplay = dtd->vactive;
974 panel_fixed_mode->vsync_start =
975 panel_fixed_mode->vdisplay + dtd->vfront_porch;
976 panel_fixed_mode->vsync_end =
977 panel_fixed_mode->vsync_start + dtd->vsync;
978 panel_fixed_mode->vtotal =
979 panel_fixed_mode->vdisplay + dtd->vblank;
981 panel_fixed_mode->clock = dtd->pixel_clock;
982 panel_fixed_mode->width_mm = dtd->width_mm;
983 panel_fixed_mode->height_mm = dtd->height_mm;
985 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
986 drm_mode_set_name(panel_fixed_mode);
988 if (dtd->hsync_positive_polarity)
989 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
991 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
993 if (dtd->vsync_positive_polarity)
994 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
996 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
998 drm_dbg_kms(&i915->drm,
999 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
1000 DRM_MODE_ARG(panel_fixed_mode));
1002 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
1006 parse_lfp_backlight(struct drm_i915_private *i915,
1007 struct intel_panel *panel)
1009 const struct bdb_lfp_backlight_data *backlight_data;
1010 const struct lfp_backlight_data_entry *entry;
1011 int panel_type = panel->vbt.panel_type;
1014 backlight_data = find_section(i915, BDB_LVDS_BACKLIGHT);
1015 if (!backlight_data)
1018 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
1019 drm_dbg_kms(&i915->drm,
1020 "Unsupported backlight data entry size %u\n",
1021 backlight_data->entry_size);
1025 entry = &backlight_data->data[panel_type];
1027 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1028 if (!panel->vbt.backlight.present) {
1029 drm_dbg_kms(&i915->drm,
1030 "PWM backlight not present in VBT (type %u)\n",
1035 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1036 panel->vbt.backlight.controller = 0;
1037 if (i915->display.vbt.version >= 191) {
1040 if (i915->display.vbt.version >= 236)
1041 exp_size = sizeof(struct bdb_lfp_backlight_data);
1042 else if (i915->display.vbt.version >= 234)
1043 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
1045 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
1047 if (get_blocksize(backlight_data) >= exp_size) {
1048 const struct lfp_backlight_control_method *method;
1050 method = &backlight_data->backlight_control[panel_type];
1051 panel->vbt.backlight.type = method->type;
1052 panel->vbt.backlight.controller = method->controller;
1056 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1057 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1059 if (i915->display.vbt.version >= 234) {
1063 level = backlight_data->brightness_level[panel_type].level;
1064 min_level = backlight_data->brightness_min_level[panel_type].level;
1066 if (i915->display.vbt.version >= 236)
1067 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1069 scale = level > 255;
1072 min_level = min_level / 255;
1074 if (min_level > 255) {
1075 drm_warn(&i915->drm, "Brightness min level > 255\n");
1078 panel->vbt.backlight.min_brightness = min_level;
1080 panel->vbt.backlight.brightness_precision_bits =
1081 backlight_data->brightness_precision_bits[panel_type];
1083 level = backlight_data->level[panel_type];
1084 panel->vbt.backlight.min_brightness = entry->min_brightness;
1087 drm_dbg_kms(&i915->drm,
1088 "VBT backlight PWM modulation frequency %u Hz, "
1089 "active %s, min brightness %u, level %u, controller %u\n",
1090 panel->vbt.backlight.pwm_freq_hz,
1091 panel->vbt.backlight.active_low_pwm ? "low" : "high",
1092 panel->vbt.backlight.min_brightness,
1094 panel->vbt.backlight.controller);
1097 /* Try to find sdvo panel data */
1099 parse_sdvo_panel_data(struct drm_i915_private *i915,
1100 struct intel_panel *panel)
1102 const struct bdb_sdvo_panel_dtds *dtds;
1103 struct drm_display_mode *panel_fixed_mode;
1106 index = i915->params.vbt_sdvo_panel_type;
1108 drm_dbg_kms(&i915->drm,
1109 "Ignore SDVO panel mode from BIOS VBT tables.\n");
1114 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1116 sdvo_lvds_options = find_section(i915, BDB_SDVO_LVDS_OPTIONS);
1117 if (!sdvo_lvds_options)
1120 index = sdvo_lvds_options->panel_type;
1123 dtds = find_section(i915, BDB_SDVO_PANEL_DTDS);
1127 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
1128 if (!panel_fixed_mode)
1131 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
1133 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1135 drm_dbg_kms(&i915->drm,
1136 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1137 DRM_MODE_ARG(panel_fixed_mode));
1140 static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
1143 switch (DISPLAY_VER(i915)) {
1145 return alternate ? 66667 : 48000;
1148 return alternate ? 100000 : 96000;
1150 return alternate ? 100000 : 120000;
1155 parse_general_features(struct drm_i915_private *i915)
1157 const struct bdb_general_features *general;
1159 general = find_section(i915, BDB_GENERAL_FEATURES);
1163 i915->display.vbt.int_tv_support = general->int_tv_support;
1164 /* int_crt_support can't be trusted on earlier platforms */
1165 if (i915->display.vbt.version >= 155 &&
1166 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
1167 i915->display.vbt.int_crt_support = general->int_crt_support;
1168 i915->display.vbt.lvds_use_ssc = general->enable_ssc;
1169 i915->display.vbt.lvds_ssc_freq =
1170 intel_bios_ssc_frequency(i915, general->ssc_freq);
1171 i915->display.vbt.display_clock_mode = general->display_clock_mode;
1172 i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1173 if (i915->display.vbt.version >= 181) {
1174 i915->display.vbt.orientation = general->rotate_180 ?
1175 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1176 DRM_MODE_PANEL_ORIENTATION_NORMAL;
1178 i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1181 if (i915->display.vbt.version >= 249 && general->afc_startup_config) {
1182 i915->display.vbt.override_afc_startup = true;
1183 i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
1186 drm_dbg_kms(&i915->drm,
1187 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1188 i915->display.vbt.int_tv_support,
1189 i915->display.vbt.int_crt_support,
1190 i915->display.vbt.lvds_use_ssc,
1191 i915->display.vbt.lvds_ssc_freq,
1192 i915->display.vbt.display_clock_mode,
1193 i915->display.vbt.fdi_rx_polarity_inverted);
1196 static const struct child_device_config *
1197 child_device_ptr(const struct bdb_general_definitions *defs, int i)
1199 return (const void *) &defs->devices[i * defs->child_dev_size];
1203 parse_sdvo_device_mapping(struct drm_i915_private *i915)
1205 const struct intel_bios_encoder_data *devdata;
1209 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1210 * accurate and doesn't have to be, as long as it's not too strict.
1212 if (!IS_DISPLAY_VER(i915, 3, 7)) {
1213 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1217 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
1218 const struct child_device_config *child = &devdata->child;
1219 struct sdvo_device_mapping *mapping;
1221 if (child->slave_addr != SLAVE_ADDR1 &&
1222 child->slave_addr != SLAVE_ADDR2) {
1224 * If the slave address is neither 0x70 nor 0x72,
1225 * it is not a SDVO device. Skip it.
1229 if (child->dvo_port != DEVICE_PORT_DVOB &&
1230 child->dvo_port != DEVICE_PORT_DVOC) {
1231 /* skip the incorrect SDVO port */
1232 drm_dbg_kms(&i915->drm,
1233 "Incorrect SDVO port. Skip it\n");
1236 drm_dbg_kms(&i915->drm,
1237 "the SDVO device with slave addr %2x is found on"
1240 (child->dvo_port == DEVICE_PORT_DVOB) ?
1242 mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1];
1243 if (!mapping->initialized) {
1244 mapping->dvo_port = child->dvo_port;
1245 mapping->slave_addr = child->slave_addr;
1246 mapping->dvo_wiring = child->dvo_wiring;
1247 mapping->ddc_pin = child->ddc_pin;
1248 mapping->i2c_pin = child->i2c_pin;
1249 mapping->initialized = 1;
1250 drm_dbg_kms(&i915->drm,
1251 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1252 mapping->dvo_port, mapping->slave_addr,
1253 mapping->dvo_wiring, mapping->ddc_pin,
1256 drm_dbg_kms(&i915->drm,
1257 "Maybe one SDVO port is shared by "
1258 "two SDVO device.\n");
1260 if (child->slave2_addr) {
1261 /* Maybe this is a SDVO device with multiple inputs */
1262 /* And the mapping info is not added */
1263 drm_dbg_kms(&i915->drm,
1264 "there exists the slave2_addr. Maybe this"
1265 " is a SDVO device with multiple inputs.\n");
1271 /* No SDVO device info is found */
1272 drm_dbg_kms(&i915->drm,
1273 "No SDVO device info is found in VBT\n");
1278 parse_driver_features(struct drm_i915_private *i915)
1280 const struct bdb_driver_features *driver;
1282 driver = find_section(i915, BDB_DRIVER_FEATURES);
1286 if (DISPLAY_VER(i915) >= 5) {
1288 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1289 * to mean "eDP". The VBT spec doesn't agree with that
1290 * interpretation, but real world VBTs seem to.
1292 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1293 i915->display.vbt.int_lvds_support = 0;
1296 * FIXME it's not clear which BDB version has the LVDS config
1297 * bits defined. Revision history in the VBT spec says:
1298 * "0.92 | Add two definitions for VBT value of LVDS Active
1299 * Config (00b and 11b values defined) | 06/13/2005"
1300 * but does not the specify the BDB version.
1302 * So far version 134 (on i945gm) is the oldest VBT observed
1303 * in the wild with the bits correctly populated. Version
1304 * 108 (on i85x) does not have the bits correctly populated.
1306 if (i915->display.vbt.version >= 134 &&
1307 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1308 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1309 i915->display.vbt.int_lvds_support = 0;
1314 parse_panel_driver_features(struct drm_i915_private *i915,
1315 struct intel_panel *panel)
1317 const struct bdb_driver_features *driver;
1319 driver = find_section(i915, BDB_DRIVER_FEATURES);
1323 if (i915->display.vbt.version < 228) {
1324 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1325 driver->drrs_enabled);
1327 * If DRRS is not supported, drrs_type has to be set to 0.
1328 * This is because, VBT is configured in such a way that
1329 * static DRRS is 0 and DRRS not supported is represented by
1330 * driver->drrs_enabled=false
1332 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1334 * FIXME Should DMRRS perhaps be treated as seamless
1335 * but without the automatic downclocking?
1337 if (driver->dmrrs_enabled)
1338 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1340 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1343 panel->vbt.psr.enable = driver->psr_enabled;
1348 parse_power_conservation_features(struct drm_i915_private *i915,
1349 struct intel_panel *panel)
1351 const struct bdb_lfp_power *power;
1352 u8 panel_type = panel->vbt.panel_type;
1354 panel->vbt.vrr = true; /* matches Windows behaviour */
1356 if (i915->display.vbt.version < 228)
1359 power = find_section(i915, BDB_LFP_POWER);
1363 panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
1366 * If DRRS is not supported, drrs_type has to be set to 0.
1367 * This is because, VBT is configured in such a way that
1368 * static DRRS is 0 and DRRS not supported is represented by
1369 * power->drrs & BIT(panel_type)=false
1371 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1373 * FIXME Should DMRRS perhaps be treated as seamless
1374 * but without the automatic downclocking?
1376 if (panel_bool(power->dmrrs, panel_type))
1377 panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1379 panel->vbt.drrs_type = DRRS_TYPE_NONE;
1382 if (i915->display.vbt.version >= 232)
1383 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
1385 if (i915->display.vbt.version >= 233)
1386 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
1391 parse_edp(struct drm_i915_private *i915,
1392 struct intel_panel *panel)
1394 const struct bdb_edp *edp;
1395 const struct edp_power_seq *edp_pps;
1396 const struct edp_fast_link_params *edp_link_params;
1397 int panel_type = panel->vbt.panel_type;
1399 edp = find_section(i915, BDB_EDP);
1403 switch (panel_bits(edp->color_depth, panel_type, 2)) {
1405 panel->vbt.edp.bpp = 18;
1408 panel->vbt.edp.bpp = 24;
1411 panel->vbt.edp.bpp = 30;
1415 /* Get the eDP sequencing and link info */
1416 edp_pps = &edp->power_seqs[panel_type];
1417 edp_link_params = &edp->fast_link_params[panel_type];
1419 panel->vbt.edp.pps = *edp_pps;
1421 if (i915->display.vbt.version >= 224) {
1422 panel->vbt.edp.rate =
1423 edp->edp_fast_link_training_rate[panel_type] * 20;
1425 switch (edp_link_params->rate) {
1427 panel->vbt.edp.rate = 162000;
1430 panel->vbt.edp.rate = 270000;
1433 panel->vbt.edp.rate = 540000;
1436 drm_dbg_kms(&i915->drm,
1437 "VBT has unknown eDP link rate value %u\n",
1438 edp_link_params->rate);
1443 switch (edp_link_params->lanes) {
1445 panel->vbt.edp.lanes = 1;
1448 panel->vbt.edp.lanes = 2;
1451 panel->vbt.edp.lanes = 4;
1454 drm_dbg_kms(&i915->drm,
1455 "VBT has unknown eDP lane count value %u\n",
1456 edp_link_params->lanes);
1460 switch (edp_link_params->preemphasis) {
1461 case EDP_PREEMPHASIS_NONE:
1462 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1464 case EDP_PREEMPHASIS_3_5dB:
1465 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1467 case EDP_PREEMPHASIS_6dB:
1468 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1470 case EDP_PREEMPHASIS_9_5dB:
1471 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1474 drm_dbg_kms(&i915->drm,
1475 "VBT has unknown eDP pre-emphasis value %u\n",
1476 edp_link_params->preemphasis);
1480 switch (edp_link_params->vswing) {
1481 case EDP_VSWING_0_4V:
1482 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1484 case EDP_VSWING_0_6V:
1485 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1487 case EDP_VSWING_0_8V:
1488 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1490 case EDP_VSWING_1_2V:
1491 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1494 drm_dbg_kms(&i915->drm,
1495 "VBT has unknown eDP voltage swing value %u\n",
1496 edp_link_params->vswing);
1500 if (i915->display.vbt.version >= 173) {
1503 /* Don't read from VBT if module parameter has valid value*/
1504 if (i915->params.edp_vswing) {
1505 panel->vbt.edp.low_vswing =
1506 i915->params.edp_vswing == 1;
1508 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1509 panel->vbt.edp.low_vswing = vswing == 0;
1513 panel->vbt.edp.drrs_msa_timing_delay =
1514 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
1516 if (i915->display.vbt.version >= 244)
1517 panel->vbt.edp.max_link_rate =
1518 edp->edp_max_port_link_rate[panel_type] * 20;
1522 parse_psr(struct drm_i915_private *i915,
1523 struct intel_panel *panel)
1525 const struct bdb_psr *psr;
1526 const struct psr_table *psr_table;
1527 int panel_type = panel->vbt.panel_type;
1529 psr = find_section(i915, BDB_PSR);
1531 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1535 psr_table = &psr->psr_table[panel_type];
1537 panel->vbt.psr.full_link = psr_table->full_link;
1538 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1540 /* Allowed VBT values goes from 0 to 15 */
1541 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1542 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1545 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1546 * Old decimal value is wake up time in multiples of 100 us.
1548 if (i915->display.vbt.version >= 205 &&
1549 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1550 switch (psr_table->tp1_wakeup_time) {
1552 panel->vbt.psr.tp1_wakeup_time_us = 500;
1555 panel->vbt.psr.tp1_wakeup_time_us = 100;
1558 panel->vbt.psr.tp1_wakeup_time_us = 0;
1561 drm_dbg_kms(&i915->drm,
1562 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1563 psr_table->tp1_wakeup_time);
1566 panel->vbt.psr.tp1_wakeup_time_us = 2500;
1570 switch (psr_table->tp2_tp3_wakeup_time) {
1572 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1575 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1578 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1581 drm_dbg_kms(&i915->drm,
1582 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1583 psr_table->tp2_tp3_wakeup_time);
1586 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1590 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1591 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1594 if (i915->display.vbt.version >= 226) {
1595 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1597 wakeup_time = panel_bits(wakeup_time, panel_type, 2);
1598 switch (wakeup_time) {
1613 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1615 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1616 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1620 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1621 struct intel_panel *panel,
1624 enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C;
1626 if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) {
1627 panel->vbt.dsi.bl_ports = BIT(port);
1628 if (panel->vbt.dsi.config->cabc_supported)
1629 panel->vbt.dsi.cabc_ports = BIT(port);
1634 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1636 panel->vbt.dsi.bl_ports = BIT(PORT_A);
1639 panel->vbt.dsi.bl_ports = BIT(port_bc);
1642 case DL_DCS_PORT_A_AND_C:
1643 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);
1647 if (!panel->vbt.dsi.config->cabc_supported)
1650 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1652 panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1655 panel->vbt.dsi.cabc_ports = BIT(port_bc);
1658 case DL_DCS_PORT_A_AND_C:
1659 panel->vbt.dsi.cabc_ports =
1660 BIT(PORT_A) | BIT(port_bc);
1666 parse_mipi_config(struct drm_i915_private *i915,
1667 struct intel_panel *panel)
1669 const struct bdb_mipi_config *start;
1670 const struct mipi_config *config;
1671 const struct mipi_pps_data *pps;
1672 int panel_type = panel->vbt.panel_type;
1675 /* parse MIPI blocks only if LFP type is MIPI */
1676 if (!intel_bios_is_dsi_present(i915, &port))
1679 /* Initialize this to undefined indicating no generic MIPI support */
1680 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1682 /* Block #40 is already parsed and panel_fixed_mode is
1683 * stored in i915->lfp_lvds_vbt_mode
1684 * resuse this when needed
1687 /* Parse #52 for panel index used from panel_type already
1690 start = find_section(i915, BDB_MIPI_CONFIG);
1692 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1696 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1700 * get hold of the correct configuration block and pps data as per
1701 * the panel_type as index
1703 config = &start->config[panel_type];
1704 pps = &start->pps[panel_type];
1706 /* store as of now full data. Trim when we realise all is not needed */
1707 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1708 if (!panel->vbt.dsi.config)
1711 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1712 if (!panel->vbt.dsi.pps) {
1713 kfree(panel->vbt.dsi.config);
1717 parse_dsi_backlight_ports(i915, panel, port);
1719 /* FIXME is the 90 vs. 270 correct? */
1720 switch (config->rotation) {
1721 case ENABLE_ROTATION_0:
1723 * Most (all?) VBTs claim 0 degrees despite having
1724 * an upside down panel, thus we do not trust this.
1726 panel->vbt.dsi.orientation =
1727 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1729 case ENABLE_ROTATION_90:
1730 panel->vbt.dsi.orientation =
1731 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1733 case ENABLE_ROTATION_180:
1734 panel->vbt.dsi.orientation =
1735 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1737 case ENABLE_ROTATION_270:
1738 panel->vbt.dsi.orientation =
1739 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1743 /* We have mandatory mipi config blocks. Initialize as generic panel */
1744 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1747 /* Find the sequence block and size for the given panel. */
1749 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1750 u16 panel_id, u32 *seq_size)
1752 u32 total = get_blocksize(sequence);
1753 const u8 *data = &sequence->data[0];
1756 int header_size = sequence->version >= 3 ? 5 : 3;
1760 /* skip new block size */
1761 if (sequence->version >= 3)
1764 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1765 if (index + header_size > total) {
1766 DRM_ERROR("Invalid sequence block (header)\n");
1770 current_id = *(data + index);
1771 if (sequence->version >= 3)
1772 current_size = *((const u32 *)(data + index + 1));
1774 current_size = *((const u16 *)(data + index + 1));
1776 index += header_size;
1778 if (index + current_size > total) {
1779 DRM_ERROR("Invalid sequence block\n");
1783 if (current_id == panel_id) {
1784 *seq_size = current_size;
1785 return data + index;
1788 index += current_size;
1791 DRM_ERROR("Sequence block detected but no valid configuration\n");
1796 static int goto_next_sequence(const u8 *data, int index, int total)
1800 /* Skip Sequence Byte. */
1801 for (index = index + 1; index < total; index += len) {
1802 u8 operation_byte = *(data + index);
1805 switch (operation_byte) {
1806 case MIPI_SEQ_ELEM_END:
1808 case MIPI_SEQ_ELEM_SEND_PKT:
1809 if (index + 4 > total)
1812 len = *((const u16 *)(data + index + 2)) + 4;
1814 case MIPI_SEQ_ELEM_DELAY:
1817 case MIPI_SEQ_ELEM_GPIO:
1820 case MIPI_SEQ_ELEM_I2C:
1821 if (index + 7 > total)
1823 len = *(data + index + 6) + 7;
1826 DRM_ERROR("Unknown operation byte\n");
1834 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1838 u32 size_of_sequence;
1841 * Could skip sequence based on Size of Sequence alone, but also do some
1842 * checking on the structure.
1845 DRM_ERROR("Too small sequence size\n");
1849 /* Skip Sequence Byte. */
1853 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1854 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1857 size_of_sequence = *((const u32 *)(data + index));
1860 seq_end = index + size_of_sequence;
1861 if (seq_end > total) {
1862 DRM_ERROR("Invalid sequence size\n");
1866 for (; index < total; index += len) {
1867 u8 operation_byte = *(data + index);
1870 if (operation_byte == MIPI_SEQ_ELEM_END) {
1871 if (index != seq_end) {
1872 DRM_ERROR("Invalid element structure\n");
1878 len = *(data + index);
1882 * FIXME: Would be nice to check elements like for v1/v2 in
1883 * goto_next_sequence() above.
1885 switch (operation_byte) {
1886 case MIPI_SEQ_ELEM_SEND_PKT:
1887 case MIPI_SEQ_ELEM_DELAY:
1888 case MIPI_SEQ_ELEM_GPIO:
1889 case MIPI_SEQ_ELEM_I2C:
1890 case MIPI_SEQ_ELEM_SPI:
1891 case MIPI_SEQ_ELEM_PMIC:
1894 DRM_ERROR("Unknown operation byte %u\n",
1904 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1905 * skip all delay + gpio operands and stop at the first DSI packet op.
1907 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915,
1908 struct intel_panel *panel)
1910 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1913 if (drm_WARN_ON(&i915->drm,
1914 !data || panel->vbt.dsi.seq_version != 1))
1917 /* index = 1 to skip sequence byte */
1918 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1919 switch (data[index]) {
1920 case MIPI_SEQ_ELEM_SEND_PKT:
1921 return index == 1 ? 0 : index;
1922 case MIPI_SEQ_ELEM_DELAY:
1923 len = 5; /* 1 byte for operand + uint32 */
1925 case MIPI_SEQ_ELEM_GPIO:
1926 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1937 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1938 * The deassert must be done before calling intel_dsi_device_ready, so for
1939 * these devices we split the init OTP sequence into a deassert sequence and
1940 * the actual init OTP part.
1942 static void fixup_mipi_sequences(struct drm_i915_private *i915,
1943 struct intel_panel *panel)
1948 /* Limit this to VLV for now. */
1949 if (!IS_VALLEYVIEW(i915))
1952 /* Limit this to v1 vid-mode sequences */
1953 if (panel->vbt.dsi.config->is_cmd_mode ||
1954 panel->vbt.dsi.seq_version != 1)
1957 /* Only do this if there are otp and assert seqs and no deassert seq */
1958 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1959 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1960 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1963 /* The deassert-sequence ends at the first DSI packet */
1964 len = get_init_otp_deassert_fragment_len(i915, panel);
1968 drm_dbg_kms(&i915->drm,
1969 "Using init OTP fragment to deassert reset\n");
1971 /* Copy the fragment, update seq byte and terminate it */
1972 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1973 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1974 if (!panel->vbt.dsi.deassert_seq)
1976 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1977 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1978 /* Use the copy for deassert */
1979 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1980 panel->vbt.dsi.deassert_seq;
1981 /* Replace the last byte of the fragment with init OTP seq byte */
1982 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1983 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1984 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1988 parse_mipi_sequence(struct drm_i915_private *i915,
1989 struct intel_panel *panel)
1991 int panel_type = panel->vbt.panel_type;
1992 const struct bdb_mipi_sequence *sequence;
1998 /* Only our generic panel driver uses the sequence block. */
1999 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
2002 sequence = find_section(i915, BDB_MIPI_SEQUENCE);
2004 drm_dbg_kms(&i915->drm,
2005 "No MIPI Sequence found, parsing complete\n");
2009 /* Fail gracefully for forward incompatible sequence block. */
2010 if (sequence->version >= 4) {
2012 "Unable to parse MIPI Sequence Block v%u\n",
2017 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
2020 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
2024 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
2028 /* Parse the sequences, store pointers to each sequence. */
2030 u8 seq_id = *(data + index);
2031 if (seq_id == MIPI_SEQ_END)
2034 if (seq_id >= MIPI_SEQ_MAX) {
2035 drm_err(&i915->drm, "Unknown sequence %u\n",
2040 /* Log about presence of sequences we won't run. */
2041 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2042 drm_dbg_kms(&i915->drm,
2043 "Unsupported sequence %u\n", seq_id);
2045 panel->vbt.dsi.sequence[seq_id] = data + index;
2047 if (sequence->version >= 3)
2048 index = goto_next_sequence_v3(data, index, seq_size);
2050 index = goto_next_sequence(data, index, seq_size);
2052 drm_err(&i915->drm, "Invalid sequence %u\n",
2058 panel->vbt.dsi.data = data;
2059 panel->vbt.dsi.size = seq_size;
2060 panel->vbt.dsi.seq_version = sequence->version;
2062 fixup_mipi_sequences(i915, panel);
2064 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
2069 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2073 parse_compression_parameters(struct drm_i915_private *i915)
2075 const struct bdb_compression_parameters *params;
2076 struct intel_bios_encoder_data *devdata;
2080 if (i915->display.vbt.version < 198)
2083 params = find_section(i915, BDB_COMPRESSION_PARAMETERS);
2086 if (params->entry_size != sizeof(params->data[0])) {
2087 drm_dbg_kms(&i915->drm,
2088 "VBT: unsupported compression param entry size\n");
2092 block_size = get_blocksize(params);
2093 if (block_size < sizeof(*params)) {
2094 drm_dbg_kms(&i915->drm,
2095 "VBT: expected 16 compression param entries\n");
2100 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
2101 const struct child_device_config *child = &devdata->child;
2103 if (!child->compression_enable)
2107 drm_dbg_kms(&i915->drm,
2108 "VBT: compression params not available\n");
2112 if (child->compression_method_cps) {
2113 drm_dbg_kms(&i915->drm,
2114 "VBT: CPS compression not supported\n");
2118 index = child->compression_structure_index;
2120 devdata->dsc = kmemdup(¶ms->data[index],
2121 sizeof(*devdata->dsc), GFP_KERNEL);
2125 static u8 translate_iboost(u8 val)
2127 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2129 if (val >= ARRAY_SIZE(mapping)) {
2130 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2133 return mapping[val];
2136 static const u8 cnp_ddc_pin_map[] = {
2138 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
2139 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
2140 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
2141 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
2144 static const u8 icp_ddc_pin_map[] = {
2145 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2146 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2147 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
2148 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
2149 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
2150 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
2151 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
2152 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
2153 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
2156 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2157 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2158 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2159 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
2160 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
2163 static const u8 adls_ddc_pin_map[] = {
2164 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2165 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
2166 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
2167 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
2168 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
2171 static const u8 gen9bc_tgp_ddc_pin_map[] = {
2172 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2173 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
2174 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
2177 static const u8 adlp_ddc_pin_map[] = {
2178 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2179 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2180 [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
2181 [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
2182 [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
2183 [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
2186 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
2188 const u8 *ddc_pin_map;
2191 if (HAS_PCH_MTP(i915) || IS_ALDERLAKE_P(i915)) {
2192 ddc_pin_map = adlp_ddc_pin_map;
2193 n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2194 } else if (IS_ALDERLAKE_S(i915)) {
2195 ddc_pin_map = adls_ddc_pin_map;
2196 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2197 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
2199 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2200 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2201 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2202 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
2203 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2204 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2205 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2206 ddc_pin_map = icp_ddc_pin_map;
2207 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2208 } else if (HAS_PCH_CNP(i915)) {
2209 ddc_pin_map = cnp_ddc_pin_map;
2210 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2212 /* Assuming direct map */
2216 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
2217 return ddc_pin_map[vbt_pin];
2219 drm_dbg_kms(&i915->drm,
2220 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2225 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
2232 for_each_port(port) {
2233 const struct intel_bios_encoder_data *devdata =
2234 i915->display.vbt.ports[port];
2236 if (devdata && ddc_pin == devdata->child.ddc_pin)
2243 static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
2246 struct drm_i915_private *i915 = devdata->i915;
2247 struct child_device_config *child;
2251 if (!devdata->child.ddc_pin)
2254 mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin);
2255 if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) {
2256 drm_dbg_kms(&i915->drm,
2257 "Port %c has invalid DDC pin %d, "
2258 "sticking to defaults\n",
2259 port_name(port), mapped_ddc_pin);
2260 devdata->child.ddc_pin = 0;
2264 p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin);
2268 drm_dbg_kms(&i915->drm,
2269 "port %c trying to use the same DDC pin (0x%x) as port %c, "
2270 "disabling port %c DVI/HDMI support\n",
2271 port_name(port), mapped_ddc_pin,
2272 port_name(p), port_name(p));
2275 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
2276 * couldn't exist on the shared port. Otherwise they share the same ddc
2277 * pin and system couldn't communicate with them separately.
2279 * Give inverse child device order the priority, last one wins. Yes,
2280 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2281 * port A and port E with the same AUX ch and we must pick port E :(
2283 child = &i915->display.vbt.ports[p]->child;
2285 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2286 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2291 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
2298 for_each_port(port) {
2299 const struct intel_bios_encoder_data *devdata =
2300 i915->display.vbt.ports[port];
2302 if (devdata && aux_ch == devdata->child.aux_channel)
2309 static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
2312 struct drm_i915_private *i915 = devdata->i915;
2313 struct child_device_config *child;
2316 p = get_port_by_aux_ch(i915, devdata->child.aux_channel);
2320 drm_dbg_kms(&i915->drm,
2321 "port %c trying to use the same AUX CH (0x%x) as port %c, "
2322 "disabling port %c DP support\n",
2323 port_name(port), devdata->child.aux_channel,
2324 port_name(p), port_name(p));
2327 * If we have multiple ports supposedly sharing the aux channel, then DP
2328 * couldn't exist on the shared port. Otherwise they share the same aux
2329 * channel and system couldn't communicate with them separately.
2331 * Give inverse child device order the priority, last one wins. Yes,
2332 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2333 * port A and port E with the same AUX ch and we must pick port E :(
2335 child = &i915->display.vbt.ports[p]->child;
2337 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2338 child->aux_channel = 0;
2341 static u8 dvo_port_type(u8 dvo_port)
2344 case DVO_PORT_HDMIA:
2345 case DVO_PORT_HDMIB:
2346 case DVO_PORT_HDMIC:
2347 case DVO_PORT_HDMID:
2348 case DVO_PORT_HDMIE:
2349 case DVO_PORT_HDMIF:
2350 case DVO_PORT_HDMIG:
2351 case DVO_PORT_HDMIH:
2352 case DVO_PORT_HDMII:
2353 return DVO_PORT_HDMIA;
2363 return DVO_PORT_DPA;
2364 case DVO_PORT_MIPIA:
2365 case DVO_PORT_MIPIB:
2366 case DVO_PORT_MIPIC:
2367 case DVO_PORT_MIPID:
2368 return DVO_PORT_MIPIA;
2374 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2375 const int port_mapping[][3], u8 dvo_port)
2380 for (port = PORT_A; port < n_ports; port++) {
2381 for (i = 0; i < n_dvo; i++) {
2382 if (port_mapping[port][i] == -1)
2385 if (dvo_port == port_mapping[port][i])
2393 static enum port dvo_port_to_port(struct drm_i915_private *i915,
2397 * Each DDI port can have more than one value on the "DVO Port" field,
2398 * so look for all the possible values for each port.
2400 static const int port_mapping[][3] = {
2401 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2402 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2403 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2404 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2405 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2406 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2407 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2408 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2409 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2412 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2413 * map to DDI A,B,TC1,TC2 respectively.
2415 static const int rkl_port_mapping[][3] = {
2416 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2417 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2419 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2420 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2423 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2424 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2426 static const int adls_port_mapping[][3] = {
2427 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2430 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2431 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2432 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2433 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2435 static const int xelpd_port_mapping[][3] = {
2436 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2437 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2438 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2439 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2440 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2441 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2442 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2443 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2444 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2447 if (DISPLAY_VER(i915) >= 13)
2448 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2449 ARRAY_SIZE(xelpd_port_mapping[0]),
2452 else if (IS_ALDERLAKE_S(i915))
2453 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2454 ARRAY_SIZE(adls_port_mapping[0]),
2457 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2458 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2459 ARRAY_SIZE(rkl_port_mapping[0]),
2463 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2464 ARRAY_SIZE(port_mapping[0]),
2470 dsi_dvo_port_to_port(struct drm_i915_private *i915, u8 dvo_port)
2473 case DVO_PORT_MIPIA:
2475 case DVO_PORT_MIPIC:
2476 if (DISPLAY_VER(i915) >= 11)
2485 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2487 switch (vbt_max_link_rate) {
2489 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2491 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2493 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2495 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2497 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2499 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2501 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2503 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2508 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2510 switch (vbt_max_link_rate) {
2512 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2514 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2516 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2518 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2523 static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2525 if (!devdata || devdata->i915->display.vbt.version < 216)
2528 if (devdata->i915->display.vbt.version >= 230)
2529 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2531 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2534 static int _intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
2536 if (!devdata || devdata->i915->display.vbt.version < 244)
2539 return devdata->child.dp_max_lane_count + 1;
2542 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2545 struct drm_i915_private *i915 = devdata->i915;
2548 if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2551 if (!intel_bios_encoder_supports_dvi(devdata))
2554 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2556 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2557 is_hdmi ? "/HDMI" : "");
2559 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2560 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2564 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2566 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2570 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2572 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2576 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2578 return intel_bios_encoder_supports_dvi(devdata) &&
2579 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2583 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2585 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2589 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2591 return intel_bios_encoder_supports_dp(devdata) &&
2592 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2596 intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata)
2598 return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT;
2602 intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata)
2604 return devdata && HAS_LSPCON(devdata->i915) && devdata->child.lspcon;
2607 static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2609 if (!devdata || devdata->i915->display.vbt.version < 158)
2612 return devdata->child.hdmi_level_shifter_value;
2615 static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2617 if (!devdata || devdata->i915->display.vbt.version < 204)
2620 switch (devdata->child.hdmi_max_data_rate) {
2622 MISSING_CASE(devdata->child.hdmi_max_data_rate);
2624 case HDMI_MAX_DATA_RATE_PLATFORM:
2626 case HDMI_MAX_DATA_RATE_594:
2628 case HDMI_MAX_DATA_RATE_340:
2630 case HDMI_MAX_DATA_RATE_300:
2632 case HDMI_MAX_DATA_RATE_297:
2634 case HDMI_MAX_DATA_RATE_165:
2639 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2642 * On some ICL SKUs port F is not present, but broken VBTs mark
2643 * the port as present. Only try to initialize port F for the
2644 * SKUs that may actually have it.
2646 if (port == PORT_F && IS_ICELAKE(i915))
2647 return IS_ICL_WITH_PORT_F(i915);
2652 static void print_ddi_port(const struct intel_bios_encoder_data *devdata,
2655 struct drm_i915_private *i915 = devdata->i915;
2656 const struct child_device_config *child = &devdata->child;
2657 bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
2658 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2660 is_dvi = intel_bios_encoder_supports_dvi(devdata);
2661 is_dp = intel_bios_encoder_supports_dp(devdata);
2662 is_crt = intel_bios_encoder_supports_crt(devdata);
2663 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2664 is_edp = intel_bios_encoder_supports_edp(devdata);
2665 is_dsi = intel_bios_encoder_supports_dsi(devdata);
2667 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2668 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2670 drm_dbg_kms(&i915->drm,
2671 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2672 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi,
2673 intel_bios_encoder_is_lspcon(devdata),
2674 supports_typec_usb, supports_tbt,
2675 devdata->dsc != NULL);
2677 hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata);
2678 if (hdmi_level_shift >= 0) {
2679 drm_dbg_kms(&i915->drm,
2680 "Port %c VBT HDMI level shift: %d\n",
2681 port_name(port), hdmi_level_shift);
2684 max_tmds_clock = _intel_bios_max_tmds_clock(devdata);
2686 drm_dbg_kms(&i915->drm,
2687 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2688 port_name(port), max_tmds_clock);
2690 /* I_boost config for SKL and above */
2691 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
2693 drm_dbg_kms(&i915->drm,
2694 "Port %c VBT (e)DP boost level: %d\n",
2695 port_name(port), dp_boost_level);
2697 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata);
2698 if (hdmi_boost_level)
2699 drm_dbg_kms(&i915->drm,
2700 "Port %c VBT HDMI boost level: %d\n",
2701 port_name(port), hdmi_boost_level);
2703 dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata);
2704 if (dp_max_link_rate)
2705 drm_dbg_kms(&i915->drm,
2706 "Port %c VBT DP max link rate: %d\n",
2707 port_name(port), dp_max_link_rate);
2710 * FIXME need to implement support for VBT
2711 * vswing/preemph tables should this ever trigger.
2713 drm_WARN(&i915->drm, child->use_vbt_vswing,
2714 "Port %c asks to use VBT vswing/preemph tables\n",
2718 static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2720 struct drm_i915_private *i915 = devdata->i915;
2721 const struct child_device_config *child = &devdata->child;
2724 port = dvo_port_to_port(i915, child->dvo_port);
2725 if (port == PORT_NONE && DISPLAY_VER(i915) >= 11)
2726 port = dsi_dvo_port_to_port(i915, child->dvo_port);
2727 if (port == PORT_NONE)
2730 if (!is_port_valid(i915, port)) {
2731 drm_dbg_kms(&i915->drm,
2732 "VBT reports port %c as supported, but that can't be true: skipping\n",
2737 if (i915->display.vbt.ports[port]) {
2738 drm_dbg_kms(&i915->drm,
2739 "More than one child device for port %c in VBT, using the first.\n",
2744 sanitize_device_type(devdata, port);
2746 if (intel_bios_encoder_supports_dvi(devdata))
2747 sanitize_ddc_pin(devdata, port);
2749 if (intel_bios_encoder_supports_dp(devdata))
2750 sanitize_aux_ch(devdata, port);
2752 i915->display.vbt.ports[port] = devdata;
2755 static bool has_ddi_port_info(struct drm_i915_private *i915)
2757 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2760 static void parse_ddi_ports(struct drm_i915_private *i915)
2762 struct intel_bios_encoder_data *devdata;
2765 if (!has_ddi_port_info(i915))
2768 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2769 parse_ddi_port(devdata);
2771 for_each_port(port) {
2772 if (i915->display.vbt.ports[port])
2773 print_ddi_port(i915->display.vbt.ports[port], port);
2778 parse_general_definitions(struct drm_i915_private *i915)
2780 const struct bdb_general_definitions *defs;
2781 struct intel_bios_encoder_data *devdata;
2782 const struct child_device_config *child;
2783 int i, child_device_num;
2788 defs = find_section(i915, BDB_GENERAL_DEFINITIONS);
2790 drm_dbg_kms(&i915->drm,
2791 "No general definition block is found, no devices defined.\n");
2795 block_size = get_blocksize(defs);
2796 if (block_size < sizeof(*defs)) {
2797 drm_dbg_kms(&i915->drm,
2798 "General definitions block too small (%u)\n",
2803 bus_pin = defs->crt_ddc_gmbus_pin;
2804 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2805 if (intel_gmbus_is_valid_pin(i915, bus_pin))
2806 i915->display.vbt.crt_ddc_pin = bus_pin;
2808 if (i915->display.vbt.version < 106) {
2810 } else if (i915->display.vbt.version < 111) {
2812 } else if (i915->display.vbt.version < 195) {
2813 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2814 } else if (i915->display.vbt.version == 195) {
2816 } else if (i915->display.vbt.version <= 215) {
2818 } else if (i915->display.vbt.version <= 237) {
2821 expected_size = sizeof(*child);
2822 BUILD_BUG_ON(sizeof(*child) < 39);
2824 "Expected child device config size for VBT version %u not known; assuming %u\n",
2825 i915->display.vbt.version, expected_size);
2828 /* Flag an error for unexpected size, but continue anyway. */
2829 if (defs->child_dev_size != expected_size)
2831 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2832 defs->child_dev_size, expected_size, i915->display.vbt.version);
2834 /* The legacy sized child device config is the minimum we need. */
2835 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2836 drm_dbg_kms(&i915->drm,
2837 "Child device config size %u is too small.\n",
2838 defs->child_dev_size);
2842 /* get the number of child device */
2843 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2845 for (i = 0; i < child_device_num; i++) {
2846 child = child_device_ptr(defs, i);
2847 if (!child->device_type)
2850 drm_dbg_kms(&i915->drm,
2851 "Found VBT child device with type 0x%x\n",
2852 child->device_type);
2854 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2858 devdata->i915 = i915;
2861 * Copy as much as we know (sizeof) and is available
2862 * (child_dev_size) of the child device config. Accessing the
2863 * data must depend on VBT version.
2865 memcpy(&devdata->child, child,
2866 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2868 list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2871 if (list_empty(&i915->display.vbt.display_devices))
2872 drm_dbg_kms(&i915->drm,
2873 "no child dev is parsed from VBT\n");
2876 /* Common defaults which may be overridden by VBT. */
2878 init_vbt_defaults(struct drm_i915_private *i915)
2880 i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2882 /* general features */
2883 i915->display.vbt.int_tv_support = 1;
2884 i915->display.vbt.int_crt_support = 1;
2886 /* driver features */
2887 i915->display.vbt.int_lvds_support = 1;
2889 /* Default to using SSC */
2890 i915->display.vbt.lvds_use_ssc = 1;
2892 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2895 i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2896 !HAS_PCH_SPLIT(i915));
2897 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2898 i915->display.vbt.lvds_ssc_freq);
2901 /* Common defaults which may be overridden by VBT. */
2903 init_vbt_panel_defaults(struct intel_panel *panel)
2905 /* Default to having backlight */
2906 panel->vbt.backlight.present = true;
2908 /* LFP panel data */
2909 panel->vbt.lvds_dither = true;
2912 /* Defaults to initialize only if there is no VBT. */
2914 init_vbt_missing_defaults(struct drm_i915_private *i915)
2917 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2918 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2920 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2923 for_each_port_masked(port, ports) {
2924 struct intel_bios_encoder_data *devdata;
2925 struct child_device_config *child;
2926 enum phy phy = intel_port_to_phy(i915, port);
2929 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2932 if (intel_phy_is_tc(i915, phy))
2935 /* Create fake child device config */
2936 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2940 devdata->i915 = i915;
2941 child = &devdata->child;
2944 child->dvo_port = DVO_PORT_HDMIF;
2945 else if (port == PORT_E)
2946 child->dvo_port = DVO_PORT_HDMIE;
2948 child->dvo_port = DVO_PORT_HDMIA + port;
2950 if (port != PORT_A && port != PORT_E)
2951 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2954 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2957 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2959 list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2961 drm_dbg_kms(&i915->drm,
2962 "Generating default VBT child device with type 0x04%x on port %c\n",
2963 child->device_type, port_name(port));
2966 /* Bypass some minimum baseline VBT version checks */
2967 i915->display.vbt.version = 155;
2970 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2972 const void *_vbt = vbt;
2974 return _vbt + vbt->bdb_offset;
2978 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2979 * @buf: pointer to a buffer to validate
2980 * @size: size of the buffer
2982 * Returns true on valid VBT.
2984 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2986 const struct vbt_header *vbt = buf;
2987 const struct bdb_header *bdb;
2992 if (sizeof(struct vbt_header) > size) {
2993 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2997 if (memcmp(vbt->signature, "$VBT", 4)) {
2998 DRM_DEBUG_DRIVER("VBT invalid signature\n");
3002 if (vbt->vbt_size > size) {
3003 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
3007 size = vbt->vbt_size;
3009 if (range_overflows_t(size_t,
3011 sizeof(struct bdb_header),
3013 DRM_DEBUG_DRIVER("BDB header incomplete\n");
3017 bdb = get_bdb_header(vbt);
3018 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
3019 DRM_DEBUG_DRIVER("BDB incomplete\n");
3026 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
3028 u32 count, data, found, store = 0;
3029 u32 static_region, oprom_offset;
3030 u32 oprom_size = 0x200000;
3034 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
3035 static_region &= OPTIONROM_SPI_REGIONID_MASK;
3036 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
3038 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
3039 oprom_offset &= OROM_OFFSET_MASK;
3041 for (count = 0; count < oprom_size; count += 4) {
3042 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count);
3043 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
3045 if (data == *((const u32 *)"$VBT")) {
3046 found = oprom_offset + count;
3051 if (count >= oprom_size)
3054 /* Get VBT size and allocate space for the VBT */
3055 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found +
3056 offsetof(struct vbt_header, vbt_size));
3057 vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
3060 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
3064 for (count = 0; count < vbt_size; count += 4) {
3065 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count);
3066 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
3067 *(vbt + store++) = data;
3070 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
3073 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
3075 return (struct vbt_header *)vbt;
3083 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
3085 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
3086 void __iomem *p = NULL, *oprom;
3087 struct vbt_header *vbt;
3091 oprom = pci_map_rom(pdev, &size);
3095 /* Scour memory looking for the VBT signature. */
3096 for (i = 0; i + 4 < size; i += 4) {
3097 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
3106 goto err_unmap_oprom;
3108 if (sizeof(struct vbt_header) > size) {
3109 drm_dbg(&i915->drm, "VBT header incomplete\n");
3110 goto err_unmap_oprom;
3113 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
3114 if (vbt_size > size) {
3116 "VBT incomplete (vbt_size overflows)\n");
3117 goto err_unmap_oprom;
3120 /* The rest will be validated by intel_bios_is_valid_vbt() */
3121 vbt = kmalloc(vbt_size, GFP_KERNEL);
3123 goto err_unmap_oprom;
3125 memcpy_fromio(vbt, p, vbt_size);
3127 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
3130 pci_unmap_rom(pdev, oprom);
3132 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
3139 pci_unmap_rom(pdev, oprom);
3145 * intel_bios_init - find VBT and initialize settings from the BIOS
3146 * @i915: i915 device instance
3148 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3149 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3150 * initialize some defaults if the VBT is not present at all.
3152 void intel_bios_init(struct drm_i915_private *i915)
3154 const struct vbt_header *vbt = i915->display.opregion.vbt;
3155 struct vbt_header *oprom_vbt = NULL;
3156 const struct bdb_header *bdb;
3158 INIT_LIST_HEAD(&i915->display.vbt.display_devices);
3159 INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks);
3161 if (!HAS_DISPLAY(i915)) {
3162 drm_dbg_kms(&i915->drm,
3163 "Skipping VBT init due to disabled display.\n");
3167 init_vbt_defaults(i915);
3170 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
3173 if (!vbt && IS_DGFX(i915)) {
3174 oprom_vbt = spi_oprom_get_vbt(i915);
3179 oprom_vbt = oprom_get_vbt(i915);
3186 bdb = get_bdb_header(vbt);
3187 i915->display.vbt.version = bdb->version;
3189 drm_dbg_kms(&i915->drm,
3190 "VBT signature \"%.*s\", BDB version %d\n",
3191 (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version);
3193 init_bdb_blocks(i915, bdb);
3195 /* Grab useful general definitions */
3196 parse_general_features(i915);
3197 parse_general_definitions(i915);
3198 parse_driver_features(i915);
3200 /* Depends on child device list */
3201 parse_compression_parameters(i915);
3205 drm_info(&i915->drm,
3206 "Failed to find VBIOS tables (VBT)\n");
3207 init_vbt_missing_defaults(i915);
3210 /* Further processing on pre-parsed or generated child device data */
3211 parse_sdvo_device_mapping(i915);
3212 parse_ddi_ports(i915);
3217 static void intel_bios_init_panel(struct drm_i915_private *i915,
3218 struct intel_panel *panel,
3219 const struct intel_bios_encoder_data *devdata,
3220 const struct drm_edid *drm_edid,
3223 /* already have it? */
3224 if (panel->vbt.panel_type >= 0) {
3225 drm_WARN_ON(&i915->drm, !use_fallback);
3229 panel->vbt.panel_type = get_panel_type(i915, devdata,
3230 drm_edid, use_fallback);
3231 if (panel->vbt.panel_type < 0) {
3232 drm_WARN_ON(&i915->drm, use_fallback);
3236 init_vbt_panel_defaults(panel);
3238 parse_panel_options(i915, panel);
3239 parse_generic_dtd(i915, panel);
3240 parse_lfp_data(i915, panel);
3241 parse_lfp_backlight(i915, panel);
3242 parse_sdvo_panel_data(i915, panel);
3243 parse_panel_driver_features(i915, panel);
3244 parse_power_conservation_features(i915, panel);
3245 parse_edp(i915, panel);
3246 parse_psr(i915, panel);
3247 parse_mipi_config(i915, panel);
3248 parse_mipi_sequence(i915, panel);
3251 void intel_bios_init_panel_early(struct drm_i915_private *i915,
3252 struct intel_panel *panel,
3253 const struct intel_bios_encoder_data *devdata)
3255 intel_bios_init_panel(i915, panel, devdata, NULL, false);
3258 void intel_bios_init_panel_late(struct drm_i915_private *i915,
3259 struct intel_panel *panel,
3260 const struct intel_bios_encoder_data *devdata,
3261 const struct drm_edid *drm_edid)
3263 intel_bios_init_panel(i915, panel, devdata, drm_edid, true);
3267 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3268 * @i915: i915 device instance
3270 void intel_bios_driver_remove(struct drm_i915_private *i915)
3272 struct intel_bios_encoder_data *devdata, *nd;
3273 struct bdb_block_entry *entry, *ne;
3275 list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) {
3276 list_del(&devdata->node);
3277 kfree(devdata->dsc);
3281 list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) {
3282 list_del(&entry->node);
3287 void intel_bios_fini_panel(struct intel_panel *panel)
3289 kfree(panel->vbt.sdvo_lvds_vbt_mode);
3290 panel->vbt.sdvo_lvds_vbt_mode = NULL;
3291 kfree(panel->vbt.lfp_lvds_vbt_mode);
3292 panel->vbt.lfp_lvds_vbt_mode = NULL;
3293 kfree(panel->vbt.dsi.data);
3294 panel->vbt.dsi.data = NULL;
3295 kfree(panel->vbt.dsi.pps);
3296 panel->vbt.dsi.pps = NULL;
3297 kfree(panel->vbt.dsi.config);
3298 panel->vbt.dsi.config = NULL;
3299 kfree(panel->vbt.dsi.deassert_seq);
3300 panel->vbt.dsi.deassert_seq = NULL;
3304 * intel_bios_is_tv_present - is integrated TV present in VBT
3305 * @i915: i915 device instance
3307 * Return true if TV is present. If no child devices were parsed from VBT,
3308 * assume TV is present.
3310 bool intel_bios_is_tv_present(struct drm_i915_private *i915)
3312 const struct intel_bios_encoder_data *devdata;
3314 if (!i915->display.vbt.int_tv_support)
3317 if (list_empty(&i915->display.vbt.display_devices))
3320 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3321 const struct child_device_config *child = &devdata->child;
3324 * If the device type is not TV, continue.
3326 switch (child->device_type) {
3327 case DEVICE_TYPE_INT_TV:
3328 case DEVICE_TYPE_TV:
3329 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3334 /* Only when the addin_offset is non-zero, it is regarded
3337 if (child->addin_offset)
3345 * intel_bios_is_lvds_present - is LVDS present in VBT
3346 * @i915: i915 device instance
3347 * @i2c_pin: i2c pin for LVDS if present
3349 * Return true if LVDS is present. If no child devices were parsed from VBT,
3350 * assume LVDS is present.
3352 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3354 const struct intel_bios_encoder_data *devdata;
3356 if (list_empty(&i915->display.vbt.display_devices))
3359 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3360 const struct child_device_config *child = &devdata->child;
3362 /* If the device type is not LFP, continue.
3363 * We have to check both the new identifiers as well as the
3364 * old for compatibility with some BIOSes.
3366 if (child->device_type != DEVICE_TYPE_INT_LFP &&
3367 child->device_type != DEVICE_TYPE_LFP)
3370 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
3371 *i2c_pin = child->i2c_pin;
3373 /* However, we cannot trust the BIOS writers to populate
3374 * the VBT correctly. Since LVDS requires additional
3375 * information from AIM blocks, a non-zero addin offset is
3376 * a good indicator that the LVDS is actually present.
3378 if (child->addin_offset)
3381 /* But even then some BIOS writers perform some black magic
3382 * and instantiate the device without reference to any
3383 * additional data. Trust that if the VBT was written into
3384 * the OpRegion then they have validated the LVDS's existence.
3386 if (i915->display.opregion.vbt)
3394 * intel_bios_is_port_present - is the specified digital port present
3395 * @i915: i915 device instance
3396 * @port: port to check
3398 * Return true if the device in %port is present.
3400 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3402 if (WARN_ON(!has_ddi_port_info(i915)))
3405 return i915->display.vbt.ports[port];
3409 * intel_bios_is_port_edp - is the device in given port eDP
3410 * @i915: i915 device instance
3411 * @port: port to check
3413 * Return true if the device in %port is eDP.
3415 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
3417 const struct intel_bios_encoder_data *devdata =
3418 intel_bios_encoder_data_lookup(i915, port);
3420 return devdata && intel_bios_encoder_supports_edp(devdata);
3423 static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3425 const struct child_device_config *child = &devdata->child;
3427 if (!intel_bios_encoder_supports_dp(devdata) ||
3428 !intel_bios_encoder_supports_hdmi(devdata))
3431 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3434 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3435 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3436 child->aux_channel != 0)
3442 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
3445 const struct intel_bios_encoder_data *devdata =
3446 intel_bios_encoder_data_lookup(i915, port);
3448 return devdata && intel_bios_encoder_supports_dp_dual_mode(devdata);
3452 * intel_bios_is_dsi_present - is DSI present in VBT
3453 * @i915: i915 device instance
3454 * @port: port for DSI if present
3456 * Return true if DSI is present, and return the port in %port.
3458 bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3461 const struct intel_bios_encoder_data *devdata;
3463 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3464 const struct child_device_config *child = &devdata->child;
3465 u8 dvo_port = child->dvo_port;
3467 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3470 if (dsi_dvo_port_to_port(i915, dvo_port) == PORT_NONE) {
3471 drm_dbg_kms(&i915->drm,
3472 "VBT has unsupported DSI port %c\n",
3473 port_name(dvo_port - DVO_PORT_MIPIA));
3478 *port = dsi_dvo_port_to_port(i915, dvo_port);
3485 static void fill_dsc(struct intel_crtc_state *crtc_state,
3486 struct dsc_compression_parameters_entry *dsc,
3489 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3492 vdsc_cfg->dsc_version_major = dsc->version_major;
3493 vdsc_cfg->dsc_version_minor = dsc->version_minor;
3495 if (dsc->support_12bpc && dsc_max_bpc >= 12)
3497 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3499 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3502 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
3505 crtc_state->pipe_bpp = bpc * 3;
3507 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
3508 VBT_DSC_MAX_BPP(dsc->max_bpp));
3511 * FIXME: This is ugly, and slice count should take DSC engine
3512 * throughput etc. into account.
3514 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3516 if (dsc->slices_per_line & BIT(2)) {
3517 crtc_state->dsc.slice_count = 4;
3518 } else if (dsc->slices_per_line & BIT(1)) {
3519 crtc_state->dsc.slice_count = 2;
3522 if (!(dsc->slices_per_line & BIT(0)))
3523 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
3525 crtc_state->dsc.slice_count = 1;
3528 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3529 crtc_state->dsc.slice_count != 0)
3530 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
3531 crtc_state->hw.adjusted_mode.crtc_hdisplay,
3532 crtc_state->dsc.slice_count);
3535 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3536 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3538 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3539 dsc->rc_buffer_size);
3541 /* FIXME: DSI spec says bpc + 1 for this one */
3542 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3544 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3546 vdsc_cfg->slice_height = dsc->slice_height;
3549 /* FIXME: initially DSI specific */
3550 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3551 struct intel_crtc_state *crtc_state,
3554 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3555 const struct intel_bios_encoder_data *devdata;
3557 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3558 const struct child_device_config *child = &devdata->child;
3560 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3563 if (dsi_dvo_port_to_port(i915, child->dvo_port) == encoder->port) {
3568 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3578 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
3579 * @i915: i915 device instance
3580 * @port: port to check
3582 * Return true if HPD should be inverted for %port.
3585 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
3588 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port];
3590 if (drm_WARN_ON_ONCE(&i915->drm,
3591 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
3594 return devdata && devdata->child.hpd_invert;
3598 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
3599 * @i915: i915 device instance
3600 * @port: port to check
3602 * Return true if port requires lane reversal
3605 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
3608 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port];
3610 return devdata && devdata->child.lane_reversal;
3613 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
3616 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port];
3619 if (!devdata || !devdata->child.aux_channel) {
3620 aux_ch = (enum aux_ch)port;
3622 drm_dbg_kms(&i915->drm,
3623 "using AUX %c for port %c (platform default)\n",
3624 aux_ch_name(aux_ch), port_name(port));
3629 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3630 * map to DDI A,B,TC1,TC2 respectively.
3632 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3633 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3635 switch (devdata->child.aux_channel) {
3640 if (IS_ALDERLAKE_S(i915))
3641 aux_ch = AUX_CH_USBC1;
3646 if (IS_ALDERLAKE_S(i915))
3647 aux_ch = AUX_CH_USBC2;
3648 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3649 aux_ch = AUX_CH_USBC1;
3654 if (DISPLAY_VER(i915) >= 13)
3655 aux_ch = AUX_CH_D_XELPD;
3656 else if (IS_ALDERLAKE_S(i915))
3657 aux_ch = AUX_CH_USBC3;
3658 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3659 aux_ch = AUX_CH_USBC2;
3664 if (DISPLAY_VER(i915) >= 13)
3665 aux_ch = AUX_CH_E_XELPD;
3666 else if (IS_ALDERLAKE_S(i915))
3667 aux_ch = AUX_CH_USBC4;
3672 if (DISPLAY_VER(i915) >= 13)
3673 aux_ch = AUX_CH_USBC1;
3678 if (DISPLAY_VER(i915) >= 13)
3679 aux_ch = AUX_CH_USBC2;
3684 if (DISPLAY_VER(i915) >= 13)
3685 aux_ch = AUX_CH_USBC3;
3690 if (DISPLAY_VER(i915) >= 13)
3691 aux_ch = AUX_CH_USBC4;
3696 MISSING_CASE(devdata->child.aux_channel);
3701 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
3702 aux_ch_name(aux_ch), port_name(port));
3707 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
3709 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3710 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3712 return _intel_bios_max_tmds_clock(devdata);
3715 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
3716 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
3718 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3719 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3721 return _intel_bios_hdmi_level_shift(devdata);
3724 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3726 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3729 return translate_iboost(devdata->child.dp_iboost_level);
3732 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3734 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3737 return translate_iboost(devdata->child.hdmi_iboost_level);
3740 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
3742 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3743 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3745 return _intel_bios_dp_max_link_rate(devdata);
3748 int intel_bios_dp_max_lane_count(struct intel_encoder *encoder)
3750 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3751 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3753 return _intel_bios_dp_max_lane_count(devdata);
3756 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
3758 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3759 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port];
3761 if (!devdata || !devdata->child.ddc_pin)
3764 return map_ddc_pin(i915, devdata->child.ddc_pin);
3767 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3769 return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c;
3772 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3774 return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt;
3777 const struct intel_bios_encoder_data *
3778 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3780 return i915->display.vbt.ports[port];