2 * Copyright 2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 #include <linux/acpi.h>
25 #include <linux/acpi_io.h>
27 #include "psb_intel_reg.h"
32 #define OPREGION_HEADER_OFFSET 0
33 #define OPREGION_ACPI_OFFSET 0x100
34 #define ACPI_CLID 0x01ac /* current lid state indicator */
35 #define ACPI_CDCK 0x01b0 /* current docking state indicator */
36 #define OPREGION_SWSCI_OFFSET 0x200
37 #define OPREGION_ASLE_OFFSET 0x300
38 #define OPREGION_VBT_OFFSET 0x400
40 #define OPREGION_SIGNATURE "IntelGraphicsMem"
41 #define MBOX_ACPI (1<<0)
42 #define MBOX_SWSCI (1<<1)
43 #define MBOX_ASLE (1<<2)
45 struct opregion_header {
56 /* OpRegion mailbox #1: public ACPI methods */
57 struct opregion_acpi {
58 u32 drdy; /* driver readiness */
59 u32 csts; /* notification status */
60 u32 cevt; /* current event */
62 u32 didl[8]; /* supported display devices ID list */
63 u32 cpdl[8]; /* currently presented display list */
64 u32 cadl[8]; /* currently active display list */
65 u32 nadl[8]; /* next active devices list */
66 u32 aslp; /* ASL sleep time-out */
67 u32 tidx; /* toggle table index */
68 u32 chpd; /* current hotplug enable indicator */
69 u32 clid; /* current lid state*/
70 u32 cdck; /* current docking state */
71 u32 sxsw; /* Sx state resume */
72 u32 evts; /* ASL supported events */
73 u32 cnot; /* current OS notification */
74 u32 nrdy; /* driver status */
78 /* OpRegion mailbox #2: SWSCI */
79 struct opregion_swsci {
80 /*FIXME: add it later*/
83 /* OpRegion mailbox #3: ASLE */
84 struct opregion_asle {
85 u32 ardy; /* driver readiness */
86 u32 aslc; /* ASLE interrupt command */
87 u32 tche; /* technology enabled indicator */
88 u32 alsi; /* current ALS illuminance reading */
89 u32 bclp; /* backlight brightness to set */
90 u32 pfit; /* panel fitting state */
91 u32 cblv; /* current brightness level */
92 u16 bclm[20]; /* backlight level duty cycle mapping table */
93 u32 cpfm; /* current panel fitting mode */
94 u32 epfm; /* enabled panel fitting modes */
95 u8 plut[74]; /* panel LUT and identifier */
96 u32 pfmb; /* PWM freq and min brightness */
100 /* ASLE irq request bits */
101 #define ASLE_SET_ALS_ILLUM (1 << 0)
102 #define ASLE_SET_BACKLIGHT (1 << 1)
103 #define ASLE_SET_PFIT (1 << 2)
104 #define ASLE_SET_PWM_FREQ (1 << 3)
105 #define ASLE_REQ_MSK 0xf
107 /* response bits of ASLE irq request */
108 #define ASLE_ALS_ILLUM_FAILED (1<<10)
109 #define ASLE_BACKLIGHT_FAILED (1<<12)
110 #define ASLE_PFIT_FAILED (1<<14)
111 #define ASLE_PWM_FREQ_FAILED (1<<16)
113 /* ASLE backlight brightness to set */
114 #define ASLE_BCLP_VALID (1<<31)
115 #define ASLE_BCLP_MSK (~(1<<31))
117 /* ASLE panel fitting request */
118 #define ASLE_PFIT_VALID (1<<31)
119 #define ASLE_PFIT_CENTER (1<<0)
120 #define ASLE_PFIT_STRETCH_TEXT (1<<1)
121 #define ASLE_PFIT_STRETCH_GFX (1<<2)
123 /* response bits of ASLE irq request */
124 #define ASLE_ALS_ILLUM_FAILED (1<<10)
125 #define ASLE_BACKLIGHT_FAILED (1<<12)
126 #define ASLE_PFIT_FAILED (1<<14)
127 #define ASLE_PWM_FREQ_FAILED (1<<16)
129 /* ASLE backlight brightness to set */
130 #define ASLE_BCLP_VALID (1<<31)
131 #define ASLE_BCLP_MSK (~(1<<31))
133 /* ASLE panel fitting request */
134 #define ASLE_PFIT_VALID (1<<31)
135 #define ASLE_PFIT_CENTER (1<<0)
136 #define ASLE_PFIT_STRETCH_TEXT (1<<1)
137 #define ASLE_PFIT_STRETCH_GFX (1<<2)
139 /* PWM frequency and minimum brightness */
140 #define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
141 #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
142 #define ASLE_PFMB_PWM_MASK (0x7ffffe00)
143 #define ASLE_PFMB_PWM_VALID (1<<31)
145 #define ASLE_CBLV_VALID (1<<31)
147 static struct psb_intel_opregion *system_opregion;
149 static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
151 struct drm_psb_private *dev_priv = dev->dev_private;
152 struct opregion_asle *asle = dev_priv->opregion.asle;
153 struct backlight_device *bd = dev_priv->backlight_device;
155 DRM_DEBUG_DRIVER("asle set backlight %x\n", bclp);
157 if (!(bclp & ASLE_BCLP_VALID))
158 return ASLE_BACKLIGHT_FAILED;
161 return ASLE_BACKLIGHT_FAILED;
163 bclp &= ASLE_BCLP_MSK;
165 return ASLE_BACKLIGHT_FAILED;
167 if (config_enabled(CONFIG_BACKLIGHT_CLASS_DEVICE)) {
168 int max = bd->props.max_brightness;
169 bd->props.brightness = bclp * max / 255;
170 backlight_update_status(bd);
173 asle->cblv = (bclp * 0x64) / 0xff | ASLE_CBLV_VALID;
178 void psb_intel_opregion_asle_intr(struct drm_device *dev)
180 struct drm_psb_private *dev_priv = dev->dev_private;
181 struct opregion_asle *asle = dev_priv->opregion.asle;
188 asle_req = asle->aslc & ASLE_REQ_MSK;
190 DRM_DEBUG_DRIVER("non asle set request??\n");
194 if (asle_req & ASLE_SET_BACKLIGHT)
195 asle_stat |= asle_set_backlight(dev, asle->bclp);
197 asle->aslc = asle_stat;
200 #define ASLE_ALS_EN (1<<0)
201 #define ASLE_BLC_EN (1<<1)
202 #define ASLE_PFIT_EN (1<<2)
203 #define ASLE_PFMB_EN (1<<3)
205 void psb_intel_opregion_enable_asle(struct drm_device *dev)
207 struct drm_psb_private *dev_priv = dev->dev_private;
208 struct opregion_asle *asle = dev_priv->opregion.asle;
210 if (asle && system_opregion ) {
211 /* Don't do this on Medfield or other non PC like devices, they
212 use the bit for something different altogether */
213 psb_enable_pipestat(dev_priv, 0, PIPE_LEGACY_BLC_EVENT_ENABLE);
214 psb_enable_pipestat(dev_priv, 1, PIPE_LEGACY_BLC_EVENT_ENABLE);
216 asle->tche = ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN
222 #define ACPI_EV_DISPLAY_SWITCH (1<<0)
223 #define ACPI_EV_LID (1<<1)
224 #define ACPI_EV_DOCK (1<<2)
227 static int psb_intel_opregion_video_event(struct notifier_block *nb,
228 unsigned long val, void *data)
230 /* The only video events relevant to opregion are 0x80. These indicate
231 either a docking event, lid switch or display switch request. In
232 Linux, these are handled by the dock, button and video drivers.
233 We might want to fix the video driver to be opregion-aware in
234 future, but right now we just indicate to the firmware that the
235 request has been handled */
237 struct opregion_acpi *acpi;
239 if (!system_opregion)
242 acpi = system_opregion->acpi;
248 static struct notifier_block psb_intel_opregion_notifier = {
249 .notifier_call = psb_intel_opregion_video_event,
252 void psb_intel_opregion_init(struct drm_device *dev)
254 struct drm_psb_private *dev_priv = dev->dev_private;
255 struct psb_intel_opregion *opregion = &dev_priv->opregion;
257 if (!opregion->header)
260 if (opregion->acpi) {
261 /* Notify BIOS we are ready to handle ACPI video ext notifs.
262 * Right now, all the events are handled by the ACPI video
263 * module. We don't actually need to do anything with them. */
264 opregion->acpi->csts = 0;
265 opregion->acpi->drdy = 1;
267 system_opregion = opregion;
268 register_acpi_notifier(&psb_intel_opregion_notifier);
272 void psb_intel_opregion_fini(struct drm_device *dev)
274 struct drm_psb_private *dev_priv = dev->dev_private;
275 struct psb_intel_opregion *opregion = &dev_priv->opregion;
277 if (!opregion->header)
280 if (opregion->acpi) {
281 opregion->acpi->drdy = 0;
283 system_opregion = NULL;
284 unregister_acpi_notifier(&psb_intel_opregion_notifier);
287 /* just clear all opregion memory pointers now */
288 iounmap(opregion->header);
289 opregion->header = NULL;
290 opregion->acpi = NULL;
291 opregion->swsci = NULL;
292 opregion->asle = NULL;
293 opregion->vbt = NULL;
296 int psb_intel_opregion_setup(struct drm_device *dev)
298 struct drm_psb_private *dev_priv = dev->dev_private;
299 struct psb_intel_opregion *opregion = &dev_priv->opregion;
300 u32 opregion_phy, mboxes;
304 pci_read_config_dword(dev->pdev, PCI_ASLS, &opregion_phy);
305 if (opregion_phy == 0) {
306 DRM_DEBUG_DRIVER("ACPI Opregion not supported\n");
309 DRM_DEBUG("OpRegion detected at 0x%8x\n", opregion_phy);
310 base = acpi_os_ioremap(opregion_phy, 8*1024);
314 if (memcmp(base, OPREGION_SIGNATURE, 16)) {
315 DRM_DEBUG_DRIVER("opregion signature mismatch\n");
320 opregion->header = base;
321 opregion->vbt = base + OPREGION_VBT_OFFSET;
323 opregion->lid_state = base + ACPI_CLID;
325 mboxes = opregion->header->mboxes;
326 if (mboxes & MBOX_ACPI) {
327 DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
328 opregion->acpi = base + OPREGION_ACPI_OFFSET;
331 if (mboxes & MBOX_ASLE) {
332 DRM_DEBUG_DRIVER("ASLE supported\n");
333 opregion->asle = base + OPREGION_ASLE_OFFSET;