drivers/gpu/drm/exynos/exynos_drm_fimd.c

   1 /* exynos_drm_fimd.c
   2  *
   3  * Copyright (C) 2011 Samsung Electronics Co.Ltd
   4  * Authors:
   5  *      Joonyoung Shim <jy0922.shim@samsung.com>
   6  *      Inki Dae <inki.dae@samsung.com>
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  */
  14 #include <drm/drmP.h>
  15
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/clk.h>
  20 #include <linux/pm_runtime.h>
  21
  22 #include <video/samsung_fimd.h>
  23 #include <drm/exynos_drm.h>
  24
  25 #include "exynos_drm_drv.h"
  26 #include "exynos_drm_fbdev.h"
  27 #include "exynos_drm_crtc.h"
  28
  29 /*
  30  * FIMD is stand for Fully Interactive Mobile Display and
  31  * as a display controller, it transfers contents drawn on memory
  32  * to a LCD Panel through Display Interfaces such as RGB or
  33  * CPU Interface.
  34  */
  35
  36 /* position control register for hardware window 0, 2 ~ 4.*/
  37 #define VIDOSD_A(win)           (VIDOSD_BASE + 0x00 + (win) * 16)
  38 #define VIDOSD_B(win)           (VIDOSD_BASE + 0x04 + (win) * 16)
  39 /* size control register for hardware window 0. */
  40 #define VIDOSD_C_SIZE_W0        (VIDOSD_BASE + 0x08)
  41 /* alpha control register for hardware window 1 ~ 4. */
  42 #define VIDOSD_C(win)           (VIDOSD_BASE + 0x18 + (win) * 16)
  43 /* size control register for hardware window 1 ~ 4. */
  44 #define VIDOSD_D(win)           (VIDOSD_BASE + 0x0C + (win) * 16)
  45
  46 #define VIDWx_BUF_START(win, buf)       (VIDW_BUF_START(buf) + (win) * 8)
  47 #define VIDWx_BUF_END(win, buf)         (VIDW_BUF_END(buf) + (win) * 8)
  48 #define VIDWx_BUF_SIZE(win, buf)        (VIDW_BUF_SIZE(buf) + (win) * 4)
  49
  50 /* color key control register for hardware window 1 ~ 4. */
  51 #define WKEYCON0_BASE(x)                ((WKEYCON0 + 0x140) + (x * 8))
  52 /* color key value register for hardware window 1 ~ 4. */
  53 #define WKEYCON1_BASE(x)                ((WKEYCON1 + 0x140) + (x * 8))
  54
  55 /* FIMD has totally five hardware windows. */
  56 #define WINDOWS_NR      5
  57
  58 #define get_fimd_context(dev)   platform_get_drvdata(to_platform_device(dev))
  59
  60 struct fimd_driver_data {
  61         unsigned int timing_base;
  62 };
  63
  64 struct fimd_driver_data exynos4_fimd_driver_data = {
  65         .timing_base = 0x0,
  66 };
  67
  68 struct fimd_driver_data exynos5_fimd_driver_data = {
  69         .timing_base = 0x20000,
  70 };
  71
  72 struct fimd_win_data {
  73         unsigned int            offset_x;
  74         unsigned int            offset_y;
  75         unsigned int            ovl_width;
  76         unsigned int            ovl_height;
  77         unsigned int            fb_width;
  78         unsigned int            fb_height;
  79         unsigned int            bpp;
  80         dma_addr_t              dma_addr;
  81         void __iomem            *vaddr;
  82         unsigned int            buf_offsize;
  83         unsigned int            line_size;      /* bytes */
  84         bool                    enabled;
  85 };
  86
  87 struct fimd_context {
  88         struct exynos_drm_subdrv        subdrv;
  89         int                             irq;
  90         struct drm_crtc                 *crtc;
  91         struct clk                      *bus_clk;
  92         struct clk                      *lcd_clk;
  93         void __iomem                    *regs;
  94         struct fimd_win_data            win_data[WINDOWS_NR];
  95         unsigned int                    clkdiv;
  96         unsigned int                    default_win;
  97         unsigned long                   irq_flags;
  98         u32                             vidcon0;
  99         u32                             vidcon1;
 100         bool                            suspended;
 101         struct mutex                    lock;
 102
 103         struct exynos_drm_panel_info *panel;
 104 };
 105
 106 static inline struct fimd_driver_data *drm_fimd_get_driver_data(
 107         struct platform_device *pdev)
 108 {
 109         return (struct fimd_driver_data *)
 110                 platform_get_device_id(pdev)->driver_data;
 111 }
 112
 113 static bool fimd_display_is_connected(struct device *dev)
 114 {
 115         DRM_DEBUG_KMS("%s\n", __FILE__);
 116
 117         /* TODO. */
 118
 119         return true;
 120 }
 121
 122 static void *fimd_get_panel(struct device *dev)
 123 {
 124         struct fimd_context *ctx = get_fimd_context(dev);
 125
 126         DRM_DEBUG_KMS("%s\n", __FILE__);
 127
 128         return ctx->panel;
 129 }
 130
 131 static int fimd_check_timing(struct device *dev, void *timing)
 132 {
 133         DRM_DEBUG_KMS("%s\n", __FILE__);
 134
 135         /* TODO. */
 136
 137         return 0;
 138 }
 139
 140 static int fimd_display_power_on(struct device *dev, int mode)
 141 {
 142         DRM_DEBUG_KMS("%s\n", __FILE__);
 143
 144         /* TODO */
 145
 146         return 0;
 147 }
 148
 149 static struct exynos_drm_display_ops fimd_display_ops = {
 150         .type = EXYNOS_DISPLAY_TYPE_LCD,
 151         .is_connected = fimd_display_is_connected,
 152         .get_panel = fimd_get_panel,
 153         .check_timing = fimd_check_timing,
 154         .power_on = fimd_display_power_on,
 155 };
 156
 157 static void fimd_dpms(struct device *subdrv_dev, int mode)
 158 {
 159         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 160
 161         DRM_DEBUG_KMS("%s, %d\n", __FILE__, mode);
 162
 163         mutex_lock(&ctx->lock);
 164
 165         switch (mode) {
 166         case DRM_MODE_DPMS_ON:
 167                 /*
 168                  * enable fimd hardware only if suspended status.
 169                  *
 170                  * P.S. fimd_dpms function would be called at booting time so
 171                  * clk_enable could be called double time.
 172                  */
 173                 if (ctx->suspended)
 174                         pm_runtime_get_sync(subdrv_dev);
 175                 break;
 176         case DRM_MODE_DPMS_STANDBY:
 177         case DRM_MODE_DPMS_SUSPEND:
 178         case DRM_MODE_DPMS_OFF:
 179                 if (!ctx->suspended)
 180                         pm_runtime_put_sync(subdrv_dev);
 181                 break;
 182         default:
 183                 DRM_DEBUG_KMS("unspecified mode %d\n", mode);
 184                 break;
 185         }
 186
 187         mutex_unlock(&ctx->lock);
 188 }
 189
 190 static void fimd_apply(struct device *subdrv_dev)
 191 {
 192         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 193         struct exynos_drm_manager *mgr = ctx->subdrv.manager;
 194         struct exynos_drm_manager_ops *mgr_ops = mgr->ops;
 195         struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops;
 196         struct fimd_win_data *win_data;
 197         int i;
 198
 199         DRM_DEBUG_KMS("%s\n", __FILE__);
 200
 201         for (i = 0; i < WINDOWS_NR; i++) {
 202                 win_data = &ctx->win_data[i];
 203                 if (win_data->enabled && (ovl_ops && ovl_ops->commit))
 204                         ovl_ops->commit(subdrv_dev, i);
 205         }
 206
 207         if (mgr_ops && mgr_ops->commit)
 208                 mgr_ops->commit(subdrv_dev);
 209 }
 210
 211 static void fimd_commit(struct device *dev)
 212 {
 213         struct fimd_context *ctx = get_fimd_context(dev);
 214         struct exynos_drm_panel_info *panel = ctx->panel;
 215         struct fb_videomode *timing = &panel->timing;
 216         struct fimd_driver_data *driver_data;
 217         struct platform_device *pdev = to_platform_device(dev);
 218         u32 val;
 219
 220         driver_data = drm_fimd_get_driver_data(pdev);
 221         if (ctx->suspended)
 222                 return;
 223
 224         DRM_DEBUG_KMS("%s\n", __FILE__);
 225
 226         /* setup polarity values from machine code. */
 227         writel(ctx->vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);
 228
 229         /* setup vertical timing values. */
 230         val = VIDTCON0_VBPD(timing->upper_margin - 1) |
 231                VIDTCON0_VFPD(timing->lower_margin - 1) |
 232                VIDTCON0_VSPW(timing->vsync_len - 1);
 233         writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);
 234
 235         /* setup horizontal timing values.  */
 236         val = VIDTCON1_HBPD(timing->left_margin - 1) |
 237                VIDTCON1_HFPD(timing->right_margin - 1) |
 238                VIDTCON1_HSPW(timing->hsync_len - 1);
 239         writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);
 240
 241         /* setup horizontal and vertical display size. */
 242         val = VIDTCON2_LINEVAL(timing->yres - 1) |
 243                VIDTCON2_HOZVAL(timing->xres - 1);
 244         writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
 245
 246         /* setup clock source, clock divider, enable dma. */
 247         val = ctx->vidcon0;
 248         val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
 249
 250         if (ctx->clkdiv > 1)
 251                 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR;
 252         else
 253                 val &= ~VIDCON0_CLKDIR; /* 1:1 clock */
 254
 255         /*
 256          * fields of register with prefix '_F' would be updated
 257          * at vsync(same as dma start)
 258          */
 259         val |= VIDCON0_ENVID | VIDCON0_ENVID_F;
 260         writel(val, ctx->regs + VIDCON0);
 261 }
 262
 263 static int fimd_enable_vblank(struct device *dev)
 264 {
 265         struct fimd_context *ctx = get_fimd_context(dev);
 266         u32 val;
 267
 268         DRM_DEBUG_KMS("%s\n", __FILE__);
 269
 270         if (ctx->suspended)
 271                 return -EPERM;
 272
 273         if (!test_and_set_bit(0, &ctx->irq_flags)) {
 274                 val = readl(ctx->regs + VIDINTCON0);
 275
 276                 val |= VIDINTCON0_INT_ENABLE;
 277                 val |= VIDINTCON0_INT_FRAME;
 278
 279                 val &= ~VIDINTCON0_FRAMESEL0_MASK;
 280                 val |= VIDINTCON0_FRAMESEL0_VSYNC;
 281                 val &= ~VIDINTCON0_FRAMESEL1_MASK;
 282                 val |= VIDINTCON0_FRAMESEL1_NONE;
 283
 284                 writel(val, ctx->regs + VIDINTCON0);
 285         }
 286
 287         return 0;
 288 }
 289
 290 static void fimd_disable_vblank(struct device *dev)
 291 {
 292         struct fimd_context *ctx = get_fimd_context(dev);
 293         u32 val;
 294
 295         DRM_DEBUG_KMS("%s\n", __FILE__);
 296
 297         if (ctx->suspended)
 298                 return;
 299
 300         if (test_and_clear_bit(0, &ctx->irq_flags)) {
 301                 val = readl(ctx->regs + VIDINTCON0);
 302
 303                 val &= ~VIDINTCON0_INT_FRAME;
 304                 val &= ~VIDINTCON0_INT_ENABLE;
 305
 306                 writel(val, ctx->regs + VIDINTCON0);
 307         }
 308 }
 309
 310 static struct exynos_drm_manager_ops fimd_manager_ops = {
 311         .dpms = fimd_dpms,
 312         .apply = fimd_apply,
 313         .commit = fimd_commit,
 314         .enable_vblank = fimd_enable_vblank,
 315         .disable_vblank = fimd_disable_vblank,
 316 };
 317
 318 static void fimd_win_mode_set(struct device *dev,
 319                               struct exynos_drm_overlay *overlay)
 320 {
 321         struct fimd_context *ctx = get_fimd_context(dev);
 322         struct fimd_win_data *win_data;
 323         int win;
 324         unsigned long offset;
 325
 326         DRM_DEBUG_KMS("%s\n", __FILE__);
 327
 328         if (!overlay) {
 329                 dev_err(dev, "overlay is NULL\n");
 330                 return;
 331         }
 332
 333         win = overlay->zpos;
 334         if (win == DEFAULT_ZPOS)
 335                 win = ctx->default_win;
 336
 337         if (win < 0 || win > WINDOWS_NR)
 338                 return;
 339
 340         offset = overlay->fb_x * (overlay->bpp >> 3);
 341         offset += overlay->fb_y * overlay->pitch;
 342
 343         DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch);
 344
 345         win_data = &ctx->win_data[win];
 346
 347         win_data->offset_x = overlay->crtc_x;
 348         win_data->offset_y = overlay->crtc_y;
 349         win_data->ovl_width = overlay->crtc_width;
 350         win_data->ovl_height = overlay->crtc_height;
 351         win_data->fb_width = overlay->fb_width;
 352         win_data->fb_height = overlay->fb_height;
 353         win_data->dma_addr = overlay->dma_addr[0] + offset;
 354         win_data->vaddr = overlay->vaddr[0] + offset;
 355         win_data->bpp = overlay->bpp;
 356         win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) *
 357                                 (overlay->bpp >> 3);
 358         win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3);
 359
 360         DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n",
 361                         win_data->offset_x, win_data->offset_y);
 362         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 363                         win_data->ovl_width, win_data->ovl_height);
 364         DRM_DEBUG_KMS("paddr = 0x%lx, vaddr = 0x%lx\n",
 365                         (unsigned long)win_data->dma_addr,
 366                         (unsigned long)win_data->vaddr);
 367         DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n",
 368                         overlay->fb_width, overlay->crtc_width);
 369 }
 370
 371 static void fimd_win_set_pixfmt(struct device *dev, unsigned int win)
 372 {
 373         struct fimd_context *ctx = get_fimd_context(dev);
 374         struct fimd_win_data *win_data = &ctx->win_data[win];
 375         unsigned long val;
 376
 377         DRM_DEBUG_KMS("%s\n", __FILE__);
 378
 379         val = WINCONx_ENWIN;
 380
 381         switch (win_data->bpp) {
 382         case 1:
 383                 val |= WINCON0_BPPMODE_1BPP;
 384                 val |= WINCONx_BITSWP;
 385                 val |= WINCONx_BURSTLEN_4WORD;
 386                 break;
 387         case 2:
 388                 val |= WINCON0_BPPMODE_2BPP;
 389                 val |= WINCONx_BITSWP;
 390                 val |= WINCONx_BURSTLEN_8WORD;
 391                 break;
 392         case 4:
 393                 val |= WINCON0_BPPMODE_4BPP;
 394                 val |= WINCONx_BITSWP;
 395                 val |= WINCONx_BURSTLEN_8WORD;
 396                 break;
 397         case 8:
 398                 val |= WINCON0_BPPMODE_8BPP_PALETTE;
 399                 val |= WINCONx_BURSTLEN_8WORD;
 400                 val |= WINCONx_BYTSWP;
 401                 break;
 402         case 16:
 403                 val |= WINCON0_BPPMODE_16BPP_565;
 404                 val |= WINCONx_HAWSWP;
 405                 val |= WINCONx_BURSTLEN_16WORD;
 406                 break;
 407         case 24:
 408                 val |= WINCON0_BPPMODE_24BPP_888;
 409                 val |= WINCONx_WSWP;
 410                 val |= WINCONx_BURSTLEN_16WORD;
 411                 break;
 412         case 32:
 413                 val |= WINCON1_BPPMODE_28BPP_A4888
 414                         | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
 415                 val |= WINCONx_WSWP;
 416                 val |= WINCONx_BURSTLEN_16WORD;
 417                 break;
 418         default:
 419                 DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n");
 420
 421                 val |= WINCON0_BPPMODE_24BPP_888;
 422                 val |= WINCONx_WSWP;
 423                 val |= WINCONx_BURSTLEN_16WORD;
 424                 break;
 425         }
 426
 427         DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp);
 428
 429         writel(val, ctx->regs + WINCON(win));
 430 }
 431
 432 static void fimd_win_set_colkey(struct device *dev, unsigned int win)
 433 {
 434         struct fimd_context *ctx = get_fimd_context(dev);
 435         unsigned int keycon0 = 0, keycon1 = 0;
 436
 437         DRM_DEBUG_KMS("%s\n", __FILE__);
 438
 439         keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F |
 440                         WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
 441
 442         keycon1 = WxKEYCON1_COLVAL(0xffffffff);
 443
 444         writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
 445         writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
 446 }
 447
 448 static void fimd_win_commit(struct device *dev, int zpos)
 449 {
 450         struct fimd_context *ctx = get_fimd_context(dev);
 451         struct fimd_win_data *win_data;
 452         int win = zpos;
 453         unsigned long val, alpha, size;
 454
 455         DRM_DEBUG_KMS("%s\n", __FILE__);
 456
 457         if (ctx->suspended)
 458                 return;
 459
 460         if (win == DEFAULT_ZPOS)
 461                 win = ctx->default_win;
 462
 463         if (win < 0 || win > WINDOWS_NR)
 464                 return;
 465
 466         win_data = &ctx->win_data[win];
 467
 468         /*
 469          * SHADOWCON register is used for enabling timing.
 470          *
 471          * for example, once only width value of a register is set,
 472          * if the dma is started then fimd hardware could malfunction so
 473          * with protect window setting, the register fields with prefix '_F'
 474          * wouldn't be updated at vsync also but updated once unprotect window
 475          * is set.
 476          */
 477
 478         /* protect windows */
 479         val = readl(ctx->regs + SHADOWCON);
 480         val |= SHADOWCON_WINx_PROTECT(win);
 481         writel(val, ctx->regs + SHADOWCON);
 482
 483         /* buffer start address */
 484         val = (unsigned long)win_data->dma_addr;
 485         writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
 486
 487         /* buffer end address */
 488         size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3);
 489         val = (unsigned long)(win_data->dma_addr + size);
 490         writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
 491
 492         DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n",
 493                         (unsigned long)win_data->dma_addr, val, size);
 494         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 495                         win_data->ovl_width, win_data->ovl_height);
 496
 497         /* buffer size */
 498         val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) |
 499                 VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size);
 500         writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
 501
 502         /* OSD position */
 503         val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) |
 504                 VIDOSDxA_TOPLEFT_Y(win_data->offset_y);
 505         writel(val, ctx->regs + VIDOSD_A(win));
 506
 507         val = VIDOSDxB_BOTRIGHT_X(win_data->offset_x +
 508                                         win_data->ovl_width - 1) |
 509                 VIDOSDxB_BOTRIGHT_Y(win_data->offset_y +
 510                                         win_data->ovl_height - 1);
 511         writel(val, ctx->regs + VIDOSD_B(win));
 512
 513         DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
 514                         win_data->offset_x, win_data->offset_y,
 515                         win_data->offset_x + win_data->ovl_width - 1,
 516                         win_data->offset_y + win_data->ovl_height - 1);
 517
 518         /* hardware window 0 doesn't support alpha channel. */
 519         if (win != 0) {
 520                 /* OSD alpha */
 521                 alpha = VIDISD14C_ALPHA1_R(0xf) |
 522                         VIDISD14C_ALPHA1_G(0xf) |
 523                         VIDISD14C_ALPHA1_B(0xf);
 524
 525                 writel(alpha, ctx->regs + VIDOSD_C(win));
 526         }
 527
 528         /* OSD size */
 529         if (win != 3 && win != 4) {
 530                 u32 offset = VIDOSD_D(win);
 531                 if (win == 0)
 532                         offset = VIDOSD_C_SIZE_W0;
 533                 val = win_data->ovl_width * win_data->ovl_height;
 534                 writel(val, ctx->regs + offset);
 535
 536                 DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
 537         }
 538
 539         fimd_win_set_pixfmt(dev, win);
 540
 541         /* hardware window 0 doesn't support color key. */
 542         if (win != 0)
 543                 fimd_win_set_colkey(dev, win);
 544
 545         /* wincon */
 546         val = readl(ctx->regs + WINCON(win));
 547         val |= WINCONx_ENWIN;
 548         writel(val, ctx->regs + WINCON(win));
 549
 550         /* Enable DMA channel and unprotect windows */
 551         val = readl(ctx->regs + SHADOWCON);
 552         val |= SHADOWCON_CHx_ENABLE(win);
 553         val &= ~SHADOWCON_WINx_PROTECT(win);
 554         writel(val, ctx->regs + SHADOWCON);
 555
 556         win_data->enabled = true;
 557 }
 558
 559 static void fimd_win_disable(struct device *dev, int zpos)
 560 {
 561         struct fimd_context *ctx = get_fimd_context(dev);
 562         struct fimd_win_data *win_data;
 563         int win = zpos;
 564         u32 val;
 565
 566         DRM_DEBUG_KMS("%s\n", __FILE__);
 567
 568         if (win == DEFAULT_ZPOS)
 569                 win = ctx->default_win;
 570
 571         if (win < 0 || win > WINDOWS_NR)
 572                 return;
 573
 574         win_data = &ctx->win_data[win];
 575
 576         /* protect windows */
 577         val = readl(ctx->regs + SHADOWCON);
 578         val |= SHADOWCON_WINx_PROTECT(win);
 579         writel(val, ctx->regs + SHADOWCON);
 580
 581         /* wincon */
 582         val = readl(ctx->regs + WINCON(win));
 583         val &= ~WINCONx_ENWIN;
 584         writel(val, ctx->regs + WINCON(win));
 585
 586         /* unprotect windows */
 587         val = readl(ctx->regs + SHADOWCON);
 588         val &= ~SHADOWCON_CHx_ENABLE(win);
 589         val &= ~SHADOWCON_WINx_PROTECT(win);
 590         writel(val, ctx->regs + SHADOWCON);
 591
 592         win_data->enabled = false;
 593 }
 594
 595 static void fimd_wait_for_vblank(struct device *dev)
 596 {
 597         struct fimd_context *ctx = get_fimd_context(dev);
 598         int ret;
 599
 600         ret = wait_for((__raw_readl(ctx->regs + VIDCON1) &
 601                                         VIDCON1_VSTATUS_VSYNC), 50);
 602         if (ret < 0)
 603                 DRM_DEBUG_KMS("vblank wait timed out.\n");
 604 }
 605
 606 static struct exynos_drm_overlay_ops fimd_overlay_ops = {
 607         .mode_set = fimd_win_mode_set,
 608         .commit = fimd_win_commit,
 609         .disable = fimd_win_disable,
 610         .wait_for_vblank = fimd_wait_for_vblank,
 611 };
 612
 613 static struct exynos_drm_manager fimd_manager = {
 614         .pipe           = -1,
 615         .ops            = &fimd_manager_ops,
 616         .overlay_ops    = &fimd_overlay_ops,
 617         .display_ops    = &fimd_display_ops,
 618 };
 619
 620 static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc)
 621 {
 622         struct exynos_drm_private *dev_priv = drm_dev->dev_private;
 623         struct drm_pending_vblank_event *e, *t;
 624         struct timeval now;
 625         unsigned long flags;
 626         bool is_checked = false;
 627
 628         spin_lock_irqsave(&drm_dev->event_lock, flags);
 629
 630         list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
 631                         base.link) {
 632                 /* if event's pipe isn't same as crtc then ignore it. */
 633                 if (crtc != e->pipe)
 634                         continue;
 635
 636                 is_checked = true;
 637
 638                 do_gettimeofday(&now);
 639                 e->event.sequence = 0;
 640                 e->event.tv_sec = now.tv_sec;
 641                 e->event.tv_usec = now.tv_usec;
 642
 643                 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
 644                 wake_up_interruptible(&e->base.file_priv->event_wait);
 645         }
 646
 647         if (is_checked) {
 648                 /*
 649                  * call drm_vblank_put only in case that drm_vblank_get was
 650                  * called.
 651                  */
 652                 if (atomic_read(&drm_dev->vblank_refcount[crtc]) > 0)
 653                         drm_vblank_put(drm_dev, crtc);
 654
 655                 /*
 656                  * don't off vblank if vblank_disable_allowed is 1,
 657                  * because vblank would be off by timer handler.
 658                  */
 659                 if (!drm_dev->vblank_disable_allowed)
 660                         drm_vblank_off(drm_dev, crtc);
 661         }
 662
 663         spin_unlock_irqrestore(&drm_dev->event_lock, flags);
 664 }
 665
 666 static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
 667 {
 668         struct fimd_context *ctx = (struct fimd_context *)dev_id;
 669         struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
 670         struct drm_device *drm_dev = subdrv->drm_dev;
 671         struct exynos_drm_manager *manager = subdrv->manager;
 672         u32 val;
 673
 674         val = readl(ctx->regs + VIDINTCON1);
 675
 676         if (val & VIDINTCON1_INT_FRAME)
 677                 /* VSYNC interrupt */
 678                 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1);
 679
 680         /* check the crtc is detached already from encoder */
 681         if (manager->pipe < 0)
 682                 goto out;
 683
 684         drm_handle_vblank(drm_dev, manager->pipe);
 685         fimd_finish_pageflip(drm_dev, manager->pipe);
 686
 687 out:
 688         return IRQ_HANDLED;
 689 }
 690
 691 static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
 692 {
 693         DRM_DEBUG_KMS("%s\n", __FILE__);
 694
 695         /*
 696          * enable drm irq mode.
 697          * - with irq_enabled = 1, we can use the vblank feature.
 698          *
 699          * P.S. note that we wouldn't use drm irq handler but
 700          *      just specific driver own one instead because
 701          *      drm framework supports only one irq handler.
 702          */
 703         drm_dev->irq_enabled = 1;
 704
 705         /*
 706          * with vblank_disable_allowed = 1, vblank interrupt will be disabled
 707          * by drm timer once a current process gives up ownership of
 708          * vblank event.(after drm_vblank_put function is called)
 709          */
 710         drm_dev->vblank_disable_allowed = 1;
 711
 712         return 0;
 713 }
 714
 715 static void fimd_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
 716 {
 717         DRM_DEBUG_KMS("%s\n", __FILE__);
 718
 719         /* TODO. */
 720 }
 721
 722 static int fimd_calc_clkdiv(struct fimd_context *ctx,
 723                             struct fb_videomode *timing)
 724 {
 725         unsigned long clk = clk_get_rate(ctx->lcd_clk);
 726         u32 retrace;
 727         u32 clkdiv;
 728         u32 best_framerate = 0;
 729         u32 framerate;
 730
 731         DRM_DEBUG_KMS("%s\n", __FILE__);
 732
 733         retrace = timing->left_margin + timing->hsync_len +
 734                                 timing->right_margin + timing->xres;
 735         retrace *= timing->upper_margin + timing->vsync_len +
 736                                 timing->lower_margin + timing->yres;
 737
 738         /* default framerate is 60Hz */
 739         if (!timing->refresh)
 740                 timing->refresh = 60;
 741
 742         clk /= retrace;
 743
 744         for (clkdiv = 1; clkdiv < 0x100; clkdiv++) {
 745                 int tmp;
 746
 747                 /* get best framerate */
 748                 framerate = clk / clkdiv;
 749                 tmp = timing->refresh - framerate;
 750                 if (tmp < 0) {
 751                         best_framerate = framerate;
 752                         continue;
 753                 } else {
 754                         if (!best_framerate)
 755                                 best_framerate = framerate;
 756                         else if (tmp < (best_framerate - framerate))
 757                                 best_framerate = framerate;
 758                         break;
 759                 }
 760         }
 761
 762         return clkdiv;
 763 }
 764
 765 static void fimd_clear_win(struct fimd_context *ctx, int win)
 766 {
 767         u32 val;
 768
 769         DRM_DEBUG_KMS("%s\n", __FILE__);
 770
 771         writel(0, ctx->regs + WINCON(win));
 772         writel(0, ctx->regs + VIDOSD_A(win));
 773         writel(0, ctx->regs + VIDOSD_B(win));
 774         writel(0, ctx->regs + VIDOSD_C(win));
 775
 776         if (win == 1 || win == 2)
 777                 writel(0, ctx->regs + VIDOSD_D(win));
 778
 779         val = readl(ctx->regs + SHADOWCON);
 780         val &= ~SHADOWCON_WINx_PROTECT(win);
 781         writel(val, ctx->regs + SHADOWCON);
 782 }
 783
 784 static int fimd_clock(struct fimd_context *ctx, bool enable)
 785 {
 786         DRM_DEBUG_KMS("%s\n", __FILE__);
 787
 788         if (enable) {
 789                 int ret;
 790
 791                 ret = clk_enable(ctx->bus_clk);
 792                 if (ret < 0)
 793                         return ret;
 794
 795                 ret = clk_enable(ctx->lcd_clk);
 796                 if  (ret < 0) {
 797                         clk_disable(ctx->bus_clk);
 798                         return ret;
 799                 }
 800         } else {
 801                 clk_disable(ctx->lcd_clk);
 802                 clk_disable(ctx->bus_clk);
 803         }
 804
 805         return 0;
 806 }
 807
 808 static int fimd_activate(struct fimd_context *ctx, bool enable)
 809 {
 810         if (enable) {
 811                 int ret;
 812                 struct device *dev = ctx->subdrv.dev;
 813
 814                 ret = fimd_clock(ctx, true);
 815                 if (ret < 0)
 816                         return ret;
 817
 818                 ctx->suspended = false;
 819
 820                 /* if vblank was enabled status, enable it again. */
 821                 if (test_and_clear_bit(0, &ctx->irq_flags))
 822                         fimd_enable_vblank(dev);
 823         } else {
 824                 fimd_clock(ctx, false);
 825                 ctx->suspended = true;
 826         }
 827
 828         return 0;
 829 }
 830
 831 static int __devinit fimd_probe(struct platform_device *pdev)
 832 {
 833         struct device *dev = &pdev->dev;
 834         struct fimd_context *ctx;
 835         struct exynos_drm_subdrv *subdrv;
 836         struct exynos_drm_fimd_pdata *pdata;
 837         struct exynos_drm_panel_info *panel;
 838         struct resource *res;
 839         int win;
 840         int ret = -EINVAL;
 841
 842         DRM_DEBUG_KMS("%s\n", __FILE__);
 843
 844         pdata = pdev->dev.platform_data;
 845         if (!pdata) {
 846                 dev_err(dev, "no platform data specified\n");
 847                 return -EINVAL;
 848         }
 849
 850         panel = &pdata->panel;
 851         if (!panel) {
 852                 dev_err(dev, "panel is null.\n");
 853                 return -EINVAL;
 854         }
 855
 856         ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
 857         if (!ctx)
 858                 return -ENOMEM;
 859
 860         ctx->bus_clk = clk_get(dev, "fimd");
 861         if (IS_ERR(ctx->bus_clk)) {
 862                 dev_err(dev, "failed to get bus clock\n");
 863                 ret = PTR_ERR(ctx->bus_clk);
 864                 goto err_clk_get;
 865         }
 866
 867         ctx->lcd_clk = clk_get(dev, "sclk_fimd");
 868         if (IS_ERR(ctx->lcd_clk)) {
 869                 dev_err(dev, "failed to get lcd clock\n");
 870                 ret = PTR_ERR(ctx->lcd_clk);
 871                 goto err_bus_clk;
 872         }
 873
 874         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 875
 876         ctx->regs = devm_request_and_ioremap(&pdev->dev, res);
 877         if (!ctx->regs) {
 878                 dev_err(dev, "failed to map registers\n");
 879                 ret = -ENXIO;
 880                 goto err_clk;
 881         }
 882
 883         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 884         if (!res) {
 885                 dev_err(dev, "irq request failed.\n");
 886                 goto err_clk;
 887         }
 888
 889         ctx->irq = res->start;
 890
 891         ret = devm_request_irq(&pdev->dev, ctx->irq, fimd_irq_handler,
 892                                                         0, "drm_fimd", ctx);
 893         if (ret) {
 894                 dev_err(dev, "irq request failed.\n");
 895                 goto err_clk;
 896         }
 897
 898         ctx->vidcon0 = pdata->vidcon0;
 899         ctx->vidcon1 = pdata->vidcon1;
 900         ctx->default_win = pdata->default_win;
 901         ctx->panel = panel;
 902
 903         subdrv = &ctx->subdrv;
 904
 905         subdrv->dev = dev;
 906         subdrv->manager = &fimd_manager;
 907         subdrv->probe = fimd_subdrv_probe;
 908         subdrv->remove = fimd_subdrv_remove;
 909
 910         mutex_init(&ctx->lock);
 911
 912         platform_set_drvdata(pdev, ctx);
 913
 914         pm_runtime_enable(dev);
 915         pm_runtime_get_sync(dev);
 916
 917         ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing);
 918         panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
 919
 920         DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n",
 921                         panel->timing.pixclock, ctx->clkdiv);
 922
 923         for (win = 0; win < WINDOWS_NR; win++)
 924                 fimd_clear_win(ctx, win);
 925
 926         exynos_drm_subdrv_register(subdrv);
 927
 928         return 0;
 929
 930 err_clk:
 931         clk_disable(ctx->lcd_clk);
 932         clk_put(ctx->lcd_clk);
 933
 934 err_bus_clk:
 935         clk_disable(ctx->bus_clk);
 936         clk_put(ctx->bus_clk);
 937
 938 err_clk_get:
 939         return ret;
 940 }
 941
 942 static int __devexit fimd_remove(struct platform_device *pdev)
 943 {
 944         struct device *dev = &pdev->dev;
 945         struct fimd_context *ctx = platform_get_drvdata(pdev);
 946
 947         DRM_DEBUG_KMS("%s\n", __FILE__);
 948
 949         exynos_drm_subdrv_unregister(&ctx->subdrv);
 950
 951         if (ctx->suspended)
 952                 goto out;
 953
 954         clk_disable(ctx->lcd_clk);
 955         clk_disable(ctx->bus_clk);
 956
 957         pm_runtime_set_suspended(dev);
 958         pm_runtime_put_sync(dev);
 959
 960 out:
 961         pm_runtime_disable(dev);
 962
 963         clk_put(ctx->lcd_clk);
 964         clk_put(ctx->bus_clk);
 965
 966         return 0;
 967 }
 968
 969 #ifdef CONFIG_PM_SLEEP
 970 static int fimd_suspend(struct device *dev)
 971 {
 972         struct fimd_context *ctx = get_fimd_context(dev);
 973
 974         /*
 975          * do not use pm_runtime_suspend(). if pm_runtime_suspend() is
 976          * called here, an error would be returned by that interface
 977          * because the usage_count of pm runtime is more than 1.
 978          */
 979         if (!pm_runtime_suspended(dev))
 980                 return fimd_activate(ctx, false);
 981
 982         return 0;
 983 }
 984
 985 static int fimd_resume(struct device *dev)
 986 {
 987         struct fimd_context *ctx = get_fimd_context(dev);
 988
 989         /*
 990          * if entered to sleep when lcd panel was on, the usage_count
 991          * of pm runtime would still be 1 so in this case, fimd driver
 992          * should be on directly not drawing on pm runtime interface.
 993          */
 994         if (pm_runtime_suspended(dev)) {
 995                 int ret;
 996
 997                 ret = fimd_activate(ctx, true);
 998                 if (ret < 0)
 999                         return ret;
1000
1001                 /*
1002                  * in case of dpms on(standby), fimd_apply function will
1003                  * be called by encoder's dpms callback to update fimd's
1004                  * registers but in case of sleep wakeup, it's not.
1005                  * so fimd_apply function should be called at here.
1006                  */
1007                 fimd_apply(dev);
1008         }
1009
1010         return 0;
1011 }
1012 #endif
1013
1014 #ifdef CONFIG_PM_RUNTIME
1015 static int fimd_runtime_suspend(struct device *dev)
1016 {
1017         struct fimd_context *ctx = get_fimd_context(dev);
1018
1019         DRM_DEBUG_KMS("%s\n", __FILE__);
1020
1021         return fimd_activate(ctx, false);
1022 }
1023
1024 static int fimd_runtime_resume(struct device *dev)
1025 {
1026         struct fimd_context *ctx = get_fimd_context(dev);
1027
1028         DRM_DEBUG_KMS("%s\n", __FILE__);
1029
1030         return fimd_activate(ctx, true);
1031 }
1032 #endif
1033
1034 static struct platform_device_id fimd_driver_ids[] = {
1035         {
1036                 .name           = "exynos4-fb",
1037                 .driver_data    = (unsigned long)&exynos4_fimd_driver_data,
1038         }, {
1039                 .name           = "exynos5-fb",
1040                 .driver_data    = (unsigned long)&exynos5_fimd_driver_data,
1041         },
1042         {},
1043 };
1044 MODULE_DEVICE_TABLE(platform, fimd_driver_ids);
1045
1046 static const struct dev_pm_ops fimd_pm_ops = {
1047         SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume)
1048         SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL)
1049 };
1050
1051 struct platform_driver fimd_driver = {
1052         .probe          = fimd_probe,
1053         .remove         = __devexit_p(fimd_remove),
1054         .id_table       = fimd_driver_ids,
1055         .driver         = {
1056                 .name   = "exynos4-fb",
1057                 .owner  = THIS_MODULE,
1058                 .pm     = &fimd_pm_ops,
1059         },
1060 };