3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * Inki Dae <inki.dae@samsung.com>
6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com>
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
30 #include "drm_crtc_helper.h"
32 #include "exynos_drm_crtc.h"
33 #include "exynos_drm_drv.h"
34 #include "exynos_drm_fb.h"
35 #include "exynos_drm_encoder.h"
36 #include "exynos_drm_gem.h"
37 #include "exynos_drm_buf.h"
39 #define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc,\
43 * Exynos specific crtc structure.
45 * @drm_crtc: crtc object.
46 * @overlay: contain information common to display controller and hdmi and
47 * contents of this overlay object would be copied to sub driver size.
48 * @pipe: a crtc index created at load() with a new crtc object creation
49 * and the crtc object would be set to private->crtc array
50 * to get a crtc object corresponding to this pipe from private->crtc
51 * array when irq interrupt occured. the reason of using this pipe is that
52 * drm framework doesn't support multiple irq yet.
53 * we can refer to the crtc to current hardware interrupt occured through
55 * @dpms: store the crtc dpms value
57 struct exynos_drm_crtc {
58 struct drm_crtc drm_crtc;
59 struct exynos_drm_overlay overlay;
64 static void exynos_drm_crtc_apply(struct drm_crtc *crtc)
66 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
67 struct exynos_drm_overlay *overlay = &exynos_crtc->overlay;
69 exynos_drm_fn_encoder(crtc, overlay,
70 exynos_drm_encoder_crtc_mode_set);
71 exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
72 exynos_drm_encoder_crtc_commit);
75 int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay,
76 struct drm_framebuffer *fb,
77 struct drm_display_mode *mode,
78 struct exynos_drm_crtc_pos *pos)
80 struct exynos_drm_gem_buf *buffer;
81 unsigned int actual_w;
82 unsigned int actual_h;
84 buffer = exynos_drm_fb_get_buf(fb);
86 DRM_LOG_KMS("buffer is null.\n");
90 overlay->dma_addr = buffer->dma_addr;
91 overlay->vaddr = buffer->kvaddr;
93 DRM_DEBUG_KMS("vaddr = 0x%lx, dma_addr = 0x%lx\n",
94 (unsigned long)overlay->vaddr,
95 (unsigned long)overlay->dma_addr);
97 actual_w = min((mode->hdisplay - pos->crtc_x), pos->crtc_w);
98 actual_h = min((mode->vdisplay - pos->crtc_y), pos->crtc_h);
100 /* set drm framebuffer data. */
101 overlay->fb_x = pos->fb_x;
102 overlay->fb_y = pos->fb_y;
103 overlay->fb_width = fb->width;
104 overlay->fb_height = fb->height;
105 overlay->bpp = fb->bits_per_pixel;
106 overlay->pitch = fb->pitches[0];
108 /* set overlay range to be displayed. */
109 overlay->crtc_x = pos->crtc_x;
110 overlay->crtc_y = pos->crtc_y;
111 overlay->crtc_width = actual_w;
112 overlay->crtc_height = actual_h;
114 /* set drm mode data. */
115 overlay->mode_width = mode->hdisplay;
116 overlay->mode_height = mode->vdisplay;
117 overlay->refresh = mode->vrefresh;
118 overlay->scan_flag = mode->flags;
120 DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
121 overlay->crtc_x, overlay->crtc_y,
122 overlay->crtc_width, overlay->crtc_height);
127 static int exynos_drm_crtc_update(struct drm_crtc *crtc)
129 struct exynos_drm_crtc *exynos_crtc;
130 struct exynos_drm_overlay *overlay;
131 struct exynos_drm_crtc_pos pos;
132 struct drm_display_mode *mode = &crtc->mode;
133 struct drm_framebuffer *fb = crtc->fb;
138 exynos_crtc = to_exynos_crtc(crtc);
139 overlay = &exynos_crtc->overlay;
141 memset(&pos, 0, sizeof(struct exynos_drm_crtc_pos));
143 /* it means the offset of framebuffer to be displayed. */
147 /* OSD position to be displayed. */
150 pos.crtc_w = fb->width - crtc->x;
151 pos.crtc_h = fb->height - crtc->y;
153 return exynos_drm_overlay_update(overlay, crtc->fb, mode, &pos);
156 static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
158 struct drm_device *dev = crtc->dev;
159 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
161 DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode);
163 if (exynos_crtc->dpms == mode) {
164 DRM_DEBUG_KMS("desired dpms mode is same as previous one.\n");
168 mutex_lock(&dev->struct_mutex);
171 case DRM_MODE_DPMS_ON:
172 exynos_drm_fn_encoder(crtc, &mode,
173 exynos_drm_encoder_crtc_dpms);
174 exynos_crtc->dpms = mode;
176 case DRM_MODE_DPMS_STANDBY:
177 case DRM_MODE_DPMS_SUSPEND:
178 case DRM_MODE_DPMS_OFF:
179 exynos_drm_fn_encoder(crtc, &mode,
180 exynos_drm_encoder_crtc_dpms);
181 exynos_crtc->dpms = mode;
184 DRM_ERROR("unspecified mode %d\n", mode);
188 mutex_unlock(&dev->struct_mutex);
191 static void exynos_drm_crtc_prepare(struct drm_crtc *crtc)
193 DRM_DEBUG_KMS("%s\n", __FILE__);
195 /* drm framework doesn't check NULL. */
198 static void exynos_drm_crtc_commit(struct drm_crtc *crtc)
200 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
202 DRM_DEBUG_KMS("%s\n", __FILE__);
205 * when set_crtc is requested from user or at booting time,
206 * crtc->commit would be called without dpms call so if dpms is
207 * no power on then crtc->dpms should be called
208 * with DRM_MODE_DPMS_ON for the hardware power to be on.
210 if (exynos_crtc->dpms != DRM_MODE_DPMS_ON) {
211 int mode = DRM_MODE_DPMS_ON;
214 * enable hardware(power on) to all encoders hdmi connected
217 exynos_drm_crtc_dpms(crtc, mode);
219 * enable dma to all encoders connected to current crtc and
222 exynos_drm_fn_encoder(crtc, &mode,
223 exynos_drm_encoder_dpms_from_crtc);
226 exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
227 exynos_drm_encoder_crtc_commit);
231 exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
232 struct drm_display_mode *mode,
233 struct drm_display_mode *adjusted_mode)
235 DRM_DEBUG_KMS("%s\n", __FILE__);
237 /* drm framework doesn't check NULL */
242 exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
243 struct drm_display_mode *adjusted_mode, int x, int y,
244 struct drm_framebuffer *old_fb)
246 DRM_DEBUG_KMS("%s\n", __FILE__);
248 mode = adjusted_mode;
250 return exynos_drm_crtc_update(crtc);
253 static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
254 struct drm_framebuffer *old_fb)
258 DRM_DEBUG_KMS("%s\n", __FILE__);
260 ret = exynos_drm_crtc_update(crtc);
264 exynos_drm_crtc_apply(crtc);
269 static void exynos_drm_crtc_load_lut(struct drm_crtc *crtc)
271 DRM_DEBUG_KMS("%s\n", __FILE__);
272 /* drm framework doesn't check NULL */
275 static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
276 .dpms = exynos_drm_crtc_dpms,
277 .prepare = exynos_drm_crtc_prepare,
278 .commit = exynos_drm_crtc_commit,
279 .mode_fixup = exynos_drm_crtc_mode_fixup,
280 .mode_set = exynos_drm_crtc_mode_set,
281 .mode_set_base = exynos_drm_crtc_mode_set_base,
282 .load_lut = exynos_drm_crtc_load_lut,
285 static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
286 struct drm_framebuffer *fb,
287 struct drm_pending_vblank_event *event)
289 struct drm_device *dev = crtc->dev;
290 struct exynos_drm_private *dev_priv = dev->dev_private;
291 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
292 struct drm_framebuffer *old_fb = crtc->fb;
295 DRM_DEBUG_KMS("%s\n", __FILE__);
297 mutex_lock(&dev->struct_mutex);
301 * the pipe from user always is 0 so we can set pipe number
302 * of current owner to event.
304 event->pipe = exynos_crtc->pipe;
306 list_add_tail(&event->base.link,
307 &dev_priv->pageflip_event_list);
309 ret = drm_vblank_get(dev, exynos_crtc->pipe);
311 DRM_DEBUG("failed to acquire vblank counter\n");
312 list_del(&event->base.link);
318 ret = exynos_drm_crtc_update(crtc);
321 drm_vblank_put(dev, exynos_crtc->pipe);
322 list_del(&event->base.link);
328 * the values related to a buffer of the drm framebuffer
329 * to be applied should be set at here. because these values
330 * first, are set to shadow registers and then to
331 * real registers at vsync front porch period.
333 exynos_drm_crtc_apply(crtc);
336 mutex_unlock(&dev->struct_mutex);
340 static void exynos_drm_crtc_destroy(struct drm_crtc *crtc)
342 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
343 struct exynos_drm_private *private = crtc->dev->dev_private;
345 DRM_DEBUG_KMS("%s\n", __FILE__);
347 private->crtc[exynos_crtc->pipe] = NULL;
349 drm_crtc_cleanup(crtc);
353 static struct drm_crtc_funcs exynos_crtc_funcs = {
354 .set_config = drm_crtc_helper_set_config,
355 .page_flip = exynos_drm_crtc_page_flip,
356 .destroy = exynos_drm_crtc_destroy,
359 struct exynos_drm_overlay *get_exynos_drm_overlay(struct drm_device *dev,
360 struct drm_crtc *crtc)
362 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
364 return &exynos_crtc->overlay;
367 int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr)
369 struct exynos_drm_crtc *exynos_crtc;
370 struct exynos_drm_private *private = dev->dev_private;
371 struct drm_crtc *crtc;
373 DRM_DEBUG_KMS("%s\n", __FILE__);
375 exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL);
377 DRM_ERROR("failed to allocate exynos crtc\n");
381 exynos_crtc->pipe = nr;
382 exynos_crtc->dpms = DRM_MODE_DPMS_OFF;
383 crtc = &exynos_crtc->drm_crtc;
385 private->crtc[nr] = crtc;
387 drm_crtc_init(dev, crtc, &exynos_crtc_funcs);
388 drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);
393 int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int crtc)
395 struct exynos_drm_private *private = dev->dev_private;
396 struct exynos_drm_crtc *exynos_crtc =
397 to_exynos_crtc(private->crtc[crtc]);
399 DRM_DEBUG_KMS("%s\n", __FILE__);
401 if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
404 exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
405 exynos_drm_enable_vblank);
410 void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc)
412 struct exynos_drm_private *private = dev->dev_private;
413 struct exynos_drm_crtc *exynos_crtc =
414 to_exynos_crtc(private->crtc[crtc]);
416 DRM_DEBUG_KMS("%s\n", __FILE__);
418 if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
421 exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
422 exynos_drm_disable_vblank);
425 MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
426 MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
427 MODULE_AUTHOR("Seung-Woo Kim <sw0312.kim@samsung.com>");
428 MODULE_DESCRIPTION("Samsung SoC DRM CRTC Driver");
429 MODULE_LICENSE("GPL");