drivers/gpu/drm/ast/ast_mode.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  * Parts based on xf86-video-ast
   4  * Copyright (c) 2005 ASPEED Technology Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  18  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  19  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  *
  26  */
  27 /*
  28  * Authors: Dave Airlie <airlied@redhat.com>
  29  */
  30
  31 #include <linux/export.h>
  32 #include <linux/pci.h>
  33
  34 #include <drm/drm_atomic.h>
  35 #include <drm/drm_atomic_helper.h>
  36 #include <drm/drm_atomic_state_helper.h>
  37 #include <drm/drm_crtc.h>
  38 #include <drm/drm_crtc_helper.h>
  39 #include <drm/drm_damage_helper.h>
  40 #include <drm/drm_edid.h>
  41 #include <drm/drm_format_helper.h>
  42 #include <drm/drm_fourcc.h>
  43 #include <drm/drm_gem_atomic_helper.h>
  44 #include <drm/drm_gem_framebuffer_helper.h>
  45 #include <drm/drm_gem_shmem_helper.h>
  46 #include <drm/drm_managed.h>
  47 #include <drm/drm_probe_helper.h>
  48 #include <drm/drm_simple_kms_helper.h>
  49
  50 #include "ast_drv.h"
  51 #include "ast_tables.h"
  52
  53 #define AST_LUT_SIZE 256
  54
  55 static inline void ast_load_palette_index(struct ast_private *ast,
  56                                      u8 index, u8 red, u8 green,
  57                                      u8 blue)
  58 {
  59         ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);
  60         ast_io_read8(ast, AST_IO_SEQ_PORT);
  61         ast_io_write8(ast, AST_IO_DAC_DATA, red);
  62         ast_io_read8(ast, AST_IO_SEQ_PORT);
  63         ast_io_write8(ast, AST_IO_DAC_DATA, green);
  64         ast_io_read8(ast, AST_IO_SEQ_PORT);
  65         ast_io_write8(ast, AST_IO_DAC_DATA, blue);
  66         ast_io_read8(ast, AST_IO_SEQ_PORT);
  67 }
  68
  69 static void ast_crtc_set_gamma_linear(struct ast_private *ast,
  70                                       const struct drm_format_info *format)
  71 {
  72         int i;
  73
  74         switch (format->format) {
  75         case DRM_FORMAT_C8: /* In this case, gamma table is used as color palette */
  76         case DRM_FORMAT_RGB565:
  77         case DRM_FORMAT_XRGB8888:
  78                 for (i = 0; i < AST_LUT_SIZE; i++)
  79                         ast_load_palette_index(ast, i, i, i, i);
  80                 break;
  81         default:
  82                 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n",
  83                               &format->format);
  84                 break;
  85         }
  86 }
  87
  88 static void ast_crtc_set_gamma(struct ast_private *ast,
  89                                const struct drm_format_info *format,
  90                                struct drm_color_lut *lut)
  91 {
  92         int i;
  93
  94         switch (format->format) {
  95         case DRM_FORMAT_C8: /* In this case, gamma table is used as color palette */
  96         case DRM_FORMAT_RGB565:
  97         case DRM_FORMAT_XRGB8888:
  98                 for (i = 0; i < AST_LUT_SIZE; i++)
  99                         ast_load_palette_index(ast, i,
 100                                                lut[i].red >> 8,
 101                                                lut[i].green >> 8,
 102                                                lut[i].blue >> 8);
 103                 break;
 104         default:
 105                 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n",
 106                               &format->format);
 107                 break;
 108         }
 109 }
 110
 111 static bool ast_get_vbios_mode_info(const struct drm_format_info *format,
 112                                     const struct drm_display_mode *mode,
 113                                     struct drm_display_mode *adjusted_mode,
 114                                     struct ast_vbios_mode_info *vbios_mode)
 115 {
 116         u32 refresh_rate_index = 0, refresh_rate;
 117         const struct ast_vbios_enhtable *best = NULL;
 118         u32 hborder, vborder;
 119         bool check_sync;
 120
 121         switch (format->cpp[0] * 8) {
 122         case 8:
 123                 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
 124                 break;
 125         case 16:
 126                 vbios_mode->std_table = &vbios_stdtable[HiCModeIndex];
 127                 break;
 128         case 24:
 129         case 32:
 130                 vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex];
 131                 break;
 132         default:
 133                 return false;
 134         }
 135
 136         switch (mode->crtc_hdisplay) {
 137         case 640:
 138                 vbios_mode->enh_table = &res_640x480[refresh_rate_index];
 139                 break;
 140         case 800:
 141                 vbios_mode->enh_table = &res_800x600[refresh_rate_index];
 142                 break;
 143         case 1024:
 144                 vbios_mode->enh_table = &res_1024x768[refresh_rate_index];
 145                 break;
 146         case 1152:
 147                 vbios_mode->enh_table = &res_1152x864[refresh_rate_index];
 148                 break;
 149         case 1280:
 150                 if (mode->crtc_vdisplay == 800)
 151                         vbios_mode->enh_table = &res_1280x800[refresh_rate_index];
 152                 else
 153                         vbios_mode->enh_table = &res_1280x1024[refresh_rate_index];
 154                 break;
 155         case 1360:
 156                 vbios_mode->enh_table = &res_1360x768[refresh_rate_index];
 157                 break;
 158         case 1440:
 159                 vbios_mode->enh_table = &res_1440x900[refresh_rate_index];
 160                 break;
 161         case 1600:
 162                 if (mode->crtc_vdisplay == 900)
 163                         vbios_mode->enh_table = &res_1600x900[refresh_rate_index];
 164                 else
 165                         vbios_mode->enh_table = &res_1600x1200[refresh_rate_index];
 166                 break;
 167         case 1680:
 168                 vbios_mode->enh_table = &res_1680x1050[refresh_rate_index];
 169                 break;
 170         case 1920:
 171                 if (mode->crtc_vdisplay == 1080)
 172                         vbios_mode->enh_table = &res_1920x1080[refresh_rate_index];
 173                 else
 174                         vbios_mode->enh_table = &res_1920x1200[refresh_rate_index];
 175                 break;
 176         default:
 177                 return false;
 178         }
 179
 180         refresh_rate = drm_mode_vrefresh(mode);
 181         check_sync = vbios_mode->enh_table->flags & WideScreenMode;
 182
 183         while (1) {
 184                 const struct ast_vbios_enhtable *loop = vbios_mode->enh_table;
 185
 186                 while (loop->refresh_rate != 0xff) {
 187                         if ((check_sync) &&
 188                             (((mode->flags & DRM_MODE_FLAG_NVSYNC)  &&
 189                               (loop->flags & PVSync))  ||
 190                              ((mode->flags & DRM_MODE_FLAG_PVSYNC)  &&
 191                               (loop->flags & NVSync))  ||
 192                              ((mode->flags & DRM_MODE_FLAG_NHSYNC)  &&
 193                               (loop->flags & PHSync))  ||
 194                              ((mode->flags & DRM_MODE_FLAG_PHSYNC)  &&
 195                               (loop->flags & NHSync)))) {
 196                                 loop++;
 197                                 continue;
 198                         }
 199                         if (loop->refresh_rate <= refresh_rate
 200                             && (!best || loop->refresh_rate > best->refresh_rate))
 201                                 best = loop;
 202                         loop++;
 203                 }
 204                 if (best || !check_sync)
 205                         break;
 206                 check_sync = 0;
 207         }
 208
 209         if (best)
 210                 vbios_mode->enh_table = best;
 211
 212         hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
 213         vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;
 214
 215         adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht;
 216         adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder;
 217         adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder;
 218         adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
 219                 vbios_mode->enh_table->hfp;
 220         adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder +
 221                                          vbios_mode->enh_table->hfp +
 222                                          vbios_mode->enh_table->hsync);
 223
 224         adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt;
 225         adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder;
 226         adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder;
 227         adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder +
 228                 vbios_mode->enh_table->vfp;
 229         adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder +
 230                                          vbios_mode->enh_table->vfp +
 231                                          vbios_mode->enh_table->vsync);
 232
 233         return true;
 234 }
 235
 236 static void ast_set_vbios_color_reg(struct ast_private *ast,
 237                                     const struct drm_format_info *format,
 238                                     const struct ast_vbios_mode_info *vbios_mode)
 239 {
 240         u32 color_index;
 241
 242         switch (format->cpp[0]) {
 243         case 1:
 244                 color_index = VGAModeIndex - 1;
 245                 break;
 246         case 2:
 247                 color_index = HiCModeIndex;
 248                 break;
 249         case 3:
 250         case 4:
 251                 color_index = TrueCModeIndex;
 252                 break;
 253         default:
 254                 return;
 255         }
 256
 257         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0x0f) << 4));
 258
 259         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
 260
 261         if (vbios_mode->enh_table->flags & NewModeInfo) {
 262                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
 263                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, format->cpp[0] * 8);
 264         }
 265 }
 266
 267 static void ast_set_vbios_mode_reg(struct ast_private *ast,
 268                                    const struct drm_display_mode *adjusted_mode,
 269                                    const struct ast_vbios_mode_info *vbios_mode)
 270 {
 271         u32 refresh_rate_index, mode_id;
 272
 273         refresh_rate_index = vbios_mode->enh_table->refresh_rate_index;
 274         mode_id = vbios_mode->enh_table->mode_id;
 275
 276         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);
 277         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);
 278
 279         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
 280
 281         if (vbios_mode->enh_table->flags & NewModeInfo) {
 282                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
 283                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);
 284                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);
 285                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);
 286                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);
 287                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);
 288         }
 289 }
 290
 291 static void ast_set_std_reg(struct ast_private *ast,
 292                             struct drm_display_mode *mode,
 293                             struct ast_vbios_mode_info *vbios_mode)
 294 {
 295         const struct ast_vbios_stdtable *stdtable;
 296         u32 i;
 297         u8 jreg;
 298
 299         stdtable = vbios_mode->std_table;
 300
 301         jreg = stdtable->misc;
 302         ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
 303
 304         /* Set SEQ; except Screen Disable field */
 305         ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);
 306         ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x01, 0xdf, stdtable->seq[0]);
 307         for (i = 1; i < 4; i++) {
 308                 jreg = stdtable->seq[i];
 309                 ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1), jreg);
 310         }
 311
 312         /* Set CRTC; except base address and offset */
 313         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
 314         for (i = 0; i < 12; i++)
 315                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
 316         for (i = 14; i < 19; i++)
 317                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
 318         for (i = 20; i < 25; i++)
 319                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
 320
 321         /* set AR */
 322         jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
 323         for (i = 0; i < 20; i++) {
 324                 jreg = stdtable->ar[i];
 325                 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);
 326                 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);
 327         }
 328         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);
 329         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);
 330
 331         jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
 332         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);
 333
 334         /* Set GR */
 335         for (i = 0; i < 9; i++)
 336                 ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);
 337 }
 338
 339 static void ast_set_crtc_reg(struct ast_private *ast,
 340                              struct drm_display_mode *mode,
 341                              struct ast_vbios_mode_info *vbios_mode)
 342 {
 343         u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
 344         u16 temp, precache = 0;
 345
 346         if ((ast->chip == AST2500 || ast->chip == AST2600) &&
 347             (vbios_mode->enh_table->flags & AST2500PreCatchCRT))
 348                 precache = 40;
 349
 350         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
 351
 352         temp = (mode->crtc_htotal >> 3) - 5;
 353         if (temp & 0x100)
 354                 jregAC |= 0x01; /* HT D[8] */
 355         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);
 356
 357         temp = (mode->crtc_hdisplay >> 3) - 1;
 358         if (temp & 0x100)
 359                 jregAC |= 0x04; /* HDE D[8] */
 360         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);
 361
 362         temp = (mode->crtc_hblank_start >> 3) - 1;
 363         if (temp & 0x100)
 364                 jregAC |= 0x10; /* HBS D[8] */
 365         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);
 366
 367         temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
 368         if (temp & 0x20)
 369                 jreg05 |= 0x80;  /* HBE D[5] */
 370         if (temp & 0x40)
 371                 jregAD |= 0x01;  /* HBE D[5] */
 372         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f));
 373
 374         temp = ((mode->crtc_hsync_start-precache) >> 3) - 1;
 375         if (temp & 0x100)
 376                 jregAC |= 0x40; /* HRS D[5] */
 377         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);
 378
 379         temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f;
 380         if (temp & 0x20)
 381                 jregAD |= 0x04; /* HRE D[5] */
 382         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));
 383
 384         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);
 385         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);
 386
 387         // Workaround for HSync Time non octave pixels (1920x1080@60Hz HSync 44 pixels);
 388         if ((ast->chip == AST2600) && (mode->crtc_vdisplay == 1080))
 389                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xFC, 0xFD, 0x02);
 390         else
 391                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xFC, 0xFD, 0x00);
 392
 393         /* vert timings */
 394         temp = (mode->crtc_vtotal) - 2;
 395         if (temp & 0x100)
 396                 jreg07 |= 0x01;
 397         if (temp & 0x200)
 398                 jreg07 |= 0x20;
 399         if (temp & 0x400)
 400                 jregAE |= 0x01;
 401         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);
 402
 403         temp = (mode->crtc_vsync_start) - 1;
 404         if (temp & 0x100)
 405                 jreg07 |= 0x04;
 406         if (temp & 0x200)
 407                 jreg07 |= 0x80;
 408         if (temp & 0x400)
 409                 jregAE |= 0x08;
 410         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);
 411
 412         temp = (mode->crtc_vsync_end - 1) & 0x3f;
 413         if (temp & 0x10)
 414                 jregAE |= 0x20;
 415         if (temp & 0x20)
 416                 jregAE |= 0x40;
 417         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf);
 418
 419         temp = mode->crtc_vdisplay - 1;
 420         if (temp & 0x100)
 421                 jreg07 |= 0x02;
 422         if (temp & 0x200)
 423                 jreg07 |= 0x40;
 424         if (temp & 0x400)
 425                 jregAE |= 0x02;
 426         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);
 427
 428         temp = mode->crtc_vblank_start - 1;
 429         if (temp & 0x100)
 430                 jreg07 |= 0x08;
 431         if (temp & 0x200)
 432                 jreg09 |= 0x20;
 433         if (temp & 0x400)
 434                 jregAE |= 0x04;
 435         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);
 436
 437         temp = mode->crtc_vblank_end - 1;
 438         if (temp & 0x100)
 439                 jregAE |= 0x10;
 440         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);
 441
 442         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);
 443         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);
 444         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));
 445
 446         if (precache)
 447                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80);
 448         else
 449                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00);
 450
 451         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);
 452 }
 453
 454 static void ast_set_offset_reg(struct ast_private *ast,
 455                                struct drm_framebuffer *fb)
 456 {
 457         u16 offset;
 458
 459         offset = fb->pitches[0] >> 3;
 460         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));
 461         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);
 462 }
 463
 464 static void ast_set_dclk_reg(struct ast_private *ast,
 465                              struct drm_display_mode *mode,
 466                              struct ast_vbios_mode_info *vbios_mode)
 467 {
 468         const struct ast_vbios_dclk_info *clk_info;
 469
 470         if ((ast->chip == AST2500) || (ast->chip == AST2600))
 471                 clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index];
 472         else
 473                 clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
 474
 475         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);
 476         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);
 477         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,
 478                                (clk_info->param3 & 0xc0) |
 479                                ((clk_info->param3 & 0x3) << 4));
 480 }
 481
 482 static void ast_set_color_reg(struct ast_private *ast,
 483                               const struct drm_format_info *format)
 484 {
 485         u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
 486
 487         switch (format->cpp[0] * 8) {
 488         case 8:
 489                 jregA0 = 0x70;
 490                 jregA3 = 0x01;
 491                 jregA8 = 0x00;
 492                 break;
 493         case 15:
 494         case 16:
 495                 jregA0 = 0x70;
 496                 jregA3 = 0x04;
 497                 jregA8 = 0x02;
 498                 break;
 499         case 32:
 500                 jregA0 = 0x70;
 501                 jregA3 = 0x08;
 502                 jregA8 = 0x02;
 503                 break;
 504         }
 505
 506         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);
 507         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);
 508         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);
 509 }
 510
 511 static void ast_set_crtthd_reg(struct ast_private *ast)
 512 {
 513         /* Set Threshold */
 514         if (ast->chip == AST2600) {
 515                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0xe0);
 516                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0xa0);
 517         } else if (ast->chip == AST2300 || ast->chip == AST2400 ||
 518             ast->chip == AST2500) {
 519                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);
 520                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);
 521         } else if (ast->chip == AST2100 ||
 522                    ast->chip == AST1100 ||
 523                    ast->chip == AST2200 ||
 524                    ast->chip == AST2150) {
 525                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);
 526                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);
 527         } else {
 528                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);
 529                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);
 530         }
 531 }
 532
 533 static void ast_set_sync_reg(struct ast_private *ast,
 534                              struct drm_display_mode *mode,
 535                              struct ast_vbios_mode_info *vbios_mode)
 536 {
 537         u8 jreg;
 538
 539         jreg  = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
 540         jreg &= ~0xC0;
 541         if (vbios_mode->enh_table->flags & NVSync)
 542                 jreg |= 0x80;
 543         if (vbios_mode->enh_table->flags & NHSync)
 544                 jreg |= 0x40;
 545         ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
 546 }
 547
 548 static void ast_set_start_address_crt1(struct ast_private *ast,
 549                                        unsigned int offset)
 550 {
 551         u32 addr;
 552
 553         addr = offset >> 2;
 554         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));
 555         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));
 556         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));
 557
 558 }
 559
 560 static void ast_wait_for_vretrace(struct ast_private *ast)
 561 {
 562         unsigned long timeout = jiffies + HZ;
 563         u8 vgair1;
 564
 565         do {
 566                 vgair1 = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
 567         } while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout));
 568 }
 569
 570 /*
 571  * Planes
 572  */
 573
 574 static int ast_plane_init(struct drm_device *dev, struct ast_plane *ast_plane,
 575                           void __iomem *vaddr, u64 offset, unsigned long size,
 576                           uint32_t possible_crtcs,
 577                           const struct drm_plane_funcs *funcs,
 578                           const uint32_t *formats, unsigned int format_count,
 579                           const uint64_t *format_modifiers,
 580                           enum drm_plane_type type)
 581 {
 582         struct drm_plane *plane = &ast_plane->base;
 583
 584         ast_plane->vaddr = vaddr;
 585         ast_plane->offset = offset;
 586         ast_plane->size = size;
 587
 588         return drm_universal_plane_init(dev, plane, possible_crtcs, funcs,
 589                                         formats, format_count, format_modifiers,
 590                                         type, NULL);
 591 }
 592
 593 /*
 594  * Primary plane
 595  */
 596
 597 static const uint32_t ast_primary_plane_formats[] = {
 598         DRM_FORMAT_XRGB8888,
 599         DRM_FORMAT_RGB565,
 600         DRM_FORMAT_C8,
 601 };
 602
 603 static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane,
 604                                                  struct drm_atomic_state *state)
 605 {
 606         struct drm_device *dev = plane->dev;
 607         struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);
 608         struct drm_crtc_state *new_crtc_state = NULL;
 609         struct ast_crtc_state *new_ast_crtc_state;
 610         int ret;
 611
 612         if (new_plane_state->crtc)
 613                 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc);
 614
 615         ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state,
 616                                                   DRM_PLANE_NO_SCALING,
 617                                                   DRM_PLANE_NO_SCALING,
 618                                                   false, true);
 619         if (ret) {
 620                 return ret;
 621         } else if (!new_plane_state->visible) {
 622                 if (drm_WARN_ON(dev, new_plane_state->crtc)) /* cannot legally happen */
 623                         return -EINVAL;
 624                 else
 625                         return 0;
 626         }
 627
 628         new_ast_crtc_state = to_ast_crtc_state(new_crtc_state);
 629
 630         new_ast_crtc_state->format = new_plane_state->fb->format;
 631
 632         return 0;
 633 }
 634
 635 static void ast_handle_damage(struct ast_plane *ast_plane, struct iosys_map *src,
 636                               struct drm_framebuffer *fb,
 637                               const struct drm_rect *clip)
 638 {
 639         struct iosys_map dst = IOSYS_MAP_INIT_VADDR_IOMEM(ast_plane->vaddr);
 640
 641         iosys_map_incr(&dst, drm_fb_clip_offset(fb->pitches[0], fb->format, clip));
 642         drm_fb_memcpy(&dst, fb->pitches, src, fb, clip);
 643 }
 644
 645 static void ast_primary_plane_helper_atomic_update(struct drm_plane *plane,
 646                                                    struct drm_atomic_state *state)
 647 {
 648         struct drm_device *dev = plane->dev;
 649         struct ast_private *ast = to_ast_private(dev);
 650         struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
 651         struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
 652         struct drm_framebuffer *fb = plane_state->fb;
 653         struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
 654         struct drm_framebuffer *old_fb = old_plane_state->fb;
 655         struct ast_plane *ast_plane = to_ast_plane(plane);
 656         struct drm_rect damage;
 657         struct drm_atomic_helper_damage_iter iter;
 658
 659         if (!old_fb || (fb->format != old_fb->format)) {
 660                 struct drm_crtc *crtc = plane_state->crtc;
 661                 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
 662                 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
 663                 struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info;
 664
 665                 ast_set_color_reg(ast, fb->format);
 666                 ast_set_vbios_color_reg(ast, fb->format, vbios_mode_info);
 667         }
 668
 669         drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state);
 670         drm_atomic_for_each_plane_damage(&iter, &damage) {
 671                 ast_handle_damage(ast_plane, shadow_plane_state->data, fb, &damage);
 672         }
 673
 674         /*
 675          * Some BMCs stop scanning out the video signal after the driver
 676          * reprogrammed the offset or scanout address. This stalls display
 677          * output for several seconds and makes the display unusable.
 678          * Therefore only update the offset if it changes and reprogram the
 679          * address after enabling the plane.
 680          */
 681         if (!old_fb || old_fb->pitches[0] != fb->pitches[0])
 682                 ast_set_offset_reg(ast, fb);
 683         if (!old_fb) {
 684                 ast_set_start_address_crt1(ast, (u32)ast_plane->offset);
 685                 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x00);
 686         }
 687 }
 688
 689 static void ast_primary_plane_helper_atomic_disable(struct drm_plane *plane,
 690                                                     struct drm_atomic_state *state)
 691 {
 692         struct ast_private *ast = to_ast_private(plane->dev);
 693
 694         ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20);
 695 }
 696
 697 static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = {
 698         DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
 699         .atomic_check = ast_primary_plane_helper_atomic_check,
 700         .atomic_update = ast_primary_plane_helper_atomic_update,
 701         .atomic_disable = ast_primary_plane_helper_atomic_disable,
 702 };
 703
 704 static const struct drm_plane_funcs ast_primary_plane_funcs = {
 705         .update_plane = drm_atomic_helper_update_plane,
 706         .disable_plane = drm_atomic_helper_disable_plane,
 707         .destroy = drm_plane_cleanup,
 708         DRM_GEM_SHADOW_PLANE_FUNCS,
 709 };
 710
 711 static int ast_primary_plane_init(struct ast_private *ast)
 712 {
 713         struct drm_device *dev = &ast->base;
 714         struct ast_plane *ast_primary_plane = &ast->primary_plane;
 715         struct drm_plane *primary_plane = &ast_primary_plane->base;
 716         void __iomem *vaddr = ast->vram;
 717         u64 offset = ast->vram_base;
 718         unsigned long cursor_size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE);
 719         unsigned long size = ast->vram_fb_available - cursor_size;
 720         int ret;
 721
 722         ret = ast_plane_init(dev, ast_primary_plane, vaddr, offset, size,
 723                              0x01, &ast_primary_plane_funcs,
 724                              ast_primary_plane_formats, ARRAY_SIZE(ast_primary_plane_formats),
 725                              NULL, DRM_PLANE_TYPE_PRIMARY);
 726         if (ret) {
 727                 drm_err(dev, "ast_plane_init() failed: %d\n", ret);
 728                 return ret;
 729         }
 730         drm_plane_helper_add(primary_plane, &ast_primary_plane_helper_funcs);
 731         drm_plane_enable_fb_damage_clips(primary_plane);
 732
 733         return 0;
 734 }
 735
 736 /*
 737  * Cursor plane
 738  */
 739
 740 static void ast_update_cursor_image(u8 __iomem *dst, const u8 *src, int width, int height)
 741 {
 742         union {
 743                 u32 ul;
 744                 u8 b[4];
 745         } srcdata32[2], data32;
 746         union {
 747                 u16 us;
 748                 u8 b[2];
 749         } data16;
 750         u32 csum = 0;
 751         s32 alpha_dst_delta, last_alpha_dst_delta;
 752         u8 __iomem *dstxor;
 753         const u8 *srcxor;
 754         int i, j;
 755         u32 per_pixel_copy, two_pixel_copy;
 756
 757         alpha_dst_delta = AST_MAX_HWC_WIDTH << 1;
 758         last_alpha_dst_delta = alpha_dst_delta - (width << 1);
 759
 760         srcxor = src;
 761         dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta;
 762         per_pixel_copy = width & 1;
 763         two_pixel_copy = width >> 1;
 764
 765         for (j = 0; j < height; j++) {
 766                 for (i = 0; i < two_pixel_copy; i++) {
 767                         srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
 768                         srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0;
 769                         data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
 770                         data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
 771                         data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4);
 772                         data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4);
 773
 774                         writel(data32.ul, dstxor);
 775                         csum += data32.ul;
 776
 777                         dstxor += 4;
 778                         srcxor += 8;
 779
 780                 }
 781
 782                 for (i = 0; i < per_pixel_copy; i++) {
 783                         srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
 784                         data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
 785                         data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
 786                         writew(data16.us, dstxor);
 787                         csum += (u32)data16.us;
 788
 789                         dstxor += 2;
 790                         srcxor += 4;
 791                 }
 792                 dstxor += last_alpha_dst_delta;
 793         }
 794
 795         /* write checksum + signature */
 796         dst += AST_HWC_SIZE;
 797         writel(csum, dst);
 798         writel(width, dst + AST_HWC_SIGNATURE_SizeX);
 799         writel(height, dst + AST_HWC_SIGNATURE_SizeY);
 800         writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);
 801         writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);
 802 }
 803
 804 static void ast_set_cursor_base(struct ast_private *ast, u64 address)
 805 {
 806         u8 addr0 = (address >> 3) & 0xff;
 807         u8 addr1 = (address >> 11) & 0xff;
 808         u8 addr2 = (address >> 19) & 0xff;
 809
 810         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, addr0);
 811         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, addr1);
 812         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, addr2);
 813 }
 814
 815 static void ast_set_cursor_location(struct ast_private *ast, u16 x, u16 y,
 816                                     u8 x_offset, u8 y_offset)
 817 {
 818         u8 x0 = (x & 0x00ff);
 819         u8 x1 = (x & 0x0f00) >> 8;
 820         u8 y0 = (y & 0x00ff);
 821         u8 y1 = (y & 0x0700) >> 8;
 822
 823         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);
 824         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);
 825         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, x0);
 826         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, x1);
 827         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, y0);
 828         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, y1);
 829 }
 830
 831 static void ast_set_cursor_enabled(struct ast_private *ast, bool enabled)
 832 {
 833         static const u8 mask = (u8)~(AST_IO_VGACRCB_HWC_16BPP |
 834                                      AST_IO_VGACRCB_HWC_ENABLED);
 835
 836         u8 vgacrcb = AST_IO_VGACRCB_HWC_16BPP;
 837
 838         if (enabled)
 839                 vgacrcb |= AST_IO_VGACRCB_HWC_ENABLED;
 840
 841         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, mask, vgacrcb);
 842 }
 843
 844 static const uint32_t ast_cursor_plane_formats[] = {
 845         DRM_FORMAT_ARGB8888,
 846 };
 847
 848 static int ast_cursor_plane_helper_atomic_check(struct drm_plane *plane,
 849                                                 struct drm_atomic_state *state)
 850 {
 851         struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);
 852         struct drm_framebuffer *new_fb = new_plane_state->fb;
 853         struct drm_crtc_state *new_crtc_state = NULL;
 854         int ret;
 855
 856         if (new_plane_state->crtc)
 857                 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc);
 858
 859         ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state,
 860                                                   DRM_PLANE_NO_SCALING,
 861                                                   DRM_PLANE_NO_SCALING,
 862                                                   true, true);
 863         if (ret || !new_plane_state->visible)
 864                 return ret;
 865
 866         if (new_fb->width > AST_MAX_HWC_WIDTH || new_fb->height > AST_MAX_HWC_HEIGHT)
 867                 return -EINVAL;
 868
 869         return 0;
 870 }
 871
 872 static void ast_cursor_plane_helper_atomic_update(struct drm_plane *plane,
 873                                                   struct drm_atomic_state *state)
 874 {
 875         struct ast_plane *ast_plane = to_ast_plane(plane);
 876         struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
 877         struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
 878         struct drm_framebuffer *fb = plane_state->fb;
 879         struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
 880         struct ast_private *ast = to_ast_private(plane->dev);
 881         struct iosys_map src_map = shadow_plane_state->data[0];
 882         struct drm_rect damage;
 883         const u8 *src = src_map.vaddr; /* TODO: Use mapping abstraction properly */
 884         u64 dst_off = ast_plane->offset;
 885         u8 __iomem *dst = ast_plane->vaddr; /* TODO: Use mapping abstraction properly */
 886         u8 __iomem *sig = dst + AST_HWC_SIZE; /* TODO: Use mapping abstraction properly */
 887         unsigned int offset_x, offset_y;
 888         u16 x, y;
 889         u8 x_offset, y_offset;
 890
 891         /*
 892          * Do data transfer to hardware buffer and point the scanout
 893          * engine to the offset.
 894          */
 895
 896         if (drm_atomic_helper_damage_merged(old_plane_state, plane_state, &damage)) {
 897                 ast_update_cursor_image(dst, src, fb->width, fb->height);
 898                 ast_set_cursor_base(ast, dst_off);
 899         }
 900
 901         /*
 902          * Update location in HWC signature and registers.
 903          */
 904
 905         writel(plane_state->crtc_x, sig + AST_HWC_SIGNATURE_X);
 906         writel(plane_state->crtc_y, sig + AST_HWC_SIGNATURE_Y);
 907
 908         offset_x = AST_MAX_HWC_WIDTH - fb->width;
 909         offset_y = AST_MAX_HWC_HEIGHT - fb->height;
 910
 911         if (plane_state->crtc_x < 0) {
 912                 x_offset = (-plane_state->crtc_x) + offset_x;
 913                 x = 0;
 914         } else {
 915                 x_offset = offset_x;
 916                 x = plane_state->crtc_x;
 917         }
 918         if (plane_state->crtc_y < 0) {
 919                 y_offset = (-plane_state->crtc_y) + offset_y;
 920                 y = 0;
 921         } else {
 922                 y_offset = offset_y;
 923                 y = plane_state->crtc_y;
 924         }
 925
 926         ast_set_cursor_location(ast, x, y, x_offset, y_offset);
 927
 928         /* Dummy write to enable HWC and make the HW pick-up the changes. */
 929         ast_set_cursor_enabled(ast, true);
 930 }
 931
 932 static void ast_cursor_plane_helper_atomic_disable(struct drm_plane *plane,
 933                                                    struct drm_atomic_state *state)
 934 {
 935         struct ast_private *ast = to_ast_private(plane->dev);
 936
 937         ast_set_cursor_enabled(ast, false);
 938 }
 939
 940 static const struct drm_plane_helper_funcs ast_cursor_plane_helper_funcs = {
 941         DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
 942         .atomic_check = ast_cursor_plane_helper_atomic_check,
 943         .atomic_update = ast_cursor_plane_helper_atomic_update,
 944         .atomic_disable = ast_cursor_plane_helper_atomic_disable,
 945 };
 946
 947 static const struct drm_plane_funcs ast_cursor_plane_funcs = {
 948         .update_plane = drm_atomic_helper_update_plane,
 949         .disable_plane = drm_atomic_helper_disable_plane,
 950         .destroy = drm_plane_cleanup,
 951         DRM_GEM_SHADOW_PLANE_FUNCS,
 952 };
 953
 954 static int ast_cursor_plane_init(struct ast_private *ast)
 955 {
 956         struct drm_device *dev = &ast->base;
 957         struct ast_plane *ast_cursor_plane = &ast->cursor_plane;
 958         struct drm_plane *cursor_plane = &ast_cursor_plane->base;
 959         size_t size;
 960         void __iomem *vaddr;
 961         u64 offset;
 962         int ret;
 963
 964         /*
 965          * Allocate backing storage for cursors. The BOs are permanently
 966          * pinned to the top end of the VRAM.
 967          */
 968
 969         size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE);
 970
 971         if (ast->vram_fb_available < size)
 972                 return -ENOMEM;
 973
 974         vaddr = ast->vram + ast->vram_fb_available - size;
 975         offset = ast->vram_base + ast->vram_fb_available - size;
 976
 977         ret = ast_plane_init(dev, ast_cursor_plane, vaddr, offset, size,
 978                              0x01, &ast_cursor_plane_funcs,
 979                              ast_cursor_plane_formats, ARRAY_SIZE(ast_cursor_plane_formats),
 980                              NULL, DRM_PLANE_TYPE_CURSOR);
 981         if (ret) {
 982                 drm_err(dev, "ast_plane_init() failed: %d\n", ret);
 983                 return ret;
 984         }
 985         drm_plane_helper_add(cursor_plane, &ast_cursor_plane_helper_funcs);
 986         drm_plane_enable_fb_damage_clips(cursor_plane);
 987
 988         ast->vram_fb_available -= size;
 989
 990         return 0;
 991 }
 992
 993 /*
 994  * CRTC
 995  */
 996
 997 static void ast_crtc_dpms(struct drm_crtc *crtc, int mode)
 998 {
 999         struct ast_private *ast = to_ast_private(crtc->dev);
1000         u8 ch = AST_DPMS_VSYNC_OFF | AST_DPMS_HSYNC_OFF;
1001         struct ast_crtc_state *ast_state;
1002         const struct drm_format_info *format;
1003         struct ast_vbios_mode_info *vbios_mode_info;
1004
1005         /* TODO: Maybe control display signal generation with
1006          *       Sync Enable (bit CR17.7).
1007          */
1008         switch (mode) {
1009         case DRM_MODE_DPMS_ON:
1010                 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT,  0x01, 0xdf, 0);
1011                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xfc, 0);
1012                 if (ast->tx_chip_types & AST_TX_DP501_BIT)
1013                         ast_set_dp501_video_output(crtc->dev, 1);
1014
1015                 if (ast->tx_chip_types & AST_TX_ASTDP_BIT) {
1016                         ast_dp_power_on_off(crtc->dev, AST_DP_POWER_ON);
1017                         ast_wait_for_vretrace(ast);
1018                         ast_dp_set_on_off(crtc->dev, 1);
1019                 }
1020
1021                 ast_state = to_ast_crtc_state(crtc->state);
1022                 format = ast_state->format;
1023
1024                 if (format) {
1025                         vbios_mode_info = &ast_state->vbios_mode_info;
1026
1027                         ast_set_color_reg(ast, format);
1028                         ast_set_vbios_color_reg(ast, format, vbios_mode_info);
1029                         if (crtc->state->gamma_lut)
1030                                 ast_crtc_set_gamma(ast, format, crtc->state->gamma_lut->data);
1031                         else
1032                                 ast_crtc_set_gamma_linear(ast, format);
1033                 }
1034                 break;
1035         case DRM_MODE_DPMS_STANDBY:
1036         case DRM_MODE_DPMS_SUSPEND:
1037         case DRM_MODE_DPMS_OFF:
1038                 ch = mode;
1039                 if (ast->tx_chip_types & AST_TX_DP501_BIT)
1040                         ast_set_dp501_video_output(crtc->dev, 0);
1041
1042                 if (ast->tx_chip_types & AST_TX_ASTDP_BIT) {
1043                         ast_dp_set_on_off(crtc->dev, 0);
1044                         ast_dp_power_on_off(crtc->dev, AST_DP_POWER_OFF);
1045                 }
1046
1047                 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT,  0x01, 0xdf, 0x20);
1048                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xfc, ch);
1049                 break;
1050         }
1051 }
1052
1053 static enum drm_mode_status
1054 ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)
1055 {
1056         struct ast_private *ast = to_ast_private(crtc->dev);
1057         enum drm_mode_status status;
1058         uint32_t jtemp;
1059
1060         if (ast->support_wide_screen) {
1061                 if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050))
1062                         return MODE_OK;
1063                 if ((mode->hdisplay == 1280) && (mode->vdisplay == 800))
1064                         return MODE_OK;
1065                 if ((mode->hdisplay == 1440) && (mode->vdisplay == 900))
1066                         return MODE_OK;
1067                 if ((mode->hdisplay == 1360) && (mode->vdisplay == 768))
1068                         return MODE_OK;
1069                 if ((mode->hdisplay == 1600) && (mode->vdisplay == 900))
1070                         return MODE_OK;
1071                 if ((mode->hdisplay == 1152) && (mode->vdisplay == 864))
1072                         return MODE_OK;
1073
1074                 if ((ast->chip == AST2100) || (ast->chip == AST2200) ||
1075                     (ast->chip == AST2300) || (ast->chip == AST2400) ||
1076                     (ast->chip == AST2500) || (ast->chip == AST2600)) {
1077                         if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080))
1078                                 return MODE_OK;
1079
1080                         if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) {
1081                                 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
1082                                 if (jtemp & 0x01)
1083                                         return MODE_NOMODE;
1084                                 else
1085                                         return MODE_OK;
1086                         }
1087                 }
1088         }
1089
1090         status = MODE_NOMODE;
1091
1092         switch (mode->hdisplay) {
1093         case 640:
1094                 if (mode->vdisplay == 480)
1095                         status = MODE_OK;
1096                 break;
1097         case 800:
1098                 if (mode->vdisplay == 600)
1099                         status = MODE_OK;
1100                 break;
1101         case 1024:
1102                 if (mode->vdisplay == 768)
1103                         status = MODE_OK;
1104                 break;
1105         case 1152:
1106                 if (mode->vdisplay == 864)
1107                         status = MODE_OK;
1108                 break;
1109         case 1280:
1110                 if (mode->vdisplay == 1024)
1111                         status = MODE_OK;
1112                 break;
1113         case 1600:
1114                 if (mode->vdisplay == 1200)
1115                         status = MODE_OK;
1116                 break;
1117         default:
1118                 break;
1119         }
1120
1121         return status;
1122 }
1123
1124 static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc,
1125                                         struct drm_atomic_state *state)
1126 {
1127         struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
1128         struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
1129         struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state);
1130         struct drm_device *dev = crtc->dev;
1131         struct ast_crtc_state *ast_state;
1132         const struct drm_format_info *format;
1133         bool succ;
1134         int ret;
1135
1136         if (!crtc_state->enable)
1137                 return 0;
1138
1139         ret = drm_atomic_helper_check_crtc_primary_plane(crtc_state);
1140         if (ret)
1141                 return ret;
1142
1143         ast_state = to_ast_crtc_state(crtc_state);
1144
1145         format = ast_state->format;
1146         if (drm_WARN_ON_ONCE(dev, !format))
1147                 return -EINVAL; /* BUG: We didn't set format in primary check(). */
1148
1149         /*
1150          * The gamma LUT has to be reloaded after changing the primary
1151          * plane's color format.
1152          */
1153         if (old_ast_crtc_state->format != format)
1154                 crtc_state->color_mgmt_changed = true;
1155
1156         if (crtc_state->color_mgmt_changed && crtc_state->gamma_lut) {
1157                 if (crtc_state->gamma_lut->length !=
1158                     AST_LUT_SIZE * sizeof(struct drm_color_lut)) {
1159                         drm_err(dev, "Wrong size for gamma_lut %zu\n",
1160                                 crtc_state->gamma_lut->length);
1161                         return -EINVAL;
1162                 }
1163         }
1164
1165         succ = ast_get_vbios_mode_info(format, &crtc_state->mode,
1166                                        &crtc_state->adjusted_mode,
1167                                        &ast_state->vbios_mode_info);
1168         if (!succ)
1169                 return -EINVAL;
1170
1171         return 0;
1172 }
1173
1174 static void
1175 ast_crtc_helper_atomic_flush(struct drm_crtc *crtc,
1176                              struct drm_atomic_state *state)
1177 {
1178         struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
1179                                                                           crtc);
1180         struct drm_device *dev = crtc->dev;
1181         struct ast_private *ast = to_ast_private(dev);
1182         struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
1183         struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info;
1184
1185         /*
1186          * The gamma LUT has to be reloaded after changing the primary
1187          * plane's color format.
1188          */
1189         if (crtc_state->enable && crtc_state->color_mgmt_changed) {
1190                 if (crtc_state->gamma_lut)
1191                         ast_crtc_set_gamma(ast,
1192                                            ast_crtc_state->format,
1193                                            crtc_state->gamma_lut->data);
1194                 else
1195                         ast_crtc_set_gamma_linear(ast, ast_crtc_state->format);
1196         }
1197
1198         //Set Aspeed Display-Port
1199         if (ast->tx_chip_types & AST_TX_ASTDP_BIT)
1200                 ast_dp_set_mode(crtc, vbios_mode_info);
1201 }
1202
1203 static void ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state)
1204 {
1205         struct drm_device *dev = crtc->dev;
1206         struct ast_private *ast = to_ast_private(dev);
1207         struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
1208         struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
1209         struct ast_vbios_mode_info *vbios_mode_info =
1210                 &ast_crtc_state->vbios_mode_info;
1211         struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
1212
1213         ast_set_vbios_mode_reg(ast, adjusted_mode, vbios_mode_info);
1214         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06);
1215         ast_set_std_reg(ast, adjusted_mode, vbios_mode_info);
1216         ast_set_crtc_reg(ast, adjusted_mode, vbios_mode_info);
1217         ast_set_dclk_reg(ast, adjusted_mode, vbios_mode_info);
1218         ast_set_crtthd_reg(ast);
1219         ast_set_sync_reg(ast, adjusted_mode, vbios_mode_info);
1220
1221         ast_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
1222 }
1223
1224 static void ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state)
1225 {
1226         struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
1227         struct drm_device *dev = crtc->dev;
1228         struct ast_private *ast = to_ast_private(dev);
1229
1230         ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
1231
1232         /*
1233          * HW cursors require the underlying primary plane and CRTC to
1234          * display a valid mode and image. This is not the case during
1235          * full modeset operations. So we temporarily disable any active
1236          * plane, including the HW cursor. Each plane's atomic_update()
1237          * helper will re-enable it if necessary.
1238          *
1239          * We only do this during *full* modesets. It does not affect
1240          * simple pageflips on the planes.
1241          */
1242         drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
1243
1244         /*
1245          * Ensure that no scanout takes place before reprogramming mode
1246          * and format registers.
1247          */
1248         ast_wait_for_vretrace(ast);
1249 }
1250
1251 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
1252         .mode_valid = ast_crtc_helper_mode_valid,
1253         .atomic_check = ast_crtc_helper_atomic_check,
1254         .atomic_flush = ast_crtc_helper_atomic_flush,
1255         .atomic_enable = ast_crtc_helper_atomic_enable,
1256         .atomic_disable = ast_crtc_helper_atomic_disable,
1257 };
1258
1259 static void ast_crtc_reset(struct drm_crtc *crtc)
1260 {
1261         struct ast_crtc_state *ast_state =
1262                 kzalloc(sizeof(*ast_state), GFP_KERNEL);
1263
1264         if (crtc->state)
1265                 crtc->funcs->atomic_destroy_state(crtc, crtc->state);
1266
1267         if (ast_state)
1268                 __drm_atomic_helper_crtc_reset(crtc, &ast_state->base);
1269         else
1270                 __drm_atomic_helper_crtc_reset(crtc, NULL);
1271 }
1272
1273 static struct drm_crtc_state *
1274 ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
1275 {
1276         struct ast_crtc_state *new_ast_state, *ast_state;
1277         struct drm_device *dev = crtc->dev;
1278
1279         if (drm_WARN_ON(dev, !crtc->state))
1280                 return NULL;
1281
1282         new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL);
1283         if (!new_ast_state)
1284                 return NULL;
1285         __drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base);
1286
1287         ast_state = to_ast_crtc_state(crtc->state);
1288
1289         new_ast_state->format = ast_state->format;
1290         memcpy(&new_ast_state->vbios_mode_info, &ast_state->vbios_mode_info,
1291                sizeof(new_ast_state->vbios_mode_info));
1292
1293         return &new_ast_state->base;
1294 }
1295
1296 static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc,
1297                                           struct drm_crtc_state *state)
1298 {
1299         struct ast_crtc_state *ast_state = to_ast_crtc_state(state);
1300
1301         __drm_atomic_helper_crtc_destroy_state(&ast_state->base);
1302         kfree(ast_state);
1303 }
1304
1305 static const struct drm_crtc_funcs ast_crtc_funcs = {
1306         .reset = ast_crtc_reset,
1307         .destroy = drm_crtc_cleanup,
1308         .set_config = drm_atomic_helper_set_config,
1309         .page_flip = drm_atomic_helper_page_flip,
1310         .atomic_duplicate_state = ast_crtc_atomic_duplicate_state,
1311         .atomic_destroy_state = ast_crtc_atomic_destroy_state,
1312 };
1313
1314 static int ast_crtc_init(struct drm_device *dev)
1315 {
1316         struct ast_private *ast = to_ast_private(dev);
1317         struct drm_crtc *crtc = &ast->crtc;
1318         int ret;
1319
1320         ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane.base,
1321                                         &ast->cursor_plane.base, &ast_crtc_funcs,
1322                                         NULL);
1323         if (ret)
1324                 return ret;
1325
1326         drm_mode_crtc_set_gamma_size(crtc, AST_LUT_SIZE);
1327         drm_crtc_enable_color_mgmt(crtc, 0, false, AST_LUT_SIZE);
1328
1329         drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs);
1330
1331         return 0;
1332 }
1333
1334 /*
1335  * VGA Connector
1336  */
1337
1338 static int ast_vga_connector_helper_get_modes(struct drm_connector *connector)
1339 {
1340         struct ast_vga_connector *ast_vga_connector = to_ast_vga_connector(connector);
1341         struct drm_device *dev = connector->dev;
1342         struct ast_private *ast = to_ast_private(dev);
1343         struct edid *edid;
1344         int count;
1345
1346         if (!ast_vga_connector->i2c)
1347                 goto err_drm_connector_update_edid_property;
1348
1349         /*
1350          * Protect access to I/O registers from concurrent modesetting
1351          * by acquiring the I/O-register lock.
1352          */
1353         mutex_lock(&ast->ioregs_lock);
1354
1355         edid = drm_get_edid(connector, &ast_vga_connector->i2c->adapter);
1356         if (!edid)
1357                 goto err_mutex_unlock;
1358
1359         mutex_unlock(&ast->ioregs_lock);
1360
1361         count = drm_add_edid_modes(connector, edid);
1362         kfree(edid);
1363
1364         return count;
1365
1366 err_mutex_unlock:
1367         mutex_unlock(&ast->ioregs_lock);
1368 err_drm_connector_update_edid_property:
1369         drm_connector_update_edid_property(connector, NULL);
1370         return 0;
1371 }
1372
1373 static const struct drm_connector_helper_funcs ast_vga_connector_helper_funcs = {
1374         .get_modes = ast_vga_connector_helper_get_modes,
1375 };
1376
1377 static const struct drm_connector_funcs ast_vga_connector_funcs = {
1378         .reset = drm_atomic_helper_connector_reset,
1379         .fill_modes = drm_helper_probe_single_connector_modes,
1380         .destroy = drm_connector_cleanup,
1381         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
1382         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1383 };
1384
1385 static int ast_vga_connector_init(struct drm_device *dev,
1386                                   struct ast_vga_connector *ast_vga_connector)
1387 {
1388         struct drm_connector *connector = &ast_vga_connector->base;
1389         int ret;
1390
1391         ast_vga_connector->i2c = ast_i2c_create(dev);
1392         if (!ast_vga_connector->i2c)
1393                 drm_err(dev, "failed to add ddc bus for connector\n");
1394
1395         if (ast_vga_connector->i2c)
1396                 ret = drm_connector_init_with_ddc(dev, connector, &ast_vga_connector_funcs,
1397                                                   DRM_MODE_CONNECTOR_VGA,
1398                                                   &ast_vga_connector->i2c->adapter);
1399         else
1400                 ret = drm_connector_init(dev, connector, &ast_vga_connector_funcs,
1401                                          DRM_MODE_CONNECTOR_VGA);
1402         if (ret)
1403                 return ret;
1404
1405         drm_connector_helper_add(connector, &ast_vga_connector_helper_funcs);
1406
1407         connector->interlace_allowed = 0;
1408         connector->doublescan_allowed = 0;
1409
1410         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1411
1412         return 0;
1413 }
1414
1415 static int ast_vga_output_init(struct ast_private *ast)
1416 {
1417         struct drm_device *dev = &ast->base;
1418         struct drm_crtc *crtc = &ast->crtc;
1419         struct drm_encoder *encoder = &ast->output.vga.encoder;
1420         struct ast_vga_connector *ast_vga_connector = &ast->output.vga.vga_connector;
1421         struct drm_connector *connector = &ast_vga_connector->base;
1422         int ret;
1423
1424         ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC);
1425         if (ret)
1426                 return ret;
1427         encoder->possible_crtcs = drm_crtc_mask(crtc);
1428
1429         ret = ast_vga_connector_init(dev, ast_vga_connector);
1430         if (ret)
1431                 return ret;
1432
1433         ret = drm_connector_attach_encoder(connector, encoder);
1434         if (ret)
1435                 return ret;
1436
1437         return 0;
1438 }
1439
1440 /*
1441  * SIL164 Connector
1442  */
1443
1444 static int ast_sil164_connector_helper_get_modes(struct drm_connector *connector)
1445 {
1446         struct ast_sil164_connector *ast_sil164_connector = to_ast_sil164_connector(connector);
1447         struct drm_device *dev = connector->dev;
1448         struct ast_private *ast = to_ast_private(dev);
1449         struct edid *edid;
1450         int count;
1451
1452         if (!ast_sil164_connector->i2c)
1453                 goto err_drm_connector_update_edid_property;
1454
1455         /*
1456          * Protect access to I/O registers from concurrent modesetting
1457          * by acquiring the I/O-register lock.
1458          */
1459         mutex_lock(&ast->ioregs_lock);
1460
1461         edid = drm_get_edid(connector, &ast_sil164_connector->i2c->adapter);
1462         if (!edid)
1463                 goto err_mutex_unlock;
1464
1465         mutex_unlock(&ast->ioregs_lock);
1466
1467         count = drm_add_edid_modes(connector, edid);
1468         kfree(edid);
1469
1470         return count;
1471
1472 err_mutex_unlock:
1473         mutex_unlock(&ast->ioregs_lock);
1474 err_drm_connector_update_edid_property:
1475         drm_connector_update_edid_property(connector, NULL);
1476         return 0;
1477 }
1478
1479 static const struct drm_connector_helper_funcs ast_sil164_connector_helper_funcs = {
1480         .get_modes = ast_sil164_connector_helper_get_modes,
1481 };
1482
1483 static const struct drm_connector_funcs ast_sil164_connector_funcs = {
1484         .reset = drm_atomic_helper_connector_reset,
1485         .fill_modes = drm_helper_probe_single_connector_modes,
1486         .destroy = drm_connector_cleanup,
1487         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
1488         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1489 };
1490
1491 static int ast_sil164_connector_init(struct drm_device *dev,
1492                                      struct ast_sil164_connector *ast_sil164_connector)
1493 {
1494         struct drm_connector *connector = &ast_sil164_connector->base;
1495         int ret;
1496
1497         ast_sil164_connector->i2c = ast_i2c_create(dev);
1498         if (!ast_sil164_connector->i2c)
1499                 drm_err(dev, "failed to add ddc bus for connector\n");
1500
1501         if (ast_sil164_connector->i2c)
1502                 ret = drm_connector_init_with_ddc(dev, connector, &ast_sil164_connector_funcs,
1503                                                   DRM_MODE_CONNECTOR_DVII,
1504                                                   &ast_sil164_connector->i2c->adapter);
1505         else
1506                 ret = drm_connector_init(dev, connector, &ast_sil164_connector_funcs,
1507                                          DRM_MODE_CONNECTOR_DVII);
1508         if (ret)
1509                 return ret;
1510
1511         drm_connector_helper_add(connector, &ast_sil164_connector_helper_funcs);
1512
1513         connector->interlace_allowed = 0;
1514         connector->doublescan_allowed = 0;
1515
1516         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1517
1518         return 0;
1519 }
1520
1521 static int ast_sil164_output_init(struct ast_private *ast)
1522 {
1523         struct drm_device *dev = &ast->base;
1524         struct drm_crtc *crtc = &ast->crtc;
1525         struct drm_encoder *encoder = &ast->output.sil164.encoder;
1526         struct ast_sil164_connector *ast_sil164_connector = &ast->output.sil164.sil164_connector;
1527         struct drm_connector *connector = &ast_sil164_connector->base;
1528         int ret;
1529
1530         ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_TMDS);
1531         if (ret)
1532                 return ret;
1533         encoder->possible_crtcs = drm_crtc_mask(crtc);
1534
1535         ret = ast_sil164_connector_init(dev, ast_sil164_connector);
1536         if (ret)
1537                 return ret;
1538
1539         ret = drm_connector_attach_encoder(connector, encoder);
1540         if (ret)
1541                 return ret;
1542
1543         return 0;
1544 }
1545
1546 /*
1547  * DP501 Connector
1548  */
1549
1550 static int ast_dp501_connector_helper_get_modes(struct drm_connector *connector)
1551 {
1552         void *edid;
1553         bool succ;
1554         int count;
1555
1556         edid = kmalloc(EDID_LENGTH, GFP_KERNEL);
1557         if (!edid)
1558                 goto err_drm_connector_update_edid_property;
1559
1560         succ = ast_dp501_read_edid(connector->dev, edid);
1561         if (!succ)
1562                 goto err_kfree;
1563
1564         drm_connector_update_edid_property(connector, edid);
1565         count = drm_add_edid_modes(connector, edid);
1566         kfree(edid);
1567
1568         return count;
1569
1570 err_kfree:
1571         kfree(edid);
1572 err_drm_connector_update_edid_property:
1573         drm_connector_update_edid_property(connector, NULL);
1574         return 0;
1575 }
1576
1577 static const struct drm_connector_helper_funcs ast_dp501_connector_helper_funcs = {
1578         .get_modes = ast_dp501_connector_helper_get_modes,
1579 };
1580
1581 static const struct drm_connector_funcs ast_dp501_connector_funcs = {
1582         .reset = drm_atomic_helper_connector_reset,
1583         .fill_modes = drm_helper_probe_single_connector_modes,
1584         .destroy = drm_connector_cleanup,
1585         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
1586         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1587 };
1588
1589 static int ast_dp501_connector_init(struct drm_device *dev, struct drm_connector *connector)
1590 {
1591         int ret;
1592
1593         ret = drm_connector_init(dev, connector, &ast_dp501_connector_funcs,
1594                                  DRM_MODE_CONNECTOR_DisplayPort);
1595         if (ret)
1596                 return ret;
1597
1598         drm_connector_helper_add(connector, &ast_dp501_connector_helper_funcs);
1599
1600         connector->interlace_allowed = 0;
1601         connector->doublescan_allowed = 0;
1602
1603         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1604
1605         return 0;
1606 }
1607
1608 static int ast_dp501_output_init(struct ast_private *ast)
1609 {
1610         struct drm_device *dev = &ast->base;
1611         struct drm_crtc *crtc = &ast->crtc;
1612         struct drm_encoder *encoder = &ast->output.dp501.encoder;
1613         struct drm_connector *connector = &ast->output.dp501.connector;
1614         int ret;
1615
1616         ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_TMDS);
1617         if (ret)
1618                 return ret;
1619         encoder->possible_crtcs = drm_crtc_mask(crtc);
1620
1621         ret = ast_dp501_connector_init(dev, connector);
1622         if (ret)
1623                 return ret;
1624
1625         ret = drm_connector_attach_encoder(connector, encoder);
1626         if (ret)
1627                 return ret;
1628
1629         return 0;
1630 }
1631
1632 /*
1633  * ASPEED Display-Port Connector
1634  */
1635
1636 static int ast_astdp_connector_helper_get_modes(struct drm_connector *connector)
1637 {
1638         void *edid;
1639
1640         int succ;
1641         int count;
1642
1643         edid = kmalloc(EDID_LENGTH, GFP_KERNEL);
1644         if (!edid)
1645                 goto err_drm_connector_update_edid_property;
1646
1647         succ = ast_astdp_read_edid(connector->dev, edid);
1648         if (succ < 0)
1649                 goto err_kfree;
1650
1651         drm_connector_update_edid_property(connector, edid);
1652         count = drm_add_edid_modes(connector, edid);
1653         kfree(edid);
1654
1655         return count;
1656
1657 err_kfree:
1658         kfree(edid);
1659 err_drm_connector_update_edid_property:
1660         drm_connector_update_edid_property(connector, NULL);
1661         return 0;
1662 }
1663
1664 static const struct drm_connector_helper_funcs ast_astdp_connector_helper_funcs = {
1665         .get_modes = ast_astdp_connector_helper_get_modes,
1666 };
1667
1668 static const struct drm_connector_funcs ast_astdp_connector_funcs = {
1669         .reset = drm_atomic_helper_connector_reset,
1670         .fill_modes = drm_helper_probe_single_connector_modes,
1671         .destroy = drm_connector_cleanup,
1672         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
1673         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1674 };
1675
1676 static int ast_astdp_connector_init(struct drm_device *dev, struct drm_connector *connector)
1677 {
1678         int ret;
1679
1680         ret = drm_connector_init(dev, connector, &ast_astdp_connector_funcs,
1681                                  DRM_MODE_CONNECTOR_DisplayPort);
1682         if (ret)
1683                 return ret;
1684
1685         drm_connector_helper_add(connector, &ast_astdp_connector_helper_funcs);
1686
1687         connector->interlace_allowed = 0;
1688         connector->doublescan_allowed = 0;
1689
1690         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1691
1692         return 0;
1693 }
1694
1695 static int ast_astdp_output_init(struct ast_private *ast)
1696 {
1697         struct drm_device *dev = &ast->base;
1698         struct drm_crtc *crtc = &ast->crtc;
1699         struct drm_encoder *encoder = &ast->output.astdp.encoder;
1700         struct drm_connector *connector = &ast->output.astdp.connector;
1701         int ret;
1702
1703         ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_TMDS);
1704         if (ret)
1705                 return ret;
1706         encoder->possible_crtcs = drm_crtc_mask(crtc);
1707
1708         ret = ast_astdp_connector_init(dev, connector);
1709         if (ret)
1710                 return ret;
1711
1712         ret = drm_connector_attach_encoder(connector, encoder);
1713         if (ret)
1714                 return ret;
1715
1716         return 0;
1717 }
1718
1719 /*
1720  * Mode config
1721  */
1722
1723 static void ast_mode_config_helper_atomic_commit_tail(struct drm_atomic_state *state)
1724 {
1725         struct ast_private *ast = to_ast_private(state->dev);
1726
1727         /*
1728          * Concurrent operations could possibly trigger a call to
1729          * drm_connector_helper_funcs.get_modes by trying to read the
1730          * display modes. Protect access to I/O registers by acquiring
1731          * the I/O-register lock. Released in atomic_flush().
1732          */
1733         mutex_lock(&ast->ioregs_lock);
1734         drm_atomic_helper_commit_tail_rpm(state);
1735         mutex_unlock(&ast->ioregs_lock);
1736 }
1737
1738 static const struct drm_mode_config_helper_funcs ast_mode_config_helper_funcs = {
1739         .atomic_commit_tail = ast_mode_config_helper_atomic_commit_tail,
1740 };
1741
1742 static enum drm_mode_status ast_mode_config_mode_valid(struct drm_device *dev,
1743                                                        const struct drm_display_mode *mode)
1744 {
1745         static const unsigned long max_bpp = 4; /* DRM_FORMAT_XRGB8888 */
1746         struct ast_private *ast = to_ast_private(dev);
1747         unsigned long fbsize, fbpages, max_fbpages;
1748
1749         max_fbpages = (ast->vram_fb_available) >> PAGE_SHIFT;
1750
1751         fbsize = mode->hdisplay * mode->vdisplay * max_bpp;
1752         fbpages = DIV_ROUND_UP(fbsize, PAGE_SIZE);
1753
1754         if (fbpages > max_fbpages)
1755                 return MODE_MEM;
1756
1757         return MODE_OK;
1758 }
1759
1760 static const struct drm_mode_config_funcs ast_mode_config_funcs = {
1761         .fb_create = drm_gem_fb_create_with_dirty,
1762         .mode_valid = ast_mode_config_mode_valid,
1763         .atomic_check = drm_atomic_helper_check,
1764         .atomic_commit = drm_atomic_helper_commit,
1765 };
1766
1767 int ast_mode_config_init(struct ast_private *ast)
1768 {
1769         struct drm_device *dev = &ast->base;
1770         int ret;
1771
1772         ret = drmm_mode_config_init(dev);
1773         if (ret)
1774                 return ret;
1775
1776         dev->mode_config.funcs = &ast_mode_config_funcs;
1777         dev->mode_config.min_width = 0;
1778         dev->mode_config.min_height = 0;
1779         dev->mode_config.preferred_depth = 24;
1780
1781         if (ast->chip == AST2100 ||
1782             ast->chip == AST2200 ||
1783             ast->chip == AST2300 ||
1784             ast->chip == AST2400 ||
1785             ast->chip == AST2500 ||
1786             ast->chip == AST2600) {
1787                 dev->mode_config.max_width = 1920;
1788                 dev->mode_config.max_height = 2048;
1789         } else {
1790                 dev->mode_config.max_width = 1600;
1791                 dev->mode_config.max_height = 1200;
1792         }
1793
1794         dev->mode_config.helper_private = &ast_mode_config_helper_funcs;
1795
1796         ret = ast_primary_plane_init(ast);
1797         if (ret)
1798                 return ret;
1799
1800         ret = ast_cursor_plane_init(ast);
1801         if (ret)
1802                 return ret;
1803
1804         ast_crtc_init(dev);
1805
1806         if (ast->tx_chip_types & AST_TX_NONE_BIT) {
1807                 ret = ast_vga_output_init(ast);
1808                 if (ret)
1809                         return ret;
1810         }
1811         if (ast->tx_chip_types & AST_TX_SIL164_BIT) {
1812                 ret = ast_sil164_output_init(ast);
1813                 if (ret)
1814                         return ret;
1815         }
1816         if (ast->tx_chip_types & AST_TX_DP501_BIT) {
1817                 ret = ast_dp501_output_init(ast);
1818                 if (ret)
1819                         return ret;
1820         }
1821         if (ast->tx_chip_types & AST_TX_ASTDP_BIT) {
1822                 ret = ast_astdp_output_init(ast);
1823                 if (ret)
1824                         return ret;
1825         }
1826
1827         drm_mode_config_reset(dev);
1828
1829         return 0;
1830 }