2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/types.h>
26 #include "amd_powerplay.h"
29 #define smu_lower_32_bits(n) ((uint32_t)(n))
30 #define smu_upper_32_bits(n) ((uint32_t)(((n)>>16)>>16))
34 enum AVFS_BTC_STATUS {
36 AVFS_BTC_BOOT_STARTEDSMU,
38 AVFS_BTC_VIRUS_LOADED,
40 AVFS_BTC_COMPLETED_PREVIOUSLY,
44 AVFS_BTC_RESTOREVFT_FAILED,
45 AVFS_BTC_SAVEVFT_FAILED,
46 AVFS_BTC_DPMTABLESETUP_FAILED,
47 AVFS_BTC_COMPLETED_UNSAVED,
48 AVFS_BTC_COMPLETED_SAVED,
49 AVFS_BTC_COMPLETED_RESTORED,
51 AVFS_BTC_NOTSUPPORTED,
63 SMU_SoftRegisters = 0,
64 SMU_Discrete_DpmTable,
68 HandshakeDisables = 0,
70 AverageGraphicsActivity,
77 LowSclkInterruptThreshold,
86 enum SMU_MAC_DEFINITION {
87 SMU_MAX_LEVELS_GRAPHICS = 0,
88 SMU_MAX_LEVELS_MEMORY,
92 SMU_MAX_LEVELS_VDDGFX,
95 SMU_UVD_MCLK_HANDSHAKE_DISABLE,
98 extern int smum_get_argument(struct pp_hwmgr *hwmgr);
100 extern int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table);
102 extern int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr);
104 extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg);
106 extern int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
107 uint16_t msg, uint32_t parameter);
109 extern int smu_allocate_memory(void *device, uint32_t size,
110 enum cgs_gpu_mem_type type,
111 uint32_t byte_align, uint64_t *mc_addr,
112 void **kptr, void *handle);
114 extern int smu_free_memory(void *device, void *handle);
116 extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr);
118 extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);
119 extern int smum_process_firmware_header(struct pp_hwmgr *hwmgr);
120 extern int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr);
121 extern int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);
122 extern int smum_init_smc_table(struct pp_hwmgr *hwmgr);
123 extern int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);
124 extern int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr);
125 extern int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);
126 extern uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr,
127 uint32_t type, uint32_t member);
128 extern uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value);
130 extern bool smum_is_dpm_running(struct pp_hwmgr *hwmgr);
132 extern int smum_populate_requested_graphic_levels(struct pp_hwmgr *hwmgr,
133 struct amd_pp_profile *request);
135 extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);