drm/amd/powerplay: add the hw manager for vega12 (v4)
[platform/kernel/linux-rpi.git] / drivers / gpu / drm / amd / powerplay / hwmgr / vega12_thermal.c
1 /*
2  * Copyright 2017 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23
24 #include "vega12_thermal.h"
25 #include "vega12_hwmgr.h"
26 #include "vega12_smumgr.h"
27 #include "vega12_ppsmc.h"
28 #include "vega12_inc.h"
29 #include "pp_soc15.h"
30 #include "pp_debug.h"
31
32 static int vega12_get_current_rpm(struct pp_hwmgr *hwmgr, uint32_t *current_rpm)
33 {
34         PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,
35                                 PPSMC_MSG_GetCurrentRpm),
36                         "Attempt to get current RPM from SMC Failed!",
37                         return -1);
38         PP_ASSERT_WITH_CODE(!vega12_read_arg_from_smc(hwmgr,
39                         current_rpm),
40                         "Attempt to read current RPM from SMC Failed!",
41                         return -1);
42         return 0;
43 }
44
45 int vega12_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr,
46                 struct phm_fan_speed_info *fan_speed_info)
47 {
48         memset(fan_speed_info, 0, sizeof(*fan_speed_info));
49         fan_speed_info->supports_percent_read = false;
50         fan_speed_info->supports_percent_write = false;
51         fan_speed_info->supports_rpm_read = true;
52         fan_speed_info->supports_rpm_write = true;
53
54         return 0;
55 }
56
57 int vega12_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed)
58 {
59         *speed = 0;
60
61         return vega12_get_current_rpm(hwmgr, speed);
62 }
63
64 /**
65  * @fn vega12_enable_fan_control_feature
66  * @brief Enables the SMC Fan Control Feature.
67  *
68  * @param    hwmgr - the address of the powerplay hardware manager.
69  * @return   0 on success. -1 otherwise.
70  */
71 static int vega12_enable_fan_control_feature(struct pp_hwmgr *hwmgr)
72 {
73 #if 0
74         struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
75
76         if (data->smu_features[GNLD_FAN_CONTROL].supported) {
77                 PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(
78                                 hwmgr, true,
79                                 data->smu_features[GNLD_FAN_CONTROL].
80                                 smu_feature_bitmap),
81                                 "Attempt to Enable FAN CONTROL feature Failed!",
82                                 return -1);
83                 data->smu_features[GNLD_FAN_CONTROL].enabled = true;
84         }
85 #endif
86         return 0;
87 }
88
89 static int vega12_disable_fan_control_feature(struct pp_hwmgr *hwmgr)
90 {
91 #if 0
92         struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
93
94         if (data->smu_features[GNLD_FAN_CONTROL].supported) {
95                 PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(
96                                 hwmgr, false,
97                                 data->smu_features[GNLD_FAN_CONTROL].
98                                 smu_feature_bitmap),
99                                 "Attempt to Enable FAN CONTROL feature Failed!",
100                                 return -1);
101                 data->smu_features[GNLD_FAN_CONTROL].enabled = false;
102         }
103 #endif
104         return 0;
105 }
106
107 int vega12_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr)
108 {
109         struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
110
111         if (data->smu_features[GNLD_FAN_CONTROL].supported)
112                 PP_ASSERT_WITH_CODE(
113                                 !vega12_enable_fan_control_feature(hwmgr),
114                                 "Attempt to Enable SMC FAN CONTROL Feature Failed!",
115                                 return -1);
116
117         return 0;
118 }
119
120
121 int vega12_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr)
122 {
123         struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
124
125         if (data->smu_features[GNLD_FAN_CONTROL].supported)
126                 PP_ASSERT_WITH_CODE(!vega12_disable_fan_control_feature(hwmgr),
127                                 "Attempt to Disable SMC FAN CONTROL Feature Failed!",
128                                 return -1);
129
130         return 0;
131 }
132
133 /**
134 * Reset Fan Speed to default.
135 * @param    hwmgr  the address of the powerplay hardware manager.
136 * @exception Always succeeds.
137 */
138 int vega12_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr)
139 {
140         return vega12_fan_ctrl_start_smc_fan_control(hwmgr);
141 }
142
143 /**
144 * Reads the remote temperature from the SIslands thermal controller.
145 *
146 * @param    hwmgr The address of the hardware manager.
147 */
148 int vega12_thermal_get_temperature(struct pp_hwmgr *hwmgr)
149 {
150         int temp = 0;
151         uint32_t reg;
152
153         reg = soc15_get_register_offset(THM_HWID, 0,
154                         mmCG_MULT_THERMAL_STATUS_BASE_IDX,  mmCG_MULT_THERMAL_STATUS);
155
156         temp = cgs_read_register(hwmgr->device, reg);
157
158         temp = (temp & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >>
159                         CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT;
160
161         temp = temp & 0x1ff;
162
163         temp *= PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
164         return temp;
165 }
166
167 /**
168 * Set the requested temperature range for high and low alert signals
169 *
170 * @param    hwmgr The address of the hardware manager.
171 * @param    range Temperature range to be programmed for
172 *           high and low alert signals
173 * @exception PP_Result_BadInput if the input data is not valid.
174 */
175 static int vega12_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
176                 struct PP_TemperatureRange *range)
177 {
178         int low = VEGA12_THERMAL_MINIMUM_ALERT_TEMP *
179                         PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
180         int high = VEGA12_THERMAL_MAXIMUM_ALERT_TEMP *
181                         PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
182         uint32_t val, reg;
183
184         if (low < range->min)
185                 low = range->min;
186         if (high > range->max)
187                 high = range->max;
188
189         if (low > high)
190                 return -EINVAL;
191
192         reg = soc15_get_register_offset(THM_HWID, 0,
193                         mmTHM_THERMAL_INT_CTRL_BASE_IDX, mmTHM_THERMAL_INT_CTRL);
194
195         val = cgs_read_register(hwmgr->device, reg);
196
197         val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
198         val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
199         val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
200         val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
201         val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
202
203         cgs_write_register(hwmgr->device, reg, val);
204
205         return 0;
206 }
207
208 /**
209 * Enable thermal alerts on the RV770 thermal controller.
210 *
211 * @param    hwmgr The address of the hardware manager.
212 */
213 static int vega12_thermal_enable_alert(struct pp_hwmgr *hwmgr)
214 {
215         uint32_t val = 0;
216         uint32_t reg;
217
218         val |= (1 << THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT);
219         val |= (1 << THM_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT);
220         val |= (1 << THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT);
221
222         reg = soc15_get_register_offset(THM_HWID, 0, mmTHM_THERMAL_INT_ENA_BASE_IDX, mmTHM_THERMAL_INT_ENA);
223         cgs_write_register(hwmgr->device, reg, val);
224
225         return 0;
226 }
227
228 /**
229 * Disable thermal alerts on the RV770 thermal controller.
230 * @param    hwmgr The address of the hardware manager.
231 */
232 int vega12_thermal_disable_alert(struct pp_hwmgr *hwmgr)
233 {
234         uint32_t reg;
235
236         reg = soc15_get_register_offset(THM_HWID, 0, mmTHM_THERMAL_INT_ENA_BASE_IDX, mmTHM_THERMAL_INT_ENA);
237         cgs_write_register(hwmgr->device, reg, 0);
238
239         return 0;
240 }
241
242 /**
243 * Uninitialize the thermal controller.
244 * Currently just disables alerts.
245 * @param    hwmgr The address of the hardware manager.
246 */
247 int vega12_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr)
248 {
249         int result = vega12_thermal_disable_alert(hwmgr);
250
251         return result;
252 }
253
254 /**
255 * Set up the fan table to control the fan using the SMC.
256 * @param    hwmgr  the address of the powerplay hardware manager.
257 * @param    pInput the pointer to input data
258 * @param    pOutput the pointer to output data
259 * @param    pStorage the pointer to temporary storage
260 * @param    Result the last failure code
261 * @return   result from set temperature range routine
262 */
263 int vega12_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
264 {
265         int ret;
266         struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
267         PPTable_t *table = &(data->smc_state_table.pp_table);
268
269         ret = smum_send_msg_to_smc_with_parameter(hwmgr,
270                                 PPSMC_MSG_SetFanTemperatureTarget,
271                                 (uint32_t)table->FanTargetTemperature);
272
273         return ret;
274 }
275
276 /**
277 * Start the fan control on the SMC.
278 * @param    hwmgr  the address of the powerplay hardware manager.
279 * @param    pInput the pointer to input data
280 * @param    pOutput the pointer to output data
281 * @param    pStorage the pointer to temporary storage
282 * @param    Result the last failure code
283 * @return   result from set temperature range routine
284 */
285 int vega12_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr)
286 {
287         /* If the fantable setup has failed we could have disabled
288          * PHM_PlatformCaps_MicrocodeFanControl even after
289          * this function was included in the table.
290          * Make sure that we still think controlling the fan is OK.
291          */
292         if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
293                 vega12_fan_ctrl_start_smc_fan_control(hwmgr);
294
295         return 0;
296 }
297
298
299 int vega12_start_thermal_controller(struct pp_hwmgr *hwmgr,
300                                 struct PP_TemperatureRange *range)
301 {
302         int ret = 0;
303
304         if (range == NULL)
305                 return -EINVAL;
306
307         ret = vega12_thermal_set_temperature_range(hwmgr, range);
308         if (ret)
309                 return -EINVAL;
310
311         vega12_thermal_enable_alert(hwmgr);
312         /* We should restrict performance levels to low before we halt the SMC.
313          * On the other hand we are still in boot state when we do this
314          * so it would be pointless.
315          * If this assumption changes we have to revisit this table.
316          */
317         ret = vega12_thermal_setup_fan_table(hwmgr);
318         if (ret)
319                 return -EINVAL;
320
321         vega12_thermal_start_smc_fan_control(hwmgr);
322
323         return 0;
324 };