2 * Copyright 2018 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef _SMU_HELPER_H_
24 #define _SMU_HELPER_H_
26 struct pp_atomctrl_voltage_table;
28 struct phm_ppt_v1_voltage_lookup_table;
30 extern int phm_wait_for_register_unequal(struct pp_hwmgr *hwmgr,
32 uint32_t value, uint32_t mask);
33 extern int phm_wait_for_indirect_register_unequal(
34 struct pp_hwmgr *hwmgr,
35 uint32_t indirect_port, uint32_t index,
36 uint32_t value, uint32_t mask);
39 extern bool phm_cf_want_uvd_power_gating(struct pp_hwmgr *hwmgr);
40 extern bool phm_cf_want_vce_power_gating(struct pp_hwmgr *hwmgr);
41 extern bool phm_cf_want_microcode_fan_ctrl(struct pp_hwmgr *hwmgr);
43 extern int phm_trim_voltage_table(struct pp_atomctrl_voltage_table *vol_table);
44 extern int phm_get_svi2_mvdd_voltage_table(struct pp_atomctrl_voltage_table *vol_table, phm_ppt_v1_clock_voltage_dependency_table *dep_table);
45 extern int phm_get_svi2_vddci_voltage_table(struct pp_atomctrl_voltage_table *vol_table, phm_ppt_v1_clock_voltage_dependency_table *dep_table);
46 extern int phm_get_svi2_vdd_voltage_table(struct pp_atomctrl_voltage_table *vol_table, phm_ppt_v1_voltage_lookup_table *lookup_table);
47 extern void phm_trim_voltage_table_to_fit_state_table(uint32_t max_vol_steps, struct pp_atomctrl_voltage_table *vol_table);
48 extern int phm_reset_single_dpm_table(void *table, uint32_t count, int max);
49 extern void phm_setup_pcie_table_entry(void *table, uint32_t index, uint32_t pcie_gen, uint32_t pcie_lanes);
50 extern int32_t phm_get_dpm_level_enable_mask_value(void *table);
51 extern uint8_t phm_get_voltage_id(struct pp_atomctrl_voltage_table *voltage_table,
53 extern uint8_t phm_get_voltage_index(struct phm_ppt_v1_voltage_lookup_table *lookup_table, uint16_t voltage);
54 extern uint16_t phm_find_closest_vddci(struct pp_atomctrl_voltage_table *vddci_table, uint16_t vddci);
55 extern int phm_find_boot_level(void *table, uint32_t value, uint32_t *boot_level);
56 extern int phm_get_sclk_for_voltage_evv(struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table *lookup_table,
57 uint16_t virtual_voltage_id, int32_t *sclk);
58 extern int phm_initializa_dynamic_state_adjustment_rule_settings(struct pp_hwmgr *hwmgr);
59 extern uint32_t phm_get_lowest_enabled_level(struct pp_hwmgr *hwmgr, uint32_t mask);
60 extern void phm_apply_dal_min_voltage_request(struct pp_hwmgr *hwmgr);
62 extern int phm_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
63 uint32_t sclk, uint16_t id, uint16_t *voltage);
65 extern uint32_t phm_set_field_to_u32(u32 offset, u32 original_data, u32 field, u32 size);
67 extern int phm_wait_on_register(struct pp_hwmgr *hwmgr, uint32_t index,
68 uint32_t value, uint32_t mask);
70 extern int phm_wait_on_indirect_register(struct pp_hwmgr *hwmgr,
71 uint32_t indirect_port,
76 #define PHM_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
77 #define PHM_FIELD_MASK(reg, field) reg##__##field##_MASK
79 #define PHM_SET_FIELD(origval, reg, field, fieldval) \
80 (((origval) & ~PHM_FIELD_MASK(reg, field)) | \
81 (PHM_FIELD_MASK(reg, field) & ((fieldval) << PHM_FIELD_SHIFT(reg, field))))
83 #define PHM_GET_FIELD(value, reg, field) \
84 (((value) & PHM_FIELD_MASK(reg, field)) >> \
85 PHM_FIELD_SHIFT(reg, field))
88 /* Operations on named fields. */
90 #define PHM_READ_FIELD(device, reg, field) \
91 PHM_GET_FIELD(cgs_read_register(device, mm##reg), reg, field)
93 #define PHM_READ_INDIRECT_FIELD(device, port, reg, field) \
94 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
97 #define PHM_READ_VFPF_INDIRECT_FIELD(device, port, reg, field) \
98 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
101 #define PHM_WRITE_FIELD(device, reg, field, fieldval) \
102 cgs_write_register(device, mm##reg, PHM_SET_FIELD( \
103 cgs_read_register(device, mm##reg), reg, field, fieldval))
105 #define PHM_WRITE_INDIRECT_FIELD(device, port, reg, field, fieldval) \
106 cgs_write_ind_register(device, port, ix##reg, \
107 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
108 reg, field, fieldval))
110 #define PHM_WRITE_VFPF_INDIRECT_FIELD(device, port, reg, field, fieldval) \
111 cgs_write_ind_register(device, port, ix##reg, \
112 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
113 reg, field, fieldval))
115 #define PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, index, value, mask) \
116 phm_wait_on_indirect_register(hwmgr, mm##port##_INDEX, index, value, mask)
119 #define PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \
120 PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
122 #define PHM_WAIT_INDIRECT_FIELD(hwmgr, port, reg, field, fieldval) \
123 PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, (fieldval) \
124 << PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field))
126 #define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask) \
127 phm_wait_for_indirect_register_unequal(hwmgr, \
128 mm##port##_INDEX, index, value, mask)
130 #define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \
131 PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
133 #define PHM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, port, reg, field, fieldval) \
134 PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, \
135 (fieldval) << PHM_FIELD_SHIFT(reg, field), \
136 PHM_FIELD_MASK(reg, field) )
139 #define PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, \
140 port, index, value, mask) \
141 phm_wait_for_indirect_register_unequal(hwmgr, \
142 mm##port##_INDEX_11, index, value, mask)
144 #define PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \
145 PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
147 #define PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(hwmgr, port, reg, field, fieldval) \
148 PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, \
149 (fieldval) << PHM_FIELD_SHIFT(reg, field), \
150 PHM_FIELD_MASK(reg, field))
153 #define PHM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, \
154 port, index, value, mask) \
155 phm_wait_on_indirect_register(hwmgr, \
156 mm##port##_INDEX_11, index, value, mask)
158 #define PHM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \
159 PHM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
161 #define PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, port, reg, field, fieldval) \
162 PHM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, \
163 (fieldval) << PHM_FIELD_SHIFT(reg, field), \
164 PHM_FIELD_MASK(reg, field))
166 #define PHM_WAIT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, \
167 index, value, mask) \
168 phm_wait_for_register_unequal(hwmgr, \
171 #define PHM_WAIT_REGISTER_UNEQUAL(hwmgr, reg, value, mask) \
172 PHM_WAIT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, \
173 mm##reg, value, mask)
175 #define PHM_WAIT_FIELD_UNEQUAL(hwmgr, reg, field, fieldval) \
176 PHM_WAIT_REGISTER_UNEQUAL(hwmgr, reg, \
177 (fieldval) << PHM_FIELD_SHIFT(reg, field), \
178 PHM_FIELD_MASK(reg, field))
180 #endif /* _SMU_HELPER_H_ */