1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2020-2021 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
24 #include <linux/types.h>
25 #include <linux/sched/task.h>
26 #include <linux/dynamic_debug.h>
27 #include <drm/ttm/ttm_tt.h>
28 #include <drm/drm_exec.h>
30 #include "amdgpu_sync.h"
31 #include "amdgpu_object.h"
32 #include "amdgpu_vm.h"
33 #include "amdgpu_hmm.h"
35 #include "amdgpu_xgmi.h"
38 #include "kfd_migrate.h"
39 #include "kfd_smi_events.h"
44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__
46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1
48 /* Long enough to ensure no retry fault comes after svm range is restored and
49 * page table is updated.
51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC)
52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG)
53 #define dynamic_svm_range_dump(svms) \
54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms)
56 #define dynamic_svm_range_dump(svms) \
57 do { if (0) svm_range_debug_dump(svms); } while (0)
60 /* Giant svm range split into smaller ranges based on this, it is decided using
61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to
64 static uint64_t max_svm_range_pages;
66 struct criu_svm_metadata {
67 struct list_head list;
68 struct kfd_criu_svm_range_priv_data data;
71 static void svm_range_evict_svm_bo_worker(struct work_struct *work);
73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
74 const struct mmu_notifier_range *range,
75 unsigned long cur_seq);
77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
78 uint64_t *bo_s, uint64_t *bo_l);
79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = {
80 .invalidate = svm_range_cpu_invalidate_pagetables,
84 * svm_range_unlink - unlink svm_range from lists and interval tree
85 * @prange: svm range structure to be removed
87 * Remove the svm_range from the svms and svm_bo lists and the svms
90 * Context: The caller must hold svms->lock
92 static void svm_range_unlink(struct svm_range *prange)
94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
95 prange, prange->start, prange->last);
98 spin_lock(&prange->svm_bo->list_lock);
99 list_del(&prange->svm_bo_list);
100 spin_unlock(&prange->svm_bo->list_lock);
103 list_del(&prange->list);
104 if (prange->it_node.start != 0 && prange->it_node.last != 0)
105 interval_tree_remove(&prange->it_node, &prange->svms->objects);
109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange)
111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
112 prange, prange->start, prange->last);
114 mmu_interval_notifier_insert_locked(&prange->notifier, mm,
115 prange->start << PAGE_SHIFT,
116 prange->npages << PAGE_SHIFT,
121 * svm_range_add_to_svms - add svm range to svms
122 * @prange: svm range structure to be added
124 * Add the svm range to svms interval tree and link list
126 * Context: The caller must hold svms->lock
128 static void svm_range_add_to_svms(struct svm_range *prange)
130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
131 prange, prange->start, prange->last);
133 list_move_tail(&prange->list, &prange->svms->list);
134 prange->it_node.start = prange->start;
135 prange->it_node.last = prange->last;
136 interval_tree_insert(&prange->it_node, &prange->svms->objects);
139 static void svm_range_remove_notifier(struct svm_range *prange)
141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n",
142 prange->svms, prange,
143 prange->notifier.interval_tree.start >> PAGE_SHIFT,
144 prange->notifier.interval_tree.last >> PAGE_SHIFT);
146 if (prange->notifier.interval_tree.start != 0 &&
147 prange->notifier.interval_tree.last != 0)
148 mmu_interval_notifier_remove(&prange->notifier);
152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr)
154 return dma_addr && !dma_mapping_error(dev, dma_addr) &&
155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN);
159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange,
160 unsigned long offset, unsigned long npages,
161 unsigned long *hmm_pfns, uint32_t gpuidx)
163 enum dma_data_direction dir = DMA_BIDIRECTIONAL;
164 dma_addr_t *addr = prange->dma_addr[gpuidx];
165 struct device *dev = adev->dev;
170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL);
173 prange->dma_addr[gpuidx] = addr;
177 for (i = 0; i < npages; i++) {
178 if (svm_is_valid_dma_mapping_addr(dev, addr[i]))
179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir);
181 page = hmm_pfn_to_page(hmm_pfns[i]);
182 if (is_zone_device_page(page)) {
183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev;
185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) +
186 bo_adev->vm_manager.vram_base_offset -
187 bo_adev->kfd.pgmap.range.start;
188 addr[i] |= SVM_RANGE_VRAM_DOMAIN;
189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]);
192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir);
193 r = dma_mapping_error(dev, addr[i]);
195 dev_err(dev, "failed %d dma_map_page\n", r);
198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n",
199 addr[i] >> PAGE_SHIFT, page_to_pfn(page));
205 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap,
206 unsigned long offset, unsigned long npages,
207 unsigned long *hmm_pfns)
209 struct kfd_process *p;
213 p = container_of(prange->svms, struct kfd_process, svms);
215 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
216 struct kfd_process_device *pdd;
218 pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
219 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
221 pr_debug("failed to find device idx %d\n", gpuidx);
225 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages,
234 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr,
235 unsigned long offset, unsigned long npages)
237 enum dma_data_direction dir = DMA_BIDIRECTIONAL;
243 for (i = offset; i < offset + npages; i++) {
244 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i]))
246 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT);
247 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir);
252 void svm_range_free_dma_mappings(struct svm_range *prange, bool unmap_dma)
254 struct kfd_process_device *pdd;
255 dma_addr_t *dma_addr;
257 struct kfd_process *p;
260 p = container_of(prange->svms, struct kfd_process, svms);
262 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) {
263 dma_addr = prange->dma_addr[gpuidx];
267 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
269 pr_debug("failed to find device idx %d\n", gpuidx);
272 dev = &pdd->dev->adev->pdev->dev;
274 svm_range_dma_unmap(dev, dma_addr, 0, prange->npages);
276 prange->dma_addr[gpuidx] = NULL;
280 static void svm_range_free(struct svm_range *prange, bool do_unmap)
282 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT;
283 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms);
285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange,
286 prange->start, prange->last);
288 svm_range_vram_node_free(prange);
289 svm_range_free_dma_mappings(prange, do_unmap);
291 if (do_unmap && !p->xnack_enabled) {
292 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size);
293 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
294 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
296 mutex_destroy(&prange->lock);
297 mutex_destroy(&prange->migrate_mutex);
302 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc,
303 uint8_t *granularity, uint32_t *flags)
305 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
306 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
309 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT;
313 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start,
314 uint64_t last, bool update_mem_usage)
316 uint64_t size = last - start + 1;
317 struct svm_range *prange;
318 struct kfd_process *p;
320 prange = kzalloc(sizeof(*prange), GFP_KERNEL);
324 p = container_of(svms, struct kfd_process, svms);
325 if (!p->xnack_enabled && update_mem_usage &&
326 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT,
327 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) {
328 pr_info("SVM mapping failed, exceeds resident system memory limit\n");
332 prange->npages = size;
334 prange->start = start;
336 INIT_LIST_HEAD(&prange->list);
337 INIT_LIST_HEAD(&prange->update_list);
338 INIT_LIST_HEAD(&prange->svm_bo_list);
339 INIT_LIST_HEAD(&prange->deferred_list);
340 INIT_LIST_HEAD(&prange->child_list);
341 atomic_set(&prange->invalid, 0);
342 prange->validate_timestamp = 0;
343 mutex_init(&prange->migrate_mutex);
344 mutex_init(&prange->lock);
346 if (p->xnack_enabled)
347 bitmap_copy(prange->bitmap_access, svms->bitmap_supported,
350 svm_range_set_default_attributes(&prange->preferred_loc,
351 &prange->prefetch_loc,
352 &prange->granularity, &prange->flags);
354 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last);
359 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo)
361 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref))
367 static void svm_range_bo_release(struct kref *kref)
369 struct svm_range_bo *svm_bo;
371 svm_bo = container_of(kref, struct svm_range_bo, kref);
372 pr_debug("svm_bo 0x%p\n", svm_bo);
374 spin_lock(&svm_bo->list_lock);
375 while (!list_empty(&svm_bo->range_list)) {
376 struct svm_range *prange =
377 list_first_entry(&svm_bo->range_list,
378 struct svm_range, svm_bo_list);
379 /* list_del_init tells a concurrent svm_range_vram_node_new when
380 * it's safe to reuse the svm_bo pointer and svm_bo_list head.
382 list_del_init(&prange->svm_bo_list);
383 spin_unlock(&svm_bo->list_lock);
385 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
386 prange->start, prange->last);
387 mutex_lock(&prange->lock);
388 prange->svm_bo = NULL;
389 mutex_unlock(&prange->lock);
391 spin_lock(&svm_bo->list_lock);
393 spin_unlock(&svm_bo->list_lock);
394 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base))
395 /* We're not in the eviction worker. Signal the fence. */
396 dma_fence_signal(&svm_bo->eviction_fence->base);
397 dma_fence_put(&svm_bo->eviction_fence->base);
398 amdgpu_bo_unref(&svm_bo->bo);
402 static void svm_range_bo_wq_release(struct work_struct *work)
404 struct svm_range_bo *svm_bo;
406 svm_bo = container_of(work, struct svm_range_bo, release_work);
407 svm_range_bo_release(&svm_bo->kref);
410 static void svm_range_bo_release_async(struct kref *kref)
412 struct svm_range_bo *svm_bo;
414 svm_bo = container_of(kref, struct svm_range_bo, kref);
415 pr_debug("svm_bo 0x%p\n", svm_bo);
416 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release);
417 schedule_work(&svm_bo->release_work);
420 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo)
422 kref_put(&svm_bo->kref, svm_range_bo_release_async);
425 static void svm_range_bo_unref(struct svm_range_bo *svm_bo)
428 kref_put(&svm_bo->kref, svm_range_bo_release);
432 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange)
434 mutex_lock(&prange->lock);
435 if (!prange->svm_bo) {
436 mutex_unlock(&prange->lock);
439 if (prange->ttm_res) {
440 /* We still have a reference, all is well */
441 mutex_unlock(&prange->lock);
444 if (svm_bo_ref_unless_zero(prange->svm_bo)) {
446 * Migrate from GPU to GPU, remove range from source svm_bo->node
447 * range list, and return false to allocate svm_bo from destination
450 if (prange->svm_bo->node != node) {
451 mutex_unlock(&prange->lock);
453 spin_lock(&prange->svm_bo->list_lock);
454 list_del_init(&prange->svm_bo_list);
455 spin_unlock(&prange->svm_bo->list_lock);
457 svm_range_bo_unref(prange->svm_bo);
460 if (READ_ONCE(prange->svm_bo->evicting)) {
462 struct svm_range_bo *svm_bo;
463 /* The BO is getting evicted,
464 * we need to get a new one
466 mutex_unlock(&prange->lock);
467 svm_bo = prange->svm_bo;
468 f = dma_fence_get(&svm_bo->eviction_fence->base);
469 svm_range_bo_unref(prange->svm_bo);
470 /* wait for the fence to avoid long spin-loop
471 * at list_empty_careful
473 dma_fence_wait(f, false);
476 /* The BO was still around and we got
477 * a new reference to it
479 mutex_unlock(&prange->lock);
480 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n",
481 prange->svms, prange->start, prange->last);
483 prange->ttm_res = prange->svm_bo->bo->tbo.resource;
488 mutex_unlock(&prange->lock);
491 /* We need a new svm_bo. Spin-loop to wait for concurrent
492 * svm_range_bo_release to finish removing this range from
493 * its range list and set prange->svm_bo to null. After this,
494 * it is safe to reuse the svm_bo pointer and svm_bo_list head.
496 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo)
502 static struct svm_range_bo *svm_range_bo_new(void)
504 struct svm_range_bo *svm_bo;
506 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL);
510 kref_init(&svm_bo->kref);
511 INIT_LIST_HEAD(&svm_bo->range_list);
512 spin_lock_init(&svm_bo->list_lock);
518 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange,
521 struct amdgpu_bo_param bp;
522 struct svm_range_bo *svm_bo;
523 struct amdgpu_bo_user *ubo;
524 struct amdgpu_bo *bo;
525 struct kfd_process *p;
526 struct mm_struct *mm;
529 p = container_of(prange->svms, struct kfd_process, svms);
530 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms,
531 prange->start, prange->last);
533 if (svm_range_validate_svm_bo(node, prange))
536 svm_bo = svm_range_bo_new();
538 pr_debug("failed to alloc svm bo\n");
541 mm = get_task_mm(p->lead_thread);
543 pr_debug("failed to get mm\n");
548 svm_bo->eviction_fence =
549 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1),
553 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker);
554 svm_bo->evicting = 0;
555 memset(&bp, 0, sizeof(bp));
556 bp.size = prange->npages * PAGE_SIZE;
557 bp.byte_align = PAGE_SIZE;
558 bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
559 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
560 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0;
561 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE;
562 bp.type = ttm_bo_type_device;
565 bp.xcp_id_plus1 = node->xcp->id + 1;
567 r = amdgpu_bo_create_user(node->adev, &bp, &ubo);
569 pr_debug("failed %d to create bo\n", r);
570 goto create_bo_failed;
574 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n",
575 bo->tbo.resource->start << PAGE_SHIFT, bp.size,
576 bp.xcp_id_plus1 - 1);
578 r = amdgpu_bo_reserve(bo, true);
580 pr_debug("failed %d to reserve bo\n", r);
581 goto reserve_bo_failed;
585 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false);
587 pr_debug("failed %d to sync bo\n", r);
588 amdgpu_bo_unreserve(bo);
589 goto reserve_bo_failed;
593 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1);
595 pr_debug("failed %d to reserve bo\n", r);
596 amdgpu_bo_unreserve(bo);
597 goto reserve_bo_failed;
599 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true);
601 amdgpu_bo_unreserve(bo);
604 prange->svm_bo = svm_bo;
605 prange->ttm_res = bo->tbo.resource;
608 spin_lock(&svm_bo->list_lock);
609 list_add(&prange->svm_bo_list, &svm_bo->range_list);
610 spin_unlock(&svm_bo->list_lock);
615 amdgpu_bo_unref(&bo);
617 dma_fence_put(&svm_bo->eviction_fence->base);
619 prange->ttm_res = NULL;
624 void svm_range_vram_node_free(struct svm_range *prange)
626 /* serialize prange->svm_bo unref */
627 mutex_lock(&prange->lock);
628 /* prange->svm_bo has not been unref */
629 if (prange->ttm_res) {
630 prange->ttm_res = NULL;
631 mutex_unlock(&prange->lock);
632 svm_range_bo_unref(prange->svm_bo);
634 mutex_unlock(&prange->lock);
638 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id)
640 struct kfd_process *p;
641 struct kfd_process_device *pdd;
643 p = container_of(prange->svms, struct kfd_process, svms);
644 pdd = kfd_process_device_data_by_id(p, gpu_id);
646 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id);
653 struct kfd_process_device *
654 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node)
656 struct kfd_process *p;
658 p = container_of(prange->svms, struct kfd_process, svms);
660 return kfd_get_process_device_data(node, p);
663 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo)
665 struct ttm_operation_ctx ctx = { false, false };
667 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
669 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
673 svm_range_check_attr(struct kfd_process *p,
674 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
678 for (i = 0; i < nattr; i++) {
679 uint32_t val = attrs[i].value;
680 int gpuidx = MAX_GPU_INSTANCE;
682 switch (attrs[i].type) {
683 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
684 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM &&
685 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED)
686 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
688 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
689 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM)
690 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
692 case KFD_IOCTL_SVM_ATTR_ACCESS:
693 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
694 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
695 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
697 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
699 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
701 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
704 pr_debug("unknown attr type 0x%x\n", attrs[i].type);
709 pr_debug("no GPU 0x%x found\n", val);
711 } else if (gpuidx < MAX_GPU_INSTANCE &&
712 !test_bit(gpuidx, p->svms.bitmap_supported)) {
713 pr_debug("GPU 0x%x not supported\n", val);
722 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange,
723 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
724 bool *update_mapping)
729 for (i = 0; i < nattr; i++) {
730 switch (attrs[i].type) {
731 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
732 prange->preferred_loc = attrs[i].value;
734 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
735 prange->prefetch_loc = attrs[i].value;
737 case KFD_IOCTL_SVM_ATTR_ACCESS:
738 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
739 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
740 if (!p->xnack_enabled)
741 *update_mapping = true;
743 gpuidx = kfd_process_gpuidx_from_gpuid(p,
745 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
746 bitmap_clear(prange->bitmap_access, gpuidx, 1);
747 bitmap_clear(prange->bitmap_aip, gpuidx, 1);
748 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
749 bitmap_set(prange->bitmap_access, gpuidx, 1);
750 bitmap_clear(prange->bitmap_aip, gpuidx, 1);
752 bitmap_clear(prange->bitmap_access, gpuidx, 1);
753 bitmap_set(prange->bitmap_aip, gpuidx, 1);
756 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
757 *update_mapping = true;
758 prange->flags |= attrs[i].value;
760 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
761 *update_mapping = true;
762 prange->flags &= ~attrs[i].value;
764 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
765 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F);
768 WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
774 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange,
775 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
780 for (i = 0; i < nattr; i++) {
781 switch (attrs[i].type) {
782 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
783 if (prange->preferred_loc != attrs[i].value)
786 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
787 /* Prefetch should always trigger a migration even
788 * if the value of the attribute didn't change.
791 case KFD_IOCTL_SVM_ATTR_ACCESS:
792 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
793 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
794 gpuidx = kfd_process_gpuidx_from_gpuid(p,
796 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
797 if (test_bit(gpuidx, prange->bitmap_access) ||
798 test_bit(gpuidx, prange->bitmap_aip))
800 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
801 if (!test_bit(gpuidx, prange->bitmap_access))
804 if (!test_bit(gpuidx, prange->bitmap_aip))
808 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
809 if ((prange->flags & attrs[i].value) != attrs[i].value)
812 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
813 if ((prange->flags & attrs[i].value) != 0)
816 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
817 if (prange->granularity != attrs[i].value)
821 WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
829 * svm_range_debug_dump - print all range information from svms
830 * @svms: svm range list header
832 * debug output svm range start, end, prefetch location from svms
833 * interval tree and link list
835 * Context: The caller must hold svms->lock
837 static void svm_range_debug_dump(struct svm_range_list *svms)
839 struct interval_tree_node *node;
840 struct svm_range *prange;
842 pr_debug("dump svms 0x%p list\n", svms);
843 pr_debug("range\tstart\tpage\tend\t\tlocation\n");
845 list_for_each_entry(prange, &svms->list, list) {
846 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
847 prange, prange->start, prange->npages,
848 prange->start + prange->npages - 1,
852 pr_debug("dump svms 0x%p interval tree\n", svms);
853 pr_debug("range\tstart\tpage\tend\t\tlocation\n");
854 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL);
856 prange = container_of(node, struct svm_range, it_node);
857 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
858 prange, prange->start, prange->npages,
859 prange->start + prange->npages - 1,
861 node = interval_tree_iter_next(node, 0, ~0ULL);
866 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements,
871 dst = kvmalloc_array(num_elements, size, GFP_KERNEL);
874 memcpy(dst, (unsigned char *)psrc + offset, num_elements * size);
880 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src)
884 for (i = 0; i < MAX_GPU_INSTANCE; i++) {
885 if (!src->dma_addr[i])
887 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i],
888 sizeof(*src->dma_addr[i]), src->npages, 0);
889 if (!dst->dma_addr[i])
897 svm_range_split_array(void *ppnew, void *ppold, size_t size,
898 uint64_t old_start, uint64_t old_n,
899 uint64_t new_start, uint64_t new_n)
901 unsigned char *new, *old, *pold;
906 pold = *(unsigned char **)ppold;
910 d = (new_start - old_start) * size;
911 new = svm_range_copy_array(pold, size, new_n, d);
914 d = (new_start == old_start) ? new_n * size : 0;
915 old = svm_range_copy_array(pold, size, old_n, d);
921 *(void **)ppold = old;
922 *(void **)ppnew = new;
928 svm_range_split_pages(struct svm_range *new, struct svm_range *old,
929 uint64_t start, uint64_t last)
931 uint64_t npages = last - start + 1;
934 for (i = 0; i < MAX_GPU_INSTANCE; i++) {
935 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i],
936 sizeof(*old->dma_addr[i]), old->start,
937 npages, new->start, new->npages);
946 svm_range_split_nodes(struct svm_range *new, struct svm_range *old,
947 uint64_t start, uint64_t last)
949 uint64_t npages = last - start + 1;
951 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n",
952 new->svms, new, new->start, start, last);
954 if (new->start == old->start) {
955 new->offset = old->offset;
956 old->offset += new->npages;
958 new->offset = old->offset + npages;
961 new->svm_bo = svm_range_bo_ref(old->svm_bo);
962 new->ttm_res = old->ttm_res;
964 spin_lock(&new->svm_bo->list_lock);
965 list_add(&new->svm_bo_list, &new->svm_bo->range_list);
966 spin_unlock(&new->svm_bo->list_lock);
972 * svm_range_split_adjust - split range and adjust
975 * @old: the old range
976 * @start: the old range adjust to start address in pages
977 * @last: the old range adjust to last address in pages
979 * Copy system memory dma_addr or vram ttm_res in old range to new
980 * range from new_start up to size new->npages, the remaining old range is from
984 * 0 - OK, -ENOMEM - out of memory
987 svm_range_split_adjust(struct svm_range *new, struct svm_range *old,
988 uint64_t start, uint64_t last)
992 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n",
993 new->svms, new->start, old->start, old->last, start, last);
995 if (new->start < old->start ||
996 new->last > old->last) {
997 WARN_ONCE(1, "invalid new range start or last\n");
1001 r = svm_range_split_pages(new, old, start, last);
1005 if (old->actual_loc && old->ttm_res) {
1006 r = svm_range_split_nodes(new, old, start, last);
1011 old->npages = last - start + 1;
1014 new->flags = old->flags;
1015 new->preferred_loc = old->preferred_loc;
1016 new->prefetch_loc = old->prefetch_loc;
1017 new->actual_loc = old->actual_loc;
1018 new->granularity = old->granularity;
1019 new->mapped_to_gpu = old->mapped_to_gpu;
1020 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
1021 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
1027 * svm_range_split - split a range in 2 ranges
1029 * @prange: the svm range to split
1030 * @start: the remaining range start address in pages
1031 * @last: the remaining range last address in pages
1032 * @new: the result new range generated
1035 * case 1: if start == prange->start
1036 * prange ==> prange[start, last]
1037 * new range [last + 1, prange->last]
1039 * case 2: if last == prange->last
1040 * prange ==> prange[start, last]
1041 * new range [prange->start, start - 1]
1044 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last
1047 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last,
1048 struct svm_range **new)
1050 uint64_t old_start = prange->start;
1051 uint64_t old_last = prange->last;
1052 struct svm_range_list *svms;
1055 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms,
1056 old_start, old_last, start, last);
1058 if (old_start != start && old_last != last)
1060 if (start < old_start || last > old_last)
1063 svms = prange->svms;
1064 if (old_start == start)
1065 *new = svm_range_new(svms, last + 1, old_last, false);
1067 *new = svm_range_new(svms, old_start, start - 1, false);
1071 r = svm_range_split_adjust(*new, prange, start, last);
1073 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n",
1074 r, old_start, old_last, start, last);
1075 svm_range_free(*new, false);
1083 svm_range_split_tail(struct svm_range *prange,
1084 uint64_t new_last, struct list_head *insert_list)
1086 struct svm_range *tail;
1087 int r = svm_range_split(prange, prange->start, new_last, &tail);
1090 list_add(&tail->list, insert_list);
1095 svm_range_split_head(struct svm_range *prange,
1096 uint64_t new_start, struct list_head *insert_list)
1098 struct svm_range *head;
1099 int r = svm_range_split(prange, new_start, prange->last, &head);
1102 list_add(&head->list, insert_list);
1107 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm,
1108 struct svm_range *pchild, enum svm_work_list_ops op)
1110 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n",
1111 pchild, pchild->start, pchild->last, prange, op);
1113 pchild->work_item.mm = mm;
1114 pchild->work_item.op = op;
1115 list_add_tail(&pchild->child_list, &prange->child_list);
1119 * svm_range_split_by_granularity - collect ranges within granularity boundary
1121 * @p: the process with svms list
1123 * @addr: the vm fault address in pages, to split the prange
1124 * @parent: parent range if prange is from child list
1125 * @prange: prange to split
1127 * Trims @prange to be a single aligned block of prange->granularity if
1128 * possible. The head and tail are added to the child_list in @parent.
1130 * Context: caller must hold mmap_read_lock and prange->lock
1133 * 0 - OK, otherwise error code
1136 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm,
1137 unsigned long addr, struct svm_range *parent,
1138 struct svm_range *prange)
1140 struct svm_range *head, *tail;
1141 unsigned long start, last, size;
1144 /* Align splited range start and size to granularity size, then a single
1145 * PTE will be used for whole range, this reduces the number of PTE
1146 * updated and the L1 TLB space used for translation.
1148 size = 1UL << prange->granularity;
1149 start = ALIGN_DOWN(addr, size);
1150 last = ALIGN(addr + 1, size) - 1;
1152 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n",
1153 prange->svms, prange->start, prange->last, start, last, size);
1155 if (start > prange->start) {
1156 r = svm_range_split(prange, start, prange->last, &head);
1159 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE);
1162 if (last < prange->last) {
1163 r = svm_range_split(prange, prange->start, last, &tail);
1166 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
1169 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */
1170 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) {
1171 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP;
1172 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n",
1173 prange, prange->start, prange->last,
1174 SVM_OP_ADD_RANGE_AND_MAP);
1179 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b)
1181 return (node_a->adev == node_b->adev ||
1182 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev));
1186 svm_range_get_pte_flags(struct kfd_node *node,
1187 struct svm_range *prange, int domain)
1189 struct kfd_node *bo_node;
1190 uint32_t flags = prange->flags;
1191 uint32_t mapping_flags = 0;
1193 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN);
1194 bool coherent = flags & KFD_IOCTL_SVM_FLAG_COHERENT;
1195 bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/
1196 unsigned int mtype_local;
1198 if (domain == SVM_RANGE_VRAM_DOMAIN)
1199 bo_node = prange->svm_bo->node;
1201 switch (node->adev->ip_versions[GC_HWIP][0]) {
1202 case IP_VERSION(9, 4, 1):
1203 if (domain == SVM_RANGE_VRAM_DOMAIN) {
1204 if (bo_node == node) {
1205 mapping_flags |= coherent ?
1206 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1208 mapping_flags |= coherent ?
1209 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1210 if (svm_nodes_in_same_hive(node, bo_node))
1214 mapping_flags |= coherent ?
1215 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1218 case IP_VERSION(9, 4, 2):
1219 if (domain == SVM_RANGE_VRAM_DOMAIN) {
1220 if (bo_node == node) {
1221 mapping_flags |= coherent ?
1222 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1223 if (node->adev->gmc.xgmi.connected_to_cpu)
1226 mapping_flags |= coherent ?
1227 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1228 if (svm_nodes_in_same_hive(node, bo_node))
1232 mapping_flags |= coherent ?
1233 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1236 case IP_VERSION(9, 4, 3):
1237 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC :
1238 (amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW);
1241 mapping_flags |= AMDGPU_VM_MTYPE_UC;
1242 } else if (domain == SVM_RANGE_VRAM_DOMAIN) {
1243 /* local HBM region close to partition */
1244 if (bo_node->adev == node->adev &&
1245 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id))
1246 mapping_flags |= mtype_local;
1247 /* local HBM region far from partition or remote XGMI GPU */
1248 else if (svm_nodes_in_same_hive(bo_node, node))
1249 mapping_flags |= AMDGPU_VM_MTYPE_NC;
1252 mapping_flags |= AMDGPU_VM_MTYPE_UC;
1253 /* system memory accessed by the APU */
1254 } else if (node->adev->flags & AMD_IS_APU) {
1255 /* On NUMA systems, locality is determined per-page
1256 * in amdgpu_gmc_override_vm_pte_flags
1258 if (num_possible_nodes() <= 1)
1259 mapping_flags |= mtype_local;
1261 mapping_flags |= AMDGPU_VM_MTYPE_NC;
1262 /* system memory accessed by the dGPU */
1264 mapping_flags |= AMDGPU_VM_MTYPE_UC;
1268 mapping_flags |= coherent ?
1269 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1272 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE;
1274 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO)
1275 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE;
1276 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC)
1277 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
1279 pte_flags = AMDGPU_PTE_VALID;
1280 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM;
1281 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0;
1283 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags);
1288 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
1289 uint64_t start, uint64_t last,
1290 struct dma_fence **fence)
1292 uint64_t init_pte_value = 0;
1294 pr_debug("[0x%llx 0x%llx]\n", start, last);
1296 return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start,
1297 last, init_pte_value, 0, 0, NULL, NULL,
1302 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start,
1303 unsigned long last, uint32_t trigger)
1305 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1306 struct kfd_process_device *pdd;
1307 struct dma_fence *fence = NULL;
1308 struct kfd_process *p;
1312 if (!prange->mapped_to_gpu) {
1313 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n",
1314 prange, prange->start, prange->last);
1318 if (prange->start == start && prange->last == last) {
1319 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange);
1320 prange->mapped_to_gpu = false;
1323 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
1325 p = container_of(prange->svms, struct kfd_process, svms);
1327 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1328 pr_debug("unmap from gpu idx 0x%x\n", gpuidx);
1329 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1331 pr_debug("failed to find device idx %d\n", gpuidx);
1335 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid,
1336 start, last, trigger);
1338 r = svm_range_unmap_from_gpu(pdd->dev->adev,
1339 drm_priv_to_vm(pdd->drm_priv),
1340 start, last, &fence);
1345 r = dma_fence_wait(fence, false);
1346 dma_fence_put(fence);
1351 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT);
1358 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange,
1359 unsigned long offset, unsigned long npages, bool readonly,
1360 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev,
1361 struct dma_fence **fence, bool flush_tlb)
1363 struct amdgpu_device *adev = pdd->dev->adev;
1364 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv);
1366 unsigned long last_start;
1371 last_start = prange->start + offset;
1373 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms,
1374 last_start, last_start + npages - 1, readonly);
1376 for (i = offset; i < offset + npages; i++) {
1377 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN;
1378 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN;
1380 /* Collect all pages in the same address range and memory domain
1381 * that can be mapped with a single call to update mapping.
1383 if (i < offset + npages - 1 &&
1384 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN))
1387 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n",
1388 last_start, prange->start + i, last_domain ? "GPU" : "CPU");
1390 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain);
1392 pte_flags &= ~AMDGPU_PTE_WRITEABLE;
1394 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n",
1395 prange->svms, last_start, prange->start + i,
1396 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0,
1399 /* For dGPU mode, we use same vm_manager to allocate VRAM for
1400 * different memory partition based on fpfn/lpfn, we should use
1401 * same vm_manager.vram_base_offset regardless memory partition.
1403 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, NULL,
1404 last_start, prange->start + i,
1406 (last_start - prange->start) << PAGE_SHIFT,
1407 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0,
1408 NULL, dma_addr, &vm->last_update);
1410 for (j = last_start - prange->start; j <= i; j++)
1411 dma_addr[j] |= last_domain;
1414 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start);
1417 last_start = prange->start + i + 1;
1420 r = amdgpu_vm_update_pdes(adev, vm, false);
1422 pr_debug("failed %d to update directories 0x%lx\n", r,
1428 *fence = dma_fence_get(vm->last_update);
1435 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset,
1436 unsigned long npages, bool readonly,
1437 unsigned long *bitmap, bool wait, bool flush_tlb)
1439 struct kfd_process_device *pdd;
1440 struct amdgpu_device *bo_adev = NULL;
1441 struct kfd_process *p;
1442 struct dma_fence *fence = NULL;
1446 if (prange->svm_bo && prange->ttm_res)
1447 bo_adev = prange->svm_bo->node->adev;
1449 p = container_of(prange->svms, struct kfd_process, svms);
1450 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1451 pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
1452 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1454 pr_debug("failed to find device idx %d\n", gpuidx);
1458 pdd = kfd_bind_process_to_device(pdd->dev, p);
1462 if (bo_adev && pdd->dev->adev != bo_adev &&
1463 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) {
1464 pr_debug("cannot map to device idx %d\n", gpuidx);
1468 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly,
1469 prange->dma_addr[gpuidx],
1470 bo_adev, wait ? &fence : NULL,
1476 r = dma_fence_wait(fence, false);
1477 dma_fence_put(fence);
1480 pr_debug("failed %d to dma fence wait\n", r);
1485 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY);
1491 struct svm_validate_context {
1492 struct kfd_process *process;
1493 struct svm_range *prange;
1495 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1496 struct drm_exec exec;
1499 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr)
1501 struct kfd_process_device *pdd;
1502 struct amdgpu_vm *vm;
1506 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0);
1507 drm_exec_until_all_locked(&ctx->exec) {
1508 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1509 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1511 pr_debug("failed to find device idx %d\n", gpuidx);
1515 vm = drm_priv_to_vm(pdd->drm_priv);
1517 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2);
1518 drm_exec_retry_on_contention(&ctx->exec);
1520 pr_debug("failed %d to reserve bo\n", r);
1526 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1527 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1529 pr_debug("failed to find device idx %d\n", gpuidx);
1534 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev,
1535 drm_priv_to_vm(pdd->drm_priv),
1536 svm_range_bo_validate, NULL);
1538 pr_debug("failed %d validate pt bos\n", r);
1546 drm_exec_fini(&ctx->exec);
1550 static void svm_range_unreserve_bos(struct svm_validate_context *ctx)
1552 drm_exec_fini(&ctx->exec);
1555 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx)
1557 struct kfd_process_device *pdd;
1559 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1563 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev);
1567 * Validation+GPU mapping with concurrent invalidation (MMU notifiers)
1569 * To prevent concurrent destruction or change of range attributes, the
1570 * svm_read_lock must be held. The caller must not hold the svm_write_lock
1571 * because that would block concurrent evictions and lead to deadlocks. To
1572 * serialize concurrent migrations or validations of the same range, the
1573 * prange->migrate_mutex must be held.
1575 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its
1578 * The following sequence ensures race-free validation and GPU mapping:
1580 * 1. Reserve page table (and SVM BO if range is in VRAM)
1581 * 2. hmm_range_fault to get page addresses (if system memory)
1582 * 3. DMA-map pages (if system memory)
1583 * 4-a. Take notifier lock
1584 * 4-b. Check that pages still valid (mmu_interval_read_retry)
1585 * 4-c. Check that the range was not split or otherwise invalidated
1586 * 4-d. Update GPU page table
1587 * 4.e. Release notifier lock
1588 * 5. Release page table (and SVM BO) reservation
1590 static int svm_range_validate_and_map(struct mm_struct *mm,
1591 struct svm_range *prange, int32_t gpuidx,
1592 bool intr, bool wait, bool flush_tlb)
1594 struct svm_validate_context *ctx;
1595 unsigned long start, end, addr;
1596 struct kfd_process *p;
1601 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL);
1604 ctx->process = container_of(prange->svms, struct kfd_process, svms);
1605 ctx->prange = prange;
1608 if (gpuidx < MAX_GPU_INSTANCE) {
1609 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE);
1610 bitmap_set(ctx->bitmap, gpuidx, 1);
1611 } else if (ctx->process->xnack_enabled) {
1612 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
1614 /* If prefetch range to GPU, or GPU retry fault migrate range to
1615 * GPU, which has ACCESS attribute to the range, create mapping
1618 if (prange->actual_loc) {
1619 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process,
1620 prange->actual_loc);
1622 WARN_ONCE(1, "failed get device by id 0x%x\n",
1623 prange->actual_loc);
1627 if (test_bit(gpuidx, prange->bitmap_access))
1628 bitmap_set(ctx->bitmap, gpuidx, 1);
1632 * If prange is already mapped or with always mapped flag,
1633 * update mapping on GPUs with ACCESS attribute
1635 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1636 if (prange->mapped_to_gpu ||
1637 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)
1638 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE);
1641 bitmap_or(ctx->bitmap, prange->bitmap_access,
1642 prange->bitmap_aip, MAX_GPU_INSTANCE);
1645 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1650 if (prange->actual_loc && !prange->ttm_res) {
1651 /* This should never happen. actual_loc gets set by
1652 * svm_migrate_ram_to_vram after allocating a BO.
1654 WARN_ONCE(1, "VRAM BO missing during validation\n");
1659 svm_range_reserve_bos(ctx, intr);
1661 p = container_of(prange->svms, struct kfd_process, svms);
1662 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap,
1664 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) {
1665 if (kfd_svm_page_owner(p, idx) != owner) {
1671 start = prange->start << PAGE_SHIFT;
1672 end = (prange->last + 1) << PAGE_SHIFT;
1673 for (addr = start; !r && addr < end; ) {
1674 struct hmm_range *hmm_range;
1675 struct vm_area_struct *vma;
1676 unsigned long next = 0;
1677 unsigned long offset;
1678 unsigned long npages;
1681 vma = vma_lookup(mm, addr);
1683 readonly = !(vma->vm_flags & VM_WRITE);
1685 next = min(vma->vm_end, end);
1686 npages = (next - addr) >> PAGE_SHIFT;
1687 WRITE_ONCE(p->svms.faulting_task, current);
1688 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages,
1689 readonly, owner, NULL,
1691 WRITE_ONCE(p->svms.faulting_task, NULL);
1693 pr_debug("failed %d to get svm range pages\n", r);
1702 offset = (addr - start) >> PAGE_SHIFT;
1703 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages,
1704 hmm_range->hmm_pfns);
1706 pr_debug("failed %d to dma map range\n", r);
1709 svm_range_lock(prange);
1710 if (!r && amdgpu_hmm_range_get_pages_done(hmm_range)) {
1711 pr_debug("hmm update the range, need validate again\n");
1715 if (!r && !list_empty(&prange->child_list)) {
1716 pr_debug("range split by unmap in parallel, validate again\n");
1721 r = svm_range_map_to_gpus(prange, offset, npages, readonly,
1722 ctx->bitmap, wait, flush_tlb);
1724 if (!r && next == end)
1725 prange->mapped_to_gpu = true;
1727 svm_range_unlock(prange);
1732 svm_range_unreserve_bos(ctx);
1734 prange->validate_timestamp = ktime_get_boottime();
1743 * svm_range_list_lock_and_flush_work - flush pending deferred work
1745 * @svms: the svm range list
1746 * @mm: the mm structure
1748 * Context: Returns with mmap write lock held, pending deferred work flushed
1752 svm_range_list_lock_and_flush_work(struct svm_range_list *svms,
1753 struct mm_struct *mm)
1756 flush_work(&svms->deferred_list_work);
1757 mmap_write_lock(mm);
1759 if (list_empty(&svms->deferred_range_list))
1761 mmap_write_unlock(mm);
1762 pr_debug("retry flush\n");
1763 goto retry_flush_work;
1766 static void svm_range_restore_work(struct work_struct *work)
1768 struct delayed_work *dwork = to_delayed_work(work);
1769 struct amdkfd_process_info *process_info;
1770 struct svm_range_list *svms;
1771 struct svm_range *prange;
1772 struct kfd_process *p;
1773 struct mm_struct *mm;
1778 svms = container_of(dwork, struct svm_range_list, restore_work);
1779 evicted_ranges = atomic_read(&svms->evicted_ranges);
1780 if (!evicted_ranges)
1783 pr_debug("restore svm ranges\n");
1785 p = container_of(svms, struct kfd_process, svms);
1786 process_info = p->kgd_process_info;
1788 /* Keep mm reference when svm_range_validate_and_map ranges */
1789 mm = get_task_mm(p->lead_thread);
1791 pr_debug("svms 0x%p process mm gone\n", svms);
1795 mutex_lock(&process_info->lock);
1796 svm_range_list_lock_and_flush_work(svms, mm);
1797 mutex_lock(&svms->lock);
1799 evicted_ranges = atomic_read(&svms->evicted_ranges);
1801 list_for_each_entry(prange, &svms->list, list) {
1802 invalid = atomic_read(&prange->invalid);
1806 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n",
1807 prange->svms, prange, prange->start, prange->last,
1811 * If range is migrating, wait for migration is done.
1813 mutex_lock(&prange->migrate_mutex);
1815 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE,
1816 false, true, false);
1818 pr_debug("failed %d to map 0x%lx to gpus\n", r,
1821 mutex_unlock(&prange->migrate_mutex);
1823 goto out_reschedule;
1825 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid)
1826 goto out_reschedule;
1829 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) !=
1831 goto out_reschedule;
1835 r = kgd2kfd_resume_mm(mm);
1837 /* No recovery from this failure. Probably the CP is
1838 * hanging. No point trying again.
1840 pr_debug("failed %d to resume KFD\n", r);
1843 pr_debug("restore svm ranges successfully\n");
1846 mutex_unlock(&svms->lock);
1847 mmap_write_unlock(mm);
1848 mutex_unlock(&process_info->lock);
1850 /* If validation failed, reschedule another attempt */
1851 if (evicted_ranges) {
1852 pr_debug("reschedule to restore svm range\n");
1853 schedule_delayed_work(&svms->restore_work,
1854 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1856 kfd_smi_event_queue_restore_rescheduled(mm);
1862 * svm_range_evict - evict svm range
1863 * @prange: svm range structure
1864 * @mm: current process mm_struct
1865 * @start: starting process queue number
1866 * @last: last process queue number
1867 * @event: mmu notifier event when range is evicted or migrated
1869 * Stop all queues of the process to ensure GPU doesn't access the memory, then
1870 * return to let CPU evict the buffer and proceed CPU pagetable update.
1872 * Don't need use lock to sync cpu pagetable invalidation with GPU execution.
1873 * If invalidation happens while restore work is running, restore work will
1874 * restart to ensure to get the latest CPU pages mapping to GPU, then start
1878 svm_range_evict(struct svm_range *prange, struct mm_struct *mm,
1879 unsigned long start, unsigned long last,
1880 enum mmu_notifier_event event)
1882 struct svm_range_list *svms = prange->svms;
1883 struct svm_range *pchild;
1884 struct kfd_process *p;
1887 p = container_of(svms, struct kfd_process, svms);
1889 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
1890 svms, prange->start, prange->last, start, last);
1892 if (!p->xnack_enabled ||
1893 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) {
1895 bool mapped = prange->mapped_to_gpu;
1897 list_for_each_entry(pchild, &prange->child_list, child_list) {
1898 if (!pchild->mapped_to_gpu)
1901 mutex_lock_nested(&pchild->lock, 1);
1902 if (pchild->start <= last && pchild->last >= start) {
1903 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n",
1904 pchild->start, pchild->last);
1905 atomic_inc(&pchild->invalid);
1907 mutex_unlock(&pchild->lock);
1913 if (prange->start <= last && prange->last >= start)
1914 atomic_inc(&prange->invalid);
1916 evicted_ranges = atomic_inc_return(&svms->evicted_ranges);
1917 if (evicted_ranges != 1)
1920 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n",
1921 prange->svms, prange->start, prange->last);
1923 /* First eviction, stop the queues */
1924 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM);
1926 pr_debug("failed to quiesce KFD\n");
1928 pr_debug("schedule to restore svm %p ranges\n", svms);
1929 schedule_delayed_work(&svms->restore_work,
1930 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1935 if (event == MMU_NOTIFY_MIGRATE)
1936 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE;
1938 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY;
1940 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n",
1941 prange->svms, start, last);
1942 list_for_each_entry(pchild, &prange->child_list, child_list) {
1943 mutex_lock_nested(&pchild->lock, 1);
1944 s = max(start, pchild->start);
1945 l = min(last, pchild->last);
1947 svm_range_unmap_from_gpus(pchild, s, l, trigger);
1948 mutex_unlock(&pchild->lock);
1950 s = max(start, prange->start);
1951 l = min(last, prange->last);
1953 svm_range_unmap_from_gpus(prange, s, l, trigger);
1959 static struct svm_range *svm_range_clone(struct svm_range *old)
1961 struct svm_range *new;
1963 new = svm_range_new(old->svms, old->start, old->last, false);
1966 if (svm_range_copy_dma_addrs(new, old)) {
1967 svm_range_free(new, false);
1971 new->ttm_res = old->ttm_res;
1972 new->offset = old->offset;
1973 new->svm_bo = svm_range_bo_ref(old->svm_bo);
1974 spin_lock(&new->svm_bo->list_lock);
1975 list_add(&new->svm_bo_list, &new->svm_bo->range_list);
1976 spin_unlock(&new->svm_bo->list_lock);
1978 new->flags = old->flags;
1979 new->preferred_loc = old->preferred_loc;
1980 new->prefetch_loc = old->prefetch_loc;
1981 new->actual_loc = old->actual_loc;
1982 new->granularity = old->granularity;
1983 new->mapped_to_gpu = old->mapped_to_gpu;
1984 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
1985 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
1990 void svm_range_set_max_pages(struct amdgpu_device *adev)
1993 uint64_t pages, _pages;
1994 uint64_t min_pages = 0;
1997 for (i = 0; i < adev->kfd.dev->num_nodes; i++) {
1998 if (adev->kfd.dev->nodes[i]->xcp)
1999 id = adev->kfd.dev->nodes[i]->xcp->id;
2002 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17;
2003 pages = clamp(pages, 1ULL << 9, 1ULL << 18);
2004 pages = rounddown_pow_of_two(pages);
2005 min_pages = min_not_zero(min_pages, pages);
2009 max_pages = READ_ONCE(max_svm_range_pages);
2010 _pages = min_not_zero(max_pages, min_pages);
2011 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages);
2015 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last,
2016 uint64_t max_pages, struct list_head *insert_list,
2017 struct list_head *update_list)
2019 struct svm_range *prange;
2022 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n",
2023 max_pages, start, last);
2025 while (last >= start) {
2026 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1);
2028 prange = svm_range_new(svms, start, l, true);
2031 list_add(&prange->list, insert_list);
2032 list_add(&prange->update_list, update_list);
2040 * svm_range_add - add svm range and handle overlap
2041 * @p: the range add to this process svms
2042 * @start: page size aligned
2043 * @size: page size aligned
2044 * @nattr: number of attributes
2045 * @attrs: array of attributes
2046 * @update_list: output, the ranges need validate and update GPU mapping
2047 * @insert_list: output, the ranges need insert to svms
2048 * @remove_list: output, the ranges are replaced and need remove from svms
2050 * Check if the virtual address range has overlap with any existing ranges,
2051 * split partly overlapping ranges and add new ranges in the gaps. All changes
2052 * should be applied to the range_list and interval tree transactionally. If
2053 * any range split or allocation fails, the entire update fails. Therefore any
2054 * existing overlapping svm_ranges are cloned and the original svm_ranges left
2057 * If the transaction succeeds, the caller can update and insert clones and
2058 * new ranges, then free the originals.
2060 * Otherwise the caller can free the clones and new ranges, while the old
2061 * svm_ranges remain unchanged.
2063 * Context: Process context, caller must hold svms->lock
2066 * 0 - OK, otherwise error code
2069 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size,
2070 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
2071 struct list_head *update_list, struct list_head *insert_list,
2072 struct list_head *remove_list)
2074 unsigned long last = start + size - 1UL;
2075 struct svm_range_list *svms = &p->svms;
2076 struct interval_tree_node *node;
2077 struct svm_range *prange;
2078 struct svm_range *tmp;
2079 struct list_head new_list;
2082 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last);
2084 INIT_LIST_HEAD(update_list);
2085 INIT_LIST_HEAD(insert_list);
2086 INIT_LIST_HEAD(remove_list);
2087 INIT_LIST_HEAD(&new_list);
2089 node = interval_tree_iter_first(&svms->objects, start, last);
2091 struct interval_tree_node *next;
2092 unsigned long next_start;
2094 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start,
2097 prange = container_of(node, struct svm_range, it_node);
2098 next = interval_tree_iter_next(node, start, last);
2099 next_start = min(node->last, last) + 1;
2101 if (svm_range_is_same_attrs(p, prange, nattr, attrs) &&
2102 prange->mapped_to_gpu) {
2104 } else if (node->start < start || node->last > last) {
2105 /* node intersects the update range and its attributes
2106 * will change. Clone and split it, apply updates only
2107 * to the overlapping part
2109 struct svm_range *old = prange;
2111 prange = svm_range_clone(old);
2117 list_add(&old->update_list, remove_list);
2118 list_add(&prange->list, insert_list);
2119 list_add(&prange->update_list, update_list);
2121 if (node->start < start) {
2122 pr_debug("change old range start\n");
2123 r = svm_range_split_head(prange, start,
2128 if (node->last > last) {
2129 pr_debug("change old range last\n");
2130 r = svm_range_split_tail(prange, last,
2136 /* The node is contained within start..last,
2139 list_add(&prange->update_list, update_list);
2142 /* insert a new node if needed */
2143 if (node->start > start) {
2144 r = svm_range_split_new(svms, start, node->start - 1,
2145 READ_ONCE(max_svm_range_pages),
2146 &new_list, update_list);
2155 /* add a final range at the end if needed */
2157 r = svm_range_split_new(svms, start, last,
2158 READ_ONCE(max_svm_range_pages),
2159 &new_list, update_list);
2163 list_for_each_entry_safe(prange, tmp, insert_list, list)
2164 svm_range_free(prange, false);
2165 list_for_each_entry_safe(prange, tmp, &new_list, list)
2166 svm_range_free(prange, true);
2168 list_splice(&new_list, insert_list);
2175 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm,
2176 struct svm_range *prange)
2178 unsigned long start;
2181 start = prange->notifier.interval_tree.start >> PAGE_SHIFT;
2182 last = prange->notifier.interval_tree.last >> PAGE_SHIFT;
2184 if (prange->start == start && prange->last == last)
2187 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
2188 prange->svms, prange, start, last, prange->start,
2191 if (start != 0 && last != 0) {
2192 interval_tree_remove(&prange->it_node, &prange->svms->objects);
2193 svm_range_remove_notifier(prange);
2195 prange->it_node.start = prange->start;
2196 prange->it_node.last = prange->last;
2198 interval_tree_insert(&prange->it_node, &prange->svms->objects);
2199 svm_range_add_notifier_locked(mm, prange);
2203 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange,
2204 struct mm_struct *mm)
2206 switch (prange->work_item.op) {
2208 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2209 svms, prange, prange->start, prange->last);
2211 case SVM_OP_UNMAP_RANGE:
2212 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2213 svms, prange, prange->start, prange->last);
2214 svm_range_unlink(prange);
2215 svm_range_remove_notifier(prange);
2216 svm_range_free(prange, true);
2218 case SVM_OP_UPDATE_RANGE_NOTIFIER:
2219 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2220 svms, prange, prange->start, prange->last);
2221 svm_range_update_notifier_and_interval_tree(mm, prange);
2223 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP:
2224 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2225 svms, prange, prange->start, prange->last);
2226 svm_range_update_notifier_and_interval_tree(mm, prange);
2227 /* TODO: implement deferred validation and mapping */
2229 case SVM_OP_ADD_RANGE:
2230 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange,
2231 prange->start, prange->last);
2232 svm_range_add_to_svms(prange);
2233 svm_range_add_notifier_locked(mm, prange);
2235 case SVM_OP_ADD_RANGE_AND_MAP:
2236 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms,
2237 prange, prange->start, prange->last);
2238 svm_range_add_to_svms(prange);
2239 svm_range_add_notifier_locked(mm, prange);
2240 /* TODO: implement deferred validation and mapping */
2243 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange,
2244 prange->work_item.op);
2248 static void svm_range_drain_retry_fault(struct svm_range_list *svms)
2250 struct kfd_process_device *pdd;
2251 struct kfd_process *p;
2255 p = container_of(svms, struct kfd_process, svms);
2258 drain = atomic_read(&svms->drain_pagefaults);
2262 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) {
2267 pr_debug("drain retry fault gpu %d svms %p\n", i, svms);
2269 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2270 pdd->dev->adev->irq.retry_cam_enabled ?
2271 &pdd->dev->adev->irq.ih :
2272 &pdd->dev->adev->irq.ih1);
2274 if (pdd->dev->adev->irq.retry_cam_enabled)
2275 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2276 &pdd->dev->adev->irq.ih_soft);
2279 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms);
2281 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain)
2285 static void svm_range_deferred_list_work(struct work_struct *work)
2287 struct svm_range_list *svms;
2288 struct svm_range *prange;
2289 struct mm_struct *mm;
2291 svms = container_of(work, struct svm_range_list, deferred_list_work);
2292 pr_debug("enter svms 0x%p\n", svms);
2294 spin_lock(&svms->deferred_list_lock);
2295 while (!list_empty(&svms->deferred_range_list)) {
2296 prange = list_first_entry(&svms->deferred_range_list,
2297 struct svm_range, deferred_list);
2298 spin_unlock(&svms->deferred_list_lock);
2300 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange,
2301 prange->start, prange->last, prange->work_item.op);
2303 mm = prange->work_item.mm;
2305 mmap_write_lock(mm);
2307 /* Checking for the need to drain retry faults must be inside
2308 * mmap write lock to serialize with munmap notifiers.
2310 if (unlikely(atomic_read(&svms->drain_pagefaults))) {
2311 mmap_write_unlock(mm);
2312 svm_range_drain_retry_fault(svms);
2316 /* Remove from deferred_list must be inside mmap write lock, for
2318 * 1. unmap_from_cpu may change work_item.op and add the range
2319 * to deferred_list again, cause use after free bug.
2320 * 2. svm_range_list_lock_and_flush_work may hold mmap write
2321 * lock and continue because deferred_list is empty, but
2322 * deferred_list work is actually waiting for mmap lock.
2324 spin_lock(&svms->deferred_list_lock);
2325 list_del_init(&prange->deferred_list);
2326 spin_unlock(&svms->deferred_list_lock);
2328 mutex_lock(&svms->lock);
2329 mutex_lock(&prange->migrate_mutex);
2330 while (!list_empty(&prange->child_list)) {
2331 struct svm_range *pchild;
2333 pchild = list_first_entry(&prange->child_list,
2334 struct svm_range, child_list);
2335 pr_debug("child prange 0x%p op %d\n", pchild,
2336 pchild->work_item.op);
2337 list_del_init(&pchild->child_list);
2338 svm_range_handle_list_op(svms, pchild, mm);
2340 mutex_unlock(&prange->migrate_mutex);
2342 svm_range_handle_list_op(svms, prange, mm);
2343 mutex_unlock(&svms->lock);
2344 mmap_write_unlock(mm);
2346 /* Pairs with mmget in svm_range_add_list_work. If dropping the
2347 * last mm refcount, schedule release work to avoid circular locking
2351 spin_lock(&svms->deferred_list_lock);
2353 spin_unlock(&svms->deferred_list_lock);
2354 pr_debug("exit svms 0x%p\n", svms);
2358 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange,
2359 struct mm_struct *mm, enum svm_work_list_ops op)
2361 spin_lock(&svms->deferred_list_lock);
2362 /* if prange is on the deferred list */
2363 if (!list_empty(&prange->deferred_list)) {
2364 pr_debug("update exist prange 0x%p work op %d\n", prange, op);
2365 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n");
2366 if (op != SVM_OP_NULL &&
2367 prange->work_item.op != SVM_OP_UNMAP_RANGE)
2368 prange->work_item.op = op;
2370 prange->work_item.op = op;
2372 /* Pairs with mmput in deferred_list_work */
2374 prange->work_item.mm = mm;
2375 list_add_tail(&prange->deferred_list,
2376 &prange->svms->deferred_range_list);
2377 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n",
2378 prange, prange->start, prange->last, op);
2380 spin_unlock(&svms->deferred_list_lock);
2383 void schedule_deferred_list_work(struct svm_range_list *svms)
2385 spin_lock(&svms->deferred_list_lock);
2386 if (!list_empty(&svms->deferred_range_list))
2387 schedule_work(&svms->deferred_list_work);
2388 spin_unlock(&svms->deferred_list_lock);
2392 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent,
2393 struct svm_range *prange, unsigned long start,
2396 struct svm_range *head;
2397 struct svm_range *tail;
2399 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2400 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange,
2401 prange->start, prange->last);
2404 if (start > prange->last || last < prange->start)
2407 head = tail = prange;
2408 if (start > prange->start)
2409 svm_range_split(prange, prange->start, start - 1, &tail);
2410 if (last < tail->last)
2411 svm_range_split(tail, last + 1, tail->last, &head);
2413 if (head != prange && tail != prange) {
2414 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2415 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
2416 } else if (tail != prange) {
2417 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE);
2418 } else if (head != prange) {
2419 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2420 } else if (parent != prange) {
2421 prange->work_item.op = SVM_OP_UNMAP_RANGE;
2426 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange,
2427 unsigned long start, unsigned long last)
2429 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU;
2430 struct svm_range_list *svms;
2431 struct svm_range *pchild;
2432 struct kfd_process *p;
2436 p = kfd_lookup_process_by_mm(mm);
2441 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms,
2442 prange, prange->start, prange->last, start, last);
2444 /* Make sure pending page faults are drained in the deferred worker
2445 * before the range is freed to avoid straggler interrupts on
2446 * unmapped memory causing "phantom faults".
2448 atomic_inc(&svms->drain_pagefaults);
2450 unmap_parent = start <= prange->start && last >= prange->last;
2452 list_for_each_entry(pchild, &prange->child_list, child_list) {
2453 mutex_lock_nested(&pchild->lock, 1);
2454 s = max(start, pchild->start);
2455 l = min(last, pchild->last);
2457 svm_range_unmap_from_gpus(pchild, s, l, trigger);
2458 svm_range_unmap_split(mm, prange, pchild, start, last);
2459 mutex_unlock(&pchild->lock);
2461 s = max(start, prange->start);
2462 l = min(last, prange->last);
2464 svm_range_unmap_from_gpus(prange, s, l, trigger);
2465 svm_range_unmap_split(mm, prange, prange, start, last);
2468 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE);
2470 svm_range_add_list_work(svms, prange, mm,
2471 SVM_OP_UPDATE_RANGE_NOTIFIER);
2472 schedule_deferred_list_work(svms);
2474 kfd_unref_process(p);
2478 * svm_range_cpu_invalidate_pagetables - interval notifier callback
2479 * @mni: mmu_interval_notifier struct
2480 * @range: mmu_notifier_range struct
2481 * @cur_seq: value to pass to mmu_interval_set_seq()
2483 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it
2484 * is from migration, or CPU page invalidation callback.
2486 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed
2487 * work thread, and split prange if only part of prange is unmapped.
2489 * For invalidation event, if GPU retry fault is not enabled, evict the queues,
2490 * then schedule svm_range_restore_work to update GPU mapping and resume queues.
2491 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will
2492 * update GPU mapping to recover.
2494 * Context: mmap lock, notifier_invalidate_start lock are held
2495 * for invalidate event, prange lock is held if this is from migration
2498 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
2499 const struct mmu_notifier_range *range,
2500 unsigned long cur_seq)
2502 struct svm_range *prange;
2503 unsigned long start;
2506 if (range->event == MMU_NOTIFY_RELEASE)
2508 if (!mmget_not_zero(mni->mm))
2511 start = mni->interval_tree.start;
2512 last = mni->interval_tree.last;
2513 start = max(start, range->start) >> PAGE_SHIFT;
2514 last = min(last, range->end - 1) >> PAGE_SHIFT;
2515 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n",
2516 start, last, range->start >> PAGE_SHIFT,
2517 (range->end - 1) >> PAGE_SHIFT,
2518 mni->interval_tree.start >> PAGE_SHIFT,
2519 mni->interval_tree.last >> PAGE_SHIFT, range->event);
2521 prange = container_of(mni, struct svm_range, notifier);
2523 svm_range_lock(prange);
2524 mmu_interval_set_seq(mni, cur_seq);
2526 switch (range->event) {
2527 case MMU_NOTIFY_UNMAP:
2528 svm_range_unmap_from_cpu(mni->mm, prange, start, last);
2531 svm_range_evict(prange, mni->mm, start, last, range->event);
2535 svm_range_unlock(prange);
2542 * svm_range_from_addr - find svm range from fault address
2543 * @svms: svm range list header
2544 * @addr: address to search range interval tree, in pages
2545 * @parent: parent range if range is on child list
2547 * Context: The caller must hold svms->lock
2549 * Return: the svm_range found or NULL
2552 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr,
2553 struct svm_range **parent)
2555 struct interval_tree_node *node;
2556 struct svm_range *prange;
2557 struct svm_range *pchild;
2559 node = interval_tree_iter_first(&svms->objects, addr, addr);
2563 prange = container_of(node, struct svm_range, it_node);
2564 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n",
2565 addr, prange->start, prange->last, node->start, node->last);
2567 if (addr >= prange->start && addr <= prange->last) {
2572 list_for_each_entry(pchild, &prange->child_list, child_list)
2573 if (addr >= pchild->start && addr <= pchild->last) {
2574 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n",
2575 addr, pchild->start, pchild->last);
2584 /* svm_range_best_restore_location - decide the best fault restore location
2585 * @prange: svm range structure
2586 * @adev: the GPU on which vm fault happened
2588 * This is only called when xnack is on, to decide the best location to restore
2589 * the range mapping after GPU vm fault. Caller uses the best location to do
2590 * migration if actual loc is not best location, then update GPU page table
2591 * mapping to the best location.
2593 * If the preferred loc is accessible by faulting GPU, use preferred loc.
2594 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu
2595 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then
2596 * if range actual loc is cpu, best_loc is cpu
2597 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is
2599 * Otherwise, GPU no access, best_loc is -1.
2602 * -1 means vm fault GPU no access
2603 * 0 for CPU or GPU id
2606 svm_range_best_restore_location(struct svm_range *prange,
2607 struct kfd_node *node,
2610 struct kfd_node *bo_node, *preferred_node;
2611 struct kfd_process *p;
2615 p = container_of(prange->svms, struct kfd_process, svms);
2617 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx);
2619 pr_debug("failed to get gpuid from kgd\n");
2623 if (node->adev->gmc.is_app_apu)
2626 if (prange->preferred_loc == gpuid ||
2627 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) {
2628 return prange->preferred_loc;
2629 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
2630 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc);
2631 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node))
2632 return prange->preferred_loc;
2636 if (test_bit(*gpuidx, prange->bitmap_access))
2639 if (test_bit(*gpuidx, prange->bitmap_aip)) {
2640 if (!prange->actual_loc)
2643 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc);
2644 if (bo_node && svm_nodes_in_same_hive(node, bo_node))
2645 return prange->actual_loc;
2654 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr,
2655 unsigned long *start, unsigned long *last,
2656 bool *is_heap_stack)
2658 struct vm_area_struct *vma;
2659 struct interval_tree_node *node;
2660 unsigned long start_limit, end_limit;
2662 vma = vma_lookup(p->mm, addr << PAGE_SHIFT);
2664 pr_debug("VMA does not exist in address [0x%llx]\n", addr);
2668 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma);
2670 start_limit = max(vma->vm_start >> PAGE_SHIFT,
2671 (unsigned long)ALIGN_DOWN(addr, 2UL << 8));
2672 end_limit = min(vma->vm_end >> PAGE_SHIFT,
2673 (unsigned long)ALIGN(addr + 1, 2UL << 8));
2674 /* First range that starts after the fault address */
2675 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX);
2677 end_limit = min(end_limit, node->start);
2678 /* Last range that ends before the fault address */
2679 node = container_of(rb_prev(&node->rb),
2680 struct interval_tree_node, rb);
2682 /* Last range must end before addr because
2683 * there was no range after addr
2685 node = container_of(rb_last(&p->svms.objects.rb_root),
2686 struct interval_tree_node, rb);
2689 if (node->last >= addr) {
2690 WARN(1, "Overlap with prev node and page fault addr\n");
2693 start_limit = max(start_limit, node->last + 1);
2696 *start = start_limit;
2697 *last = end_limit - 1;
2699 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n",
2700 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT,
2701 *start, *last, *is_heap_stack);
2707 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last,
2708 uint64_t *bo_s, uint64_t *bo_l)
2710 struct amdgpu_bo_va_mapping *mapping;
2711 struct interval_tree_node *node;
2712 struct amdgpu_bo *bo = NULL;
2713 unsigned long userptr;
2717 for (i = 0; i < p->n_pdds; i++) {
2718 struct amdgpu_vm *vm;
2720 if (!p->pdds[i]->drm_priv)
2723 vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
2724 r = amdgpu_bo_reserve(vm->root.bo, false);
2728 /* Check userptr by searching entire vm->va interval tree */
2729 node = interval_tree_iter_first(&vm->va, 0, ~0ULL);
2731 mapping = container_of((struct rb_node *)node,
2732 struct amdgpu_bo_va_mapping, rb);
2733 bo = mapping->bo_va->base.bo;
2735 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm,
2736 start << PAGE_SHIFT,
2739 node = interval_tree_iter_next(node, 0, ~0ULL);
2743 pr_debug("[0x%llx 0x%llx] already userptr mapped\n",
2746 *bo_s = userptr >> PAGE_SHIFT;
2747 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1;
2749 amdgpu_bo_unreserve(vm->root.bo);
2752 amdgpu_bo_unreserve(vm->root.bo);
2758 svm_range *svm_range_create_unregistered_range(struct kfd_node *node,
2759 struct kfd_process *p,
2760 struct mm_struct *mm,
2763 struct svm_range *prange = NULL;
2764 unsigned long start, last;
2765 uint32_t gpuid, gpuidx;
2771 if (svm_range_get_range_boundaries(p, addr, &start, &last,
2775 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l);
2776 if (r != -EADDRINUSE)
2777 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l);
2779 if (r == -EADDRINUSE) {
2780 if (addr >= bo_s && addr <= bo_l)
2783 /* Create one page svm range if 2MB range overlapping */
2788 prange = svm_range_new(&p->svms, start, last, true);
2790 pr_debug("Failed to create prange in address [0x%llx]\n", addr);
2793 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) {
2794 pr_debug("failed to get gpuid from kgd\n");
2795 svm_range_free(prange, true);
2800 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM;
2802 svm_range_add_to_svms(prange);
2803 svm_range_add_notifier_locked(mm, prange);
2808 /* svm_range_skip_recover - decide if prange can be recovered
2809 * @prange: svm range structure
2811 * GPU vm retry fault handle skip recover the range for cases:
2812 * 1. prange is on deferred list to be removed after unmap, it is stale fault,
2813 * deferred list work will drain the stale fault before free the prange.
2814 * 2. prange is on deferred list to add interval notifier after split, or
2815 * 3. prange is child range, it is split from parent prange, recover later
2816 * after interval notifier is added.
2818 * Return: true to skip recover, false to recover
2820 static bool svm_range_skip_recover(struct svm_range *prange)
2822 struct svm_range_list *svms = prange->svms;
2824 spin_lock(&svms->deferred_list_lock);
2825 if (list_empty(&prange->deferred_list) &&
2826 list_empty(&prange->child_list)) {
2827 spin_unlock(&svms->deferred_list_lock);
2830 spin_unlock(&svms->deferred_list_lock);
2832 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2833 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n",
2834 svms, prange, prange->start, prange->last);
2837 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP ||
2838 prange->work_item.op == SVM_OP_ADD_RANGE) {
2839 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n",
2840 svms, prange, prange->start, prange->last);
2847 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p,
2850 struct kfd_process_device *pdd;
2852 /* fault is on different page of same range
2853 * or fault is skipped to recover later
2854 * or fault is on invalid virtual address
2856 if (gpuidx == MAX_GPU_INSTANCE) {
2860 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx);
2865 /* fault is recovered
2866 * or fault cannot recover because GPU no access on the range
2868 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
2870 WRITE_ONCE(pdd->faults, pdd->faults + 1);
2874 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault)
2876 unsigned long requested = VM_READ;
2879 requested |= VM_WRITE;
2881 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested,
2883 return (vma->vm_flags & requested) == requested;
2887 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid,
2888 uint32_t vmid, uint32_t node_id,
2889 uint64_t addr, bool write_fault)
2891 struct mm_struct *mm = NULL;
2892 struct svm_range_list *svms;
2893 struct svm_range *prange;
2894 struct kfd_process *p;
2895 ktime_t timestamp = ktime_get_boottime();
2896 struct kfd_node *node;
2898 int32_t gpuidx = MAX_GPU_INSTANCE;
2899 bool write_locked = false;
2900 struct vm_area_struct *vma;
2901 bool migration = false;
2904 if (!KFD_IS_SVM_API_SUPPORTED(adev)) {
2905 pr_debug("device does not support SVM\n");
2909 p = kfd_lookup_process_by_pasid(pasid);
2911 pr_debug("kfd process not founded pasid 0x%x\n", pasid);
2916 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr);
2918 if (atomic_read(&svms->drain_pagefaults)) {
2919 pr_debug("draining retry fault, drop fault 0x%llx\n", addr);
2924 if (!p->xnack_enabled) {
2925 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid);
2930 /* p->lead_thread is available as kfd_process_wq_release flush the work
2931 * before releasing task ref.
2933 mm = get_task_mm(p->lead_thread);
2935 pr_debug("svms 0x%p failed to get mm\n", svms);
2940 node = kfd_node_by_irq_ids(adev, node_id, vmid);
2942 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id,
2949 mutex_lock(&svms->lock);
2950 prange = svm_range_from_addr(svms, addr, NULL);
2952 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n",
2954 if (!write_locked) {
2955 /* Need the write lock to create new range with MMU notifier.
2956 * Also flush pending deferred work to make sure the interval
2957 * tree is up to date before we add a new range
2959 mutex_unlock(&svms->lock);
2960 mmap_read_unlock(mm);
2961 mmap_write_lock(mm);
2962 write_locked = true;
2963 goto retry_write_locked;
2965 prange = svm_range_create_unregistered_range(node, p, mm, addr);
2967 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n",
2969 mmap_write_downgrade(mm);
2971 goto out_unlock_svms;
2975 mmap_write_downgrade(mm);
2977 mutex_lock(&prange->migrate_mutex);
2979 if (svm_range_skip_recover(prange)) {
2980 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
2982 goto out_unlock_range;
2985 /* skip duplicate vm fault on different pages of same range */
2986 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp,
2987 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) {
2988 pr_debug("svms 0x%p [0x%lx %lx] already restored\n",
2989 svms, prange->start, prange->last);
2991 goto out_unlock_range;
2994 /* __do_munmap removed VMA, return success as we are handling stale
2997 vma = vma_lookup(mm, addr << PAGE_SHIFT);
2999 pr_debug("address 0x%llx VMA is removed\n", addr);
3001 goto out_unlock_range;
3004 if (!svm_fault_allowed(vma, write_fault)) {
3005 pr_debug("fault addr 0x%llx no %s permission\n", addr,
3006 write_fault ? "write" : "read");
3008 goto out_unlock_range;
3011 best_loc = svm_range_best_restore_location(prange, node, &gpuidx);
3012 if (best_loc == -1) {
3013 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n",
3014 svms, prange->start, prange->last);
3016 goto out_unlock_range;
3019 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n",
3020 svms, prange->start, prange->last, best_loc,
3021 prange->actual_loc);
3023 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr,
3024 write_fault, timestamp);
3026 if (prange->actual_loc != best_loc) {
3029 r = svm_migrate_to_vram(prange, best_loc, mm,
3030 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU);
3032 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n",
3034 /* Fallback to system memory if migration to
3037 if (prange->actual_loc)
3038 r = svm_migrate_vram_to_ram(prange, mm,
3039 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU,
3045 r = svm_migrate_vram_to_ram(prange, mm,
3046 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU,
3050 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n",
3051 r, svms, prange->start, prange->last);
3052 goto out_unlock_range;
3056 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false);
3058 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n",
3059 r, svms, prange->start, prange->last);
3061 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr,
3065 mutex_unlock(&prange->migrate_mutex);
3067 mutex_unlock(&svms->lock);
3068 mmap_read_unlock(mm);
3070 svm_range_count_fault(node, p, gpuidx);
3074 kfd_unref_process(p);
3077 pr_debug("recover vm fault later\n");
3078 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
3085 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled)
3087 struct svm_range *prange, *pchild;
3088 uint64_t reserved_size = 0;
3092 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled);
3094 mutex_lock(&p->svms.lock);
3096 list_for_each_entry(prange, &p->svms.list, list) {
3097 svm_range_lock(prange);
3098 list_for_each_entry(pchild, &prange->child_list, child_list) {
3099 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT;
3100 if (xnack_enabled) {
3101 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3102 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3104 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3105 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3108 reserved_size += size;
3112 size = (prange->last - prange->start + 1) << PAGE_SHIFT;
3113 if (xnack_enabled) {
3114 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3115 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3117 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3118 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3121 reserved_size += size;
3124 svm_range_unlock(prange);
3130 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size,
3131 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3133 /* Change xnack mode must be inside svms lock, to avoid race with
3134 * svm_range_deferred_list_work unreserve memory in parallel.
3136 p->xnack_enabled = xnack_enabled;
3138 mutex_unlock(&p->svms.lock);
3142 void svm_range_list_fini(struct kfd_process *p)
3144 struct svm_range *prange;
3145 struct svm_range *next;
3147 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms);
3149 cancel_delayed_work_sync(&p->svms.restore_work);
3151 /* Ensure list work is finished before process is destroyed */
3152 flush_work(&p->svms.deferred_list_work);
3155 * Ensure no retry fault comes in afterwards, as page fault handler will
3156 * not find kfd process and take mm lock to recover fault.
3158 atomic_inc(&p->svms.drain_pagefaults);
3159 svm_range_drain_retry_fault(&p->svms);
3161 list_for_each_entry_safe(prange, next, &p->svms.list, list) {
3162 svm_range_unlink(prange);
3163 svm_range_remove_notifier(prange);
3164 svm_range_free(prange, true);
3167 mutex_destroy(&p->svms.lock);
3169 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms);
3172 int svm_range_list_init(struct kfd_process *p)
3174 struct svm_range_list *svms = &p->svms;
3177 svms->objects = RB_ROOT_CACHED;
3178 mutex_init(&svms->lock);
3179 INIT_LIST_HEAD(&svms->list);
3180 atomic_set(&svms->evicted_ranges, 0);
3181 atomic_set(&svms->drain_pagefaults, 0);
3182 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work);
3183 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work);
3184 INIT_LIST_HEAD(&svms->deferred_range_list);
3185 INIT_LIST_HEAD(&svms->criu_svm_metadata_list);
3186 spin_lock_init(&svms->deferred_list_lock);
3188 for (i = 0; i < p->n_pdds; i++)
3189 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev))
3190 bitmap_set(svms->bitmap_supported, i, 1);
3196 * svm_range_check_vm - check if virtual address range mapped already
3197 * @p: current kfd_process
3198 * @start: range start address, in pages
3199 * @last: range last address, in pages
3200 * @bo_s: mapping start address in pages if address range already mapped
3201 * @bo_l: mapping last address in pages if address range already mapped
3203 * The purpose is to avoid virtual address ranges already allocated by
3204 * kfd_ioctl_alloc_memory_of_gpu ioctl.
3205 * It looks for each pdd in the kfd_process.
3207 * Context: Process context
3209 * Return 0 - OK, if the range is not mapped.
3210 * Otherwise error code:
3211 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu
3212 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by
3213 * a signal. Release all buffer reservations and return to user-space.
3216 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
3217 uint64_t *bo_s, uint64_t *bo_l)
3219 struct amdgpu_bo_va_mapping *mapping;
3220 struct interval_tree_node *node;
3224 for (i = 0; i < p->n_pdds; i++) {
3225 struct amdgpu_vm *vm;
3227 if (!p->pdds[i]->drm_priv)
3230 vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
3231 r = amdgpu_bo_reserve(vm->root.bo, false);
3235 node = interval_tree_iter_first(&vm->va, start, last);
3237 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n",
3239 mapping = container_of((struct rb_node *)node,
3240 struct amdgpu_bo_va_mapping, rb);
3242 *bo_s = mapping->start;
3243 *bo_l = mapping->last;
3245 amdgpu_bo_unreserve(vm->root.bo);
3248 amdgpu_bo_unreserve(vm->root.bo);
3255 * svm_range_is_valid - check if virtual address range is valid
3256 * @p: current kfd_process
3257 * @start: range start address, in pages
3258 * @size: range size, in pages
3260 * Valid virtual address range means it belongs to one or more VMAs
3262 * Context: Process context
3265 * 0 - OK, otherwise error code
3268 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size)
3270 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP;
3271 struct vm_area_struct *vma;
3273 unsigned long start_unchg = start;
3275 start <<= PAGE_SHIFT;
3276 end = start + (size << PAGE_SHIFT);
3278 vma = vma_lookup(p->mm, start);
3279 if (!vma || (vma->vm_flags & device_vma))
3281 start = min(end, vma->vm_end);
3282 } while (start < end);
3284 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL,
3289 * svm_range_best_prefetch_location - decide the best prefetch location
3290 * @prange: svm range structure
3293 * If range map to single GPU, the best prefetch location is prefetch_loc, which
3294 * can be CPU or GPU.
3296 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on
3297 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise
3298 * the best prefetch location is always CPU, because GPU can not have coherent
3299 * mapping VRAM of other GPUs even with large-BAR PCIe connection.
3302 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is
3303 * prefetch_loc, other GPU access will generate vm fault and trigger migration.
3305 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same
3306 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best
3307 * prefetch location is always CPU.
3309 * Context: Process context
3312 * 0 for CPU or GPU id
3315 svm_range_best_prefetch_location(struct svm_range *prange)
3317 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
3318 uint32_t best_loc = prange->prefetch_loc;
3319 struct kfd_process_device *pdd;
3320 struct kfd_node *bo_node;
3321 struct kfd_process *p;
3324 p = container_of(prange->svms, struct kfd_process, svms);
3326 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED)
3329 bo_node = svm_range_get_node_by_id(prange, best_loc);
3331 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc);
3336 if (bo_node->adev->gmc.is_app_apu) {
3341 if (p->xnack_enabled)
3342 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
3344 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
3347 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
3348 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
3350 pr_debug("failed to get device by idx 0x%x\n", gpuidx);
3354 if (pdd->dev->adev == bo_node->adev)
3357 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) {
3364 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n",
3365 p->xnack_enabled, &p->svms, prange->start, prange->last,
3371 /* svm_range_trigger_migration - start page migration if prefetch loc changed
3372 * @mm: current process mm_struct
3373 * @prange: svm range structure
3374 * @migrated: output, true if migration is triggered
3376 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range
3378 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range
3381 * If GPU vm fault retry is not enabled, migration interact with MMU notifier
3383 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict
3384 * stops all queues, schedule restore work
3385 * 2. svm_range_restore_work wait for migration is done by
3386 * a. svm_range_validate_vram takes prange->migrate_mutex
3387 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns
3388 * 3. restore work update mappings of GPU, resume all queues.
3390 * Context: Process context
3393 * 0 - OK, otherwise - error code of migration
3396 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange,
3403 best_loc = svm_range_best_prefetch_location(prange);
3405 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3406 best_loc == prange->actual_loc)
3410 r = svm_migrate_vram_to_ram(prange, mm,
3411 KFD_MIGRATE_TRIGGER_PREFETCH, NULL);
3416 r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH);
3422 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence)
3424 /* Dereferencing fence->svm_bo is safe here because the fence hasn't
3425 * signaled yet and we're under the protection of the fence->lock.
3426 * After the fence is signaled in svm_range_bo_release, we cannot get
3429 * Reference is dropped in svm_range_evict_svm_bo_worker.
3431 if (svm_bo_ref_unless_zero(fence->svm_bo)) {
3432 WRITE_ONCE(fence->svm_bo->evicting, 1);
3433 schedule_work(&fence->svm_bo->eviction_work);
3439 static void svm_range_evict_svm_bo_worker(struct work_struct *work)
3441 struct svm_range_bo *svm_bo;
3442 struct mm_struct *mm;
3445 svm_bo = container_of(work, struct svm_range_bo, eviction_work);
3447 if (mmget_not_zero(svm_bo->eviction_fence->mm)) {
3448 mm = svm_bo->eviction_fence->mm;
3450 svm_range_bo_unref(svm_bo);
3455 spin_lock(&svm_bo->list_lock);
3456 while (!list_empty(&svm_bo->range_list) && !r) {
3457 struct svm_range *prange =
3458 list_first_entry(&svm_bo->range_list,
3459 struct svm_range, svm_bo_list);
3462 list_del_init(&prange->svm_bo_list);
3463 spin_unlock(&svm_bo->list_lock);
3465 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
3466 prange->start, prange->last);
3468 mutex_lock(&prange->migrate_mutex);
3470 r = svm_migrate_vram_to_ram(prange, mm,
3471 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL);
3472 } while (!r && prange->actual_loc && --retries);
3474 if (!r && prange->actual_loc)
3475 pr_info_once("Migration failed during eviction");
3477 if (!prange->actual_loc) {
3478 mutex_lock(&prange->lock);
3479 prange->svm_bo = NULL;
3480 mutex_unlock(&prange->lock);
3482 mutex_unlock(&prange->migrate_mutex);
3484 spin_lock(&svm_bo->list_lock);
3486 spin_unlock(&svm_bo->list_lock);
3487 mmap_read_unlock(mm);
3490 dma_fence_signal(&svm_bo->eviction_fence->base);
3492 /* This is the last reference to svm_bo, after svm_range_vram_node_free
3493 * has been called in svm_migrate_vram_to_ram
3495 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n");
3496 svm_range_bo_unref(svm_bo);
3500 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm,
3501 uint64_t start, uint64_t size, uint32_t nattr,
3502 struct kfd_ioctl_svm_attribute *attrs)
3504 struct amdkfd_process_info *process_info = p->kgd_process_info;
3505 struct list_head update_list;
3506 struct list_head insert_list;
3507 struct list_head remove_list;
3508 struct svm_range_list *svms;
3509 struct svm_range *prange;
3510 struct svm_range *next;
3511 bool update_mapping = false;
3515 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n",
3516 p->pasid, &p->svms, start, start + size - 1, size);
3518 r = svm_range_check_attr(p, nattr, attrs);
3524 mutex_lock(&process_info->lock);
3526 svm_range_list_lock_and_flush_work(svms, mm);
3528 r = svm_range_is_valid(p, start, size);
3530 pr_debug("invalid range r=%d\n", r);
3531 mmap_write_unlock(mm);
3535 mutex_lock(&svms->lock);
3537 /* Add new range and split existing ranges as needed */
3538 r = svm_range_add(p, start, size, nattr, attrs, &update_list,
3539 &insert_list, &remove_list);
3541 mutex_unlock(&svms->lock);
3542 mmap_write_unlock(mm);
3545 /* Apply changes as a transaction */
3546 list_for_each_entry_safe(prange, next, &insert_list, list) {
3547 svm_range_add_to_svms(prange);
3548 svm_range_add_notifier_locked(mm, prange);
3550 list_for_each_entry(prange, &update_list, update_list) {
3551 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping);
3552 /* TODO: unmap ranges from GPU that lost access */
3554 list_for_each_entry_safe(prange, next, &remove_list, update_list) {
3555 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n",
3556 prange->svms, prange, prange->start,
3558 svm_range_unlink(prange);
3559 svm_range_remove_notifier(prange);
3560 svm_range_free(prange, false);
3563 mmap_write_downgrade(mm);
3564 /* Trigger migrations and revalidate and map to GPUs as needed. If
3565 * this fails we may be left with partially completed actions. There
3566 * is no clean way of rolling back to the previous state in such a
3567 * case because the rollback wouldn't be guaranteed to work either.
3569 list_for_each_entry(prange, &update_list, update_list) {
3572 mutex_lock(&prange->migrate_mutex);
3574 r = svm_range_trigger_migration(mm, prange, &migrated);
3576 goto out_unlock_range;
3578 if (migrated && (!p->xnack_enabled ||
3579 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) &&
3580 prange->mapped_to_gpu) {
3581 pr_debug("restore_work will update mappings of GPUs\n");
3582 mutex_unlock(&prange->migrate_mutex);
3586 if (!migrated && !update_mapping) {
3587 mutex_unlock(&prange->migrate_mutex);
3591 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu;
3593 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE,
3594 true, true, flush_tlb);
3596 pr_debug("failed %d to map svm range\n", r);
3599 mutex_unlock(&prange->migrate_mutex);
3604 dynamic_svm_range_dump(svms);
3606 mutex_unlock(&svms->lock);
3607 mmap_read_unlock(mm);
3609 mutex_unlock(&process_info->lock);
3611 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid,
3612 &p->svms, start, start + size - 1, r);
3614 return ret ? ret : r;
3618 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm,
3619 uint64_t start, uint64_t size, uint32_t nattr,
3620 struct kfd_ioctl_svm_attribute *attrs)
3622 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE);
3623 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE);
3624 bool get_preferred_loc = false;
3625 bool get_prefetch_loc = false;
3626 bool get_granularity = false;
3627 bool get_accessible = false;
3628 bool get_flags = false;
3629 uint64_t last = start + size - 1UL;
3630 uint8_t granularity = 0xff;
3631 struct interval_tree_node *node;
3632 struct svm_range_list *svms;
3633 struct svm_range *prange;
3634 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3635 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3636 uint32_t flags_and = 0xffffffff;
3637 uint32_t flags_or = 0;
3642 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start,
3643 start + size - 1, nattr);
3645 /* Flush pending deferred work to avoid racing with deferred actions from
3646 * previous memory map changes (e.g. munmap). Concurrent memory map changes
3647 * can still race with get_attr because we don't hold the mmap lock. But that
3648 * would be a race condition in the application anyway, and undefined
3649 * behaviour is acceptable in that case.
3651 flush_work(&p->svms.deferred_list_work);
3654 r = svm_range_is_valid(p, start, size);
3655 mmap_read_unlock(mm);
3657 pr_debug("invalid range r=%d\n", r);
3661 for (i = 0; i < nattr; i++) {
3662 switch (attrs[i].type) {
3663 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3664 get_preferred_loc = true;
3666 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3667 get_prefetch_loc = true;
3669 case KFD_IOCTL_SVM_ATTR_ACCESS:
3670 get_accessible = true;
3672 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3673 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3676 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3677 get_granularity = true;
3679 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
3680 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
3683 pr_debug("get invalid attr type 0x%x\n", attrs[i].type);
3690 mutex_lock(&svms->lock);
3692 node = interval_tree_iter_first(&svms->objects, start, last);
3694 pr_debug("range attrs not found return default values\n");
3695 svm_range_set_default_attributes(&location, &prefetch_loc,
3696 &granularity, &flags_and);
3697 flags_or = flags_and;
3698 if (p->xnack_enabled)
3699 bitmap_copy(bitmap_access, svms->bitmap_supported,
3702 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE);
3703 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE);
3706 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE);
3707 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE);
3710 struct interval_tree_node *next;
3712 prange = container_of(node, struct svm_range, it_node);
3713 next = interval_tree_iter_next(node, start, last);
3715 if (get_preferred_loc) {
3716 if (prange->preferred_loc ==
3717 KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3718 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3719 location != prange->preferred_loc)) {
3720 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3721 get_preferred_loc = false;
3723 location = prange->preferred_loc;
3726 if (get_prefetch_loc) {
3727 if (prange->prefetch_loc ==
3728 KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3729 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3730 prefetch_loc != prange->prefetch_loc)) {
3731 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3732 get_prefetch_loc = false;
3734 prefetch_loc = prange->prefetch_loc;
3737 if (get_accessible) {
3738 bitmap_and(bitmap_access, bitmap_access,
3739 prange->bitmap_access, MAX_GPU_INSTANCE);
3740 bitmap_and(bitmap_aip, bitmap_aip,
3741 prange->bitmap_aip, MAX_GPU_INSTANCE);
3744 flags_and &= prange->flags;
3745 flags_or |= prange->flags;
3748 if (get_granularity && prange->granularity < granularity)
3749 granularity = prange->granularity;
3754 mutex_unlock(&svms->lock);
3756 for (i = 0; i < nattr; i++) {
3757 switch (attrs[i].type) {
3758 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3759 attrs[i].value = location;
3761 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3762 attrs[i].value = prefetch_loc;
3764 case KFD_IOCTL_SVM_ATTR_ACCESS:
3765 gpuidx = kfd_process_gpuidx_from_gpuid(p,
3768 pr_debug("invalid gpuid %x\n", attrs[i].value);
3771 if (test_bit(gpuidx, bitmap_access))
3772 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS;
3773 else if (test_bit(gpuidx, bitmap_aip))
3775 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE;
3777 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS;
3779 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3780 attrs[i].value = flags_and;
3782 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3783 attrs[i].value = ~flags_or;
3785 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3786 attrs[i].value = (uint32_t)granularity;
3794 int kfd_criu_resume_svm(struct kfd_process *p)
3796 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL;
3797 int nattr_common = 4, nattr_accessibility = 1;
3798 struct criu_svm_metadata *criu_svm_md = NULL;
3799 struct svm_range_list *svms = &p->svms;
3800 struct criu_svm_metadata *next = NULL;
3801 uint32_t set_flags = 0xffffffff;
3802 int i, j, num_attrs, ret = 0;
3803 uint64_t set_attr_size;
3804 struct mm_struct *mm;
3806 if (list_empty(&svms->criu_svm_metadata_list)) {
3807 pr_debug("No SVM data from CRIU restore stage 2\n");
3811 mm = get_task_mm(p->lead_thread);
3813 pr_err("failed to get mm for the target process\n");
3817 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds);
3820 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) {
3821 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n",
3822 i, criu_svm_md->data.start_addr, criu_svm_md->data.size);
3824 for (j = 0; j < num_attrs; j++) {
3825 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n",
3826 i, j, criu_svm_md->data.attrs[j].type,
3827 i, j, criu_svm_md->data.attrs[j].value);
3828 switch (criu_svm_md->data.attrs[j].type) {
3829 /* During Checkpoint operation, the query for
3830 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might
3831 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were
3832 * not used by the range which was checkpointed. Care
3833 * must be taken to not restore with an invalid value
3834 * otherwise the gpuidx value will be invalid and
3835 * set_attr would eventually fail so just replace those
3836 * with another dummy attribute such as
3837 * KFD_IOCTL_SVM_ATTR_SET_FLAGS.
3839 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3840 if (criu_svm_md->data.attrs[j].value ==
3841 KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
3842 criu_svm_md->data.attrs[j].type =
3843 KFD_IOCTL_SVM_ATTR_SET_FLAGS;
3844 criu_svm_md->data.attrs[j].value = 0;
3847 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3848 set_flags = criu_svm_md->data.attrs[j].value;
3855 /* CLR_FLAGS is not available via get_attr during checkpoint but
3856 * it needs to be inserted before restoring the ranges so
3857 * allocate extra space for it before calling set_attr
3859 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3861 set_attr_new = krealloc(set_attr, set_attr_size,
3863 if (!set_attr_new) {
3867 set_attr = set_attr_new;
3869 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs *
3870 sizeof(struct kfd_ioctl_svm_attribute));
3871 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS;
3872 set_attr[num_attrs].value = ~set_flags;
3874 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr,
3875 criu_svm_md->data.size, num_attrs + 1,
3878 pr_err("CRIU: failed to set range attributes\n");
3886 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) {
3887 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n",
3888 criu_svm_md->data.start_addr);
3897 int kfd_criu_restore_svm(struct kfd_process *p,
3898 uint8_t __user *user_priv_ptr,
3899 uint64_t *priv_data_offset,
3900 uint64_t max_priv_data_size)
3902 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size;
3903 int nattr_common = 4, nattr_accessibility = 1;
3904 struct criu_svm_metadata *criu_svm_md = NULL;
3905 struct svm_range_list *svms = &p->svms;
3906 uint32_t num_devices;
3909 num_devices = p->n_pdds;
3910 /* Handle one SVM range object at a time, also the number of gpus are
3911 * assumed to be same on the restore node, checking must be done while
3912 * evaluating the topology earlier
3915 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) *
3916 (nattr_common + nattr_accessibility * num_devices);
3917 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size;
3919 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) +
3922 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL);
3924 pr_err("failed to allocate memory to store svm metadata\n");
3927 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) {
3932 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset,
3933 svm_priv_data_size);
3938 *priv_data_offset += svm_priv_data_size;
3940 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list);
3950 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges,
3951 uint64_t *svm_priv_data_size)
3953 uint64_t total_size, accessibility_size, common_attr_size;
3954 int nattr_common = 4, nattr_accessibility = 1;
3955 int num_devices = p->n_pdds;
3956 struct svm_range_list *svms;
3957 struct svm_range *prange;
3960 *svm_priv_data_size = 0;
3966 mutex_lock(&svms->lock);
3967 list_for_each_entry(prange, &svms->list, list) {
3968 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n",
3969 prange, prange->start, prange->npages,
3970 prange->start + prange->npages - 1);
3973 mutex_unlock(&svms->lock);
3975 *num_svm_ranges = count;
3976 /* Only the accessbility attributes need to be queried for all the gpus
3977 * individually, remaining ones are spanned across the entire process
3978 * regardless of the various gpu nodes. Of the remaining attributes,
3979 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved.
3981 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC
3982 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC
3983 * KFD_IOCTL_SVM_ATTR_SET_FLAGS
3984 * KFD_IOCTL_SVM_ATTR_GRANULARITY
3986 * ** ACCESSBILITY ATTRIBUTES **
3987 * (Considered as one, type is altered during query, value is gpuid)
3988 * KFD_IOCTL_SVM_ATTR_ACCESS
3989 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE
3990 * KFD_IOCTL_SVM_ATTR_NO_ACCESS
3992 if (*num_svm_ranges > 0) {
3993 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3995 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) *
3996 nattr_accessibility * num_devices;
3998 total_size = sizeof(struct kfd_criu_svm_range_priv_data) +
3999 common_attr_size + accessibility_size;
4001 *svm_priv_data_size = *num_svm_ranges * total_size;
4004 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges,
4005 *svm_priv_data_size);
4009 int kfd_criu_checkpoint_svm(struct kfd_process *p,
4010 uint8_t __user *user_priv_data,
4011 uint64_t *priv_data_offset)
4013 struct kfd_criu_svm_range_priv_data *svm_priv = NULL;
4014 struct kfd_ioctl_svm_attribute *query_attr = NULL;
4015 uint64_t svm_priv_data_size, query_attr_size = 0;
4016 int index, nattr_common = 4, ret = 0;
4017 struct svm_range_list *svms;
4018 int num_devices = p->n_pdds;
4019 struct svm_range *prange;
4020 struct mm_struct *mm;
4026 mm = get_task_mm(p->lead_thread);
4028 pr_err("failed to get mm for the target process\n");
4032 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
4033 (nattr_common + num_devices);
4035 query_attr = kzalloc(query_attr_size, GFP_KERNEL);
4041 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC;
4042 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC;
4043 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS;
4044 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY;
4046 for (index = 0; index < num_devices; index++) {
4047 struct kfd_process_device *pdd = p->pdds[index];
4049 query_attr[index + nattr_common].type =
4050 KFD_IOCTL_SVM_ATTR_ACCESS;
4051 query_attr[index + nattr_common].value = pdd->user_gpu_id;
4054 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size;
4056 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL);
4063 list_for_each_entry(prange, &svms->list, list) {
4065 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE;
4066 svm_priv->start_addr = prange->start;
4067 svm_priv->size = prange->npages;
4068 memcpy(&svm_priv->attrs, query_attr, query_attr_size);
4069 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n",
4070 prange, prange->start, prange->npages,
4071 prange->start + prange->npages - 1,
4072 prange->npages * PAGE_SIZE);
4074 ret = svm_range_get_attr(p, mm, svm_priv->start_addr,
4076 (nattr_common + num_devices),
4079 pr_err("CRIU: failed to obtain range attributes\n");
4083 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv,
4084 svm_priv_data_size)) {
4085 pr_err("Failed to copy svm priv to user\n");
4090 *priv_data_offset += svm_priv_data_size;
4105 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start,
4106 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs)
4108 struct mm_struct *mm = current->mm;
4111 start >>= PAGE_SHIFT;
4112 size >>= PAGE_SHIFT;
4115 case KFD_IOCTL_SVM_OP_SET_ATTR:
4116 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs);
4118 case KFD_IOCTL_SVM_OP_GET_ATTR:
4119 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs);