1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2020-2021 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
24 #include <linux/types.h>
25 #include <linux/sched/task.h>
26 #include <drm/ttm/ttm_tt.h>
27 #include <drm/drm_exec.h>
29 #include "amdgpu_sync.h"
30 #include "amdgpu_object.h"
31 #include "amdgpu_vm.h"
32 #include "amdgpu_hmm.h"
34 #include "amdgpu_xgmi.h"
37 #include "kfd_migrate.h"
38 #include "kfd_smi_events.h"
43 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__
45 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1
47 /* Long enough to ensure no retry fault comes after svm range is restored and
48 * page table is updated.
50 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC)
51 #define dynamic_svm_range_dump(svms) \
52 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms)
54 /* Giant svm range split into smaller ranges based on this, it is decided using
55 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to
58 static uint64_t max_svm_range_pages;
60 struct criu_svm_metadata {
61 struct list_head list;
62 struct kfd_criu_svm_range_priv_data data;
65 static void svm_range_evict_svm_bo_worker(struct work_struct *work);
67 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
68 const struct mmu_notifier_range *range,
69 unsigned long cur_seq);
71 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
72 uint64_t *bo_s, uint64_t *bo_l);
73 static const struct mmu_interval_notifier_ops svm_range_mn_ops = {
74 .invalidate = svm_range_cpu_invalidate_pagetables,
78 * svm_range_unlink - unlink svm_range from lists and interval tree
79 * @prange: svm range structure to be removed
81 * Remove the svm_range from the svms and svm_bo lists and the svms
84 * Context: The caller must hold svms->lock
86 static void svm_range_unlink(struct svm_range *prange)
88 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
89 prange, prange->start, prange->last);
92 spin_lock(&prange->svm_bo->list_lock);
93 list_del(&prange->svm_bo_list);
94 spin_unlock(&prange->svm_bo->list_lock);
97 list_del(&prange->list);
98 if (prange->it_node.start != 0 && prange->it_node.last != 0)
99 interval_tree_remove(&prange->it_node, &prange->svms->objects);
103 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange)
105 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
106 prange, prange->start, prange->last);
108 mmu_interval_notifier_insert_locked(&prange->notifier, mm,
109 prange->start << PAGE_SHIFT,
110 prange->npages << PAGE_SHIFT,
115 * svm_range_add_to_svms - add svm range to svms
116 * @prange: svm range structure to be added
118 * Add the svm range to svms interval tree and link list
120 * Context: The caller must hold svms->lock
122 static void svm_range_add_to_svms(struct svm_range *prange)
124 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
125 prange, prange->start, prange->last);
127 list_move_tail(&prange->list, &prange->svms->list);
128 prange->it_node.start = prange->start;
129 prange->it_node.last = prange->last;
130 interval_tree_insert(&prange->it_node, &prange->svms->objects);
133 static void svm_range_remove_notifier(struct svm_range *prange)
135 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n",
136 prange->svms, prange,
137 prange->notifier.interval_tree.start >> PAGE_SHIFT,
138 prange->notifier.interval_tree.last >> PAGE_SHIFT);
140 if (prange->notifier.interval_tree.start != 0 &&
141 prange->notifier.interval_tree.last != 0)
142 mmu_interval_notifier_remove(&prange->notifier);
146 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr)
148 return dma_addr && !dma_mapping_error(dev, dma_addr) &&
149 !(dma_addr & SVM_RANGE_VRAM_DOMAIN);
153 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange,
154 unsigned long offset, unsigned long npages,
155 unsigned long *hmm_pfns, uint32_t gpuidx)
157 enum dma_data_direction dir = DMA_BIDIRECTIONAL;
158 dma_addr_t *addr = prange->dma_addr[gpuidx];
159 struct device *dev = adev->dev;
164 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL);
167 prange->dma_addr[gpuidx] = addr;
171 for (i = 0; i < npages; i++) {
172 if (svm_is_valid_dma_mapping_addr(dev, addr[i]))
173 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir);
175 page = hmm_pfn_to_page(hmm_pfns[i]);
176 if (is_zone_device_page(page)) {
177 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev;
179 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) +
180 bo_adev->vm_manager.vram_base_offset -
181 bo_adev->kfd.pgmap.range.start;
182 addr[i] |= SVM_RANGE_VRAM_DOMAIN;
183 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]);
186 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir);
187 r = dma_mapping_error(dev, addr[i]);
189 dev_err(dev, "failed %d dma_map_page\n", r);
192 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n",
193 addr[i] >> PAGE_SHIFT, page_to_pfn(page));
199 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap,
200 unsigned long offset, unsigned long npages,
201 unsigned long *hmm_pfns)
203 struct kfd_process *p;
207 p = container_of(prange->svms, struct kfd_process, svms);
209 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
210 struct kfd_process_device *pdd;
212 pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
213 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
215 pr_debug("failed to find device idx %d\n", gpuidx);
219 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages,
228 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr,
229 unsigned long offset, unsigned long npages)
231 enum dma_data_direction dir = DMA_BIDIRECTIONAL;
237 for (i = offset; i < offset + npages; i++) {
238 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i]))
240 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT);
241 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir);
246 void svm_range_free_dma_mappings(struct svm_range *prange, bool unmap_dma)
248 struct kfd_process_device *pdd;
249 dma_addr_t *dma_addr;
251 struct kfd_process *p;
254 p = container_of(prange->svms, struct kfd_process, svms);
256 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) {
257 dma_addr = prange->dma_addr[gpuidx];
261 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
263 pr_debug("failed to find device idx %d\n", gpuidx);
266 dev = &pdd->dev->adev->pdev->dev;
268 svm_range_dma_unmap(dev, dma_addr, 0, prange->npages);
270 prange->dma_addr[gpuidx] = NULL;
274 static void svm_range_free(struct svm_range *prange, bool do_unmap)
276 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT;
277 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms);
279 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange,
280 prange->start, prange->last);
282 svm_range_vram_node_free(prange);
283 svm_range_free_dma_mappings(prange, do_unmap);
285 if (do_unmap && !p->xnack_enabled) {
286 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size);
287 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
288 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
290 mutex_destroy(&prange->lock);
291 mutex_destroy(&prange->migrate_mutex);
296 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc,
297 uint8_t *granularity, uint32_t *flags)
299 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
300 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
303 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT;
307 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start,
308 uint64_t last, bool update_mem_usage)
310 uint64_t size = last - start + 1;
311 struct svm_range *prange;
312 struct kfd_process *p;
314 prange = kzalloc(sizeof(*prange), GFP_KERNEL);
318 p = container_of(svms, struct kfd_process, svms);
319 if (!p->xnack_enabled && update_mem_usage &&
320 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT,
321 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) {
322 pr_info("SVM mapping failed, exceeds resident system memory limit\n");
326 prange->npages = size;
328 prange->start = start;
330 INIT_LIST_HEAD(&prange->list);
331 INIT_LIST_HEAD(&prange->update_list);
332 INIT_LIST_HEAD(&prange->svm_bo_list);
333 INIT_LIST_HEAD(&prange->deferred_list);
334 INIT_LIST_HEAD(&prange->child_list);
335 atomic_set(&prange->invalid, 0);
336 prange->validate_timestamp = 0;
337 mutex_init(&prange->migrate_mutex);
338 mutex_init(&prange->lock);
340 if (p->xnack_enabled)
341 bitmap_copy(prange->bitmap_access, svms->bitmap_supported,
344 svm_range_set_default_attributes(&prange->preferred_loc,
345 &prange->prefetch_loc,
346 &prange->granularity, &prange->flags);
348 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last);
353 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo)
355 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref))
361 static void svm_range_bo_release(struct kref *kref)
363 struct svm_range_bo *svm_bo;
365 svm_bo = container_of(kref, struct svm_range_bo, kref);
366 pr_debug("svm_bo 0x%p\n", svm_bo);
368 spin_lock(&svm_bo->list_lock);
369 while (!list_empty(&svm_bo->range_list)) {
370 struct svm_range *prange =
371 list_first_entry(&svm_bo->range_list,
372 struct svm_range, svm_bo_list);
373 /* list_del_init tells a concurrent svm_range_vram_node_new when
374 * it's safe to reuse the svm_bo pointer and svm_bo_list head.
376 list_del_init(&prange->svm_bo_list);
377 spin_unlock(&svm_bo->list_lock);
379 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
380 prange->start, prange->last);
381 mutex_lock(&prange->lock);
382 prange->svm_bo = NULL;
383 mutex_unlock(&prange->lock);
385 spin_lock(&svm_bo->list_lock);
387 spin_unlock(&svm_bo->list_lock);
388 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) {
389 /* We're not in the eviction worker.
390 * Signal the fence and synchronize with any
391 * pending eviction work.
393 dma_fence_signal(&svm_bo->eviction_fence->base);
394 cancel_work_sync(&svm_bo->eviction_work);
396 dma_fence_put(&svm_bo->eviction_fence->base);
397 amdgpu_bo_unref(&svm_bo->bo);
401 static void svm_range_bo_wq_release(struct work_struct *work)
403 struct svm_range_bo *svm_bo;
405 svm_bo = container_of(work, struct svm_range_bo, release_work);
406 svm_range_bo_release(&svm_bo->kref);
409 static void svm_range_bo_release_async(struct kref *kref)
411 struct svm_range_bo *svm_bo;
413 svm_bo = container_of(kref, struct svm_range_bo, kref);
414 pr_debug("svm_bo 0x%p\n", svm_bo);
415 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release);
416 schedule_work(&svm_bo->release_work);
419 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo)
421 kref_put(&svm_bo->kref, svm_range_bo_release_async);
424 static void svm_range_bo_unref(struct svm_range_bo *svm_bo)
427 kref_put(&svm_bo->kref, svm_range_bo_release);
431 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange)
433 mutex_lock(&prange->lock);
434 if (!prange->svm_bo) {
435 mutex_unlock(&prange->lock);
438 if (prange->ttm_res) {
439 /* We still have a reference, all is well */
440 mutex_unlock(&prange->lock);
443 if (svm_bo_ref_unless_zero(prange->svm_bo)) {
445 * Migrate from GPU to GPU, remove range from source svm_bo->node
446 * range list, and return false to allocate svm_bo from destination
449 if (prange->svm_bo->node != node) {
450 mutex_unlock(&prange->lock);
452 spin_lock(&prange->svm_bo->list_lock);
453 list_del_init(&prange->svm_bo_list);
454 spin_unlock(&prange->svm_bo->list_lock);
456 svm_range_bo_unref(prange->svm_bo);
459 if (READ_ONCE(prange->svm_bo->evicting)) {
461 struct svm_range_bo *svm_bo;
462 /* The BO is getting evicted,
463 * we need to get a new one
465 mutex_unlock(&prange->lock);
466 svm_bo = prange->svm_bo;
467 f = dma_fence_get(&svm_bo->eviction_fence->base);
468 svm_range_bo_unref(prange->svm_bo);
469 /* wait for the fence to avoid long spin-loop
470 * at list_empty_careful
472 dma_fence_wait(f, false);
475 /* The BO was still around and we got
476 * a new reference to it
478 mutex_unlock(&prange->lock);
479 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n",
480 prange->svms, prange->start, prange->last);
482 prange->ttm_res = prange->svm_bo->bo->tbo.resource;
487 mutex_unlock(&prange->lock);
490 /* We need a new svm_bo. Spin-loop to wait for concurrent
491 * svm_range_bo_release to finish removing this range from
492 * its range list. After this, it is safe to reuse the
493 * svm_bo pointer and svm_bo_list head.
495 while (!list_empty_careful(&prange->svm_bo_list))
501 static struct svm_range_bo *svm_range_bo_new(void)
503 struct svm_range_bo *svm_bo;
505 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL);
509 kref_init(&svm_bo->kref);
510 INIT_LIST_HEAD(&svm_bo->range_list);
511 spin_lock_init(&svm_bo->list_lock);
517 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange,
520 struct amdgpu_bo_param bp;
521 struct svm_range_bo *svm_bo;
522 struct amdgpu_bo_user *ubo;
523 struct amdgpu_bo *bo;
524 struct kfd_process *p;
525 struct mm_struct *mm;
528 p = container_of(prange->svms, struct kfd_process, svms);
529 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms,
530 prange->start, prange->last);
532 if (svm_range_validate_svm_bo(node, prange))
535 svm_bo = svm_range_bo_new();
537 pr_debug("failed to alloc svm bo\n");
540 mm = get_task_mm(p->lead_thread);
542 pr_debug("failed to get mm\n");
547 svm_bo->eviction_fence =
548 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1),
552 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker);
553 svm_bo->evicting = 0;
554 memset(&bp, 0, sizeof(bp));
555 bp.size = prange->npages * PAGE_SIZE;
556 bp.byte_align = PAGE_SIZE;
557 bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
558 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
559 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0;
560 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE;
561 bp.type = ttm_bo_type_device;
564 bp.xcp_id_plus1 = node->xcp->id + 1;
566 r = amdgpu_bo_create_user(node->adev, &bp, &ubo);
568 pr_debug("failed %d to create bo\n", r);
569 goto create_bo_failed;
573 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n",
574 bo->tbo.resource->start << PAGE_SHIFT, bp.size,
575 bp.xcp_id_plus1 - 1);
577 r = amdgpu_bo_reserve(bo, true);
579 pr_debug("failed %d to reserve bo\n", r);
580 goto reserve_bo_failed;
584 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false);
586 pr_debug("failed %d to sync bo\n", r);
587 amdgpu_bo_unreserve(bo);
588 goto reserve_bo_failed;
592 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1);
594 pr_debug("failed %d to reserve bo\n", r);
595 amdgpu_bo_unreserve(bo);
596 goto reserve_bo_failed;
598 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true);
600 amdgpu_bo_unreserve(bo);
603 prange->svm_bo = svm_bo;
604 prange->ttm_res = bo->tbo.resource;
607 spin_lock(&svm_bo->list_lock);
608 list_add(&prange->svm_bo_list, &svm_bo->range_list);
609 spin_unlock(&svm_bo->list_lock);
614 amdgpu_bo_unref(&bo);
616 dma_fence_put(&svm_bo->eviction_fence->base);
618 prange->ttm_res = NULL;
623 void svm_range_vram_node_free(struct svm_range *prange)
625 svm_range_bo_unref(prange->svm_bo);
626 prange->ttm_res = NULL;
630 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id)
632 struct kfd_process *p;
633 struct kfd_process_device *pdd;
635 p = container_of(prange->svms, struct kfd_process, svms);
636 pdd = kfd_process_device_data_by_id(p, gpu_id);
638 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id);
645 struct kfd_process_device *
646 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node)
648 struct kfd_process *p;
650 p = container_of(prange->svms, struct kfd_process, svms);
652 return kfd_get_process_device_data(node, p);
655 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo)
657 struct ttm_operation_ctx ctx = { false, false };
659 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
661 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
665 svm_range_check_attr(struct kfd_process *p,
666 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
670 for (i = 0; i < nattr; i++) {
671 uint32_t val = attrs[i].value;
672 int gpuidx = MAX_GPU_INSTANCE;
674 switch (attrs[i].type) {
675 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
676 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM &&
677 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED)
678 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
680 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
681 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM)
682 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
684 case KFD_IOCTL_SVM_ATTR_ACCESS:
685 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
686 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
687 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
689 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
691 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
693 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
696 pr_debug("unknown attr type 0x%x\n", attrs[i].type);
701 pr_debug("no GPU 0x%x found\n", val);
703 } else if (gpuidx < MAX_GPU_INSTANCE &&
704 !test_bit(gpuidx, p->svms.bitmap_supported)) {
705 pr_debug("GPU 0x%x not supported\n", val);
714 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange,
715 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
716 bool *update_mapping)
721 for (i = 0; i < nattr; i++) {
722 switch (attrs[i].type) {
723 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
724 prange->preferred_loc = attrs[i].value;
726 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
727 prange->prefetch_loc = attrs[i].value;
729 case KFD_IOCTL_SVM_ATTR_ACCESS:
730 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
731 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
732 if (!p->xnack_enabled)
733 *update_mapping = true;
735 gpuidx = kfd_process_gpuidx_from_gpuid(p,
737 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
738 bitmap_clear(prange->bitmap_access, gpuidx, 1);
739 bitmap_clear(prange->bitmap_aip, gpuidx, 1);
740 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
741 bitmap_set(prange->bitmap_access, gpuidx, 1);
742 bitmap_clear(prange->bitmap_aip, gpuidx, 1);
744 bitmap_clear(prange->bitmap_access, gpuidx, 1);
745 bitmap_set(prange->bitmap_aip, gpuidx, 1);
748 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
749 *update_mapping = true;
750 prange->flags |= attrs[i].value;
752 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
753 *update_mapping = true;
754 prange->flags &= ~attrs[i].value;
756 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
757 prange->granularity = attrs[i].value;
760 WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
766 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange,
767 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
772 for (i = 0; i < nattr; i++) {
773 switch (attrs[i].type) {
774 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
775 if (prange->preferred_loc != attrs[i].value)
778 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
779 /* Prefetch should always trigger a migration even
780 * if the value of the attribute didn't change.
783 case KFD_IOCTL_SVM_ATTR_ACCESS:
784 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
785 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
786 gpuidx = kfd_process_gpuidx_from_gpuid(p,
788 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
789 if (test_bit(gpuidx, prange->bitmap_access) ||
790 test_bit(gpuidx, prange->bitmap_aip))
792 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
793 if (!test_bit(gpuidx, prange->bitmap_access))
796 if (!test_bit(gpuidx, prange->bitmap_aip))
800 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
801 if ((prange->flags & attrs[i].value) != attrs[i].value)
804 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
805 if ((prange->flags & attrs[i].value) != 0)
808 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
809 if (prange->granularity != attrs[i].value)
813 WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
817 return !prange->is_error_flag;
821 * svm_range_debug_dump - print all range information from svms
822 * @svms: svm range list header
824 * debug output svm range start, end, prefetch location from svms
825 * interval tree and link list
827 * Context: The caller must hold svms->lock
829 static void svm_range_debug_dump(struct svm_range_list *svms)
831 struct interval_tree_node *node;
832 struct svm_range *prange;
834 pr_debug("dump svms 0x%p list\n", svms);
835 pr_debug("range\tstart\tpage\tend\t\tlocation\n");
837 list_for_each_entry(prange, &svms->list, list) {
838 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
839 prange, prange->start, prange->npages,
840 prange->start + prange->npages - 1,
844 pr_debug("dump svms 0x%p interval tree\n", svms);
845 pr_debug("range\tstart\tpage\tend\t\tlocation\n");
846 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL);
848 prange = container_of(node, struct svm_range, it_node);
849 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
850 prange, prange->start, prange->npages,
851 prange->start + prange->npages - 1,
853 node = interval_tree_iter_next(node, 0, ~0ULL);
858 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements,
863 dst = kvmalloc_array(num_elements, size, GFP_KERNEL);
866 memcpy(dst, (unsigned char *)psrc + offset, num_elements * size);
872 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src)
876 for (i = 0; i < MAX_GPU_INSTANCE; i++) {
877 if (!src->dma_addr[i])
879 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i],
880 sizeof(*src->dma_addr[i]), src->npages, 0);
881 if (!dst->dma_addr[i])
889 svm_range_split_array(void *ppnew, void *ppold, size_t size,
890 uint64_t old_start, uint64_t old_n,
891 uint64_t new_start, uint64_t new_n)
893 unsigned char *new, *old, *pold;
898 pold = *(unsigned char **)ppold;
902 d = (new_start - old_start) * size;
903 new = svm_range_copy_array(pold, size, new_n, d);
906 d = (new_start == old_start) ? new_n * size : 0;
907 old = svm_range_copy_array(pold, size, old_n, d);
913 *(void **)ppold = old;
914 *(void **)ppnew = new;
920 svm_range_split_pages(struct svm_range *new, struct svm_range *old,
921 uint64_t start, uint64_t last)
923 uint64_t npages = last - start + 1;
926 for (i = 0; i < MAX_GPU_INSTANCE; i++) {
927 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i],
928 sizeof(*old->dma_addr[i]), old->start,
929 npages, new->start, new->npages);
938 svm_range_split_nodes(struct svm_range *new, struct svm_range *old,
939 uint64_t start, uint64_t last)
941 uint64_t npages = last - start + 1;
943 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n",
944 new->svms, new, new->start, start, last);
946 if (new->start == old->start) {
947 new->offset = old->offset;
948 old->offset += new->npages;
950 new->offset = old->offset + npages;
953 new->svm_bo = svm_range_bo_ref(old->svm_bo);
954 new->ttm_res = old->ttm_res;
956 spin_lock(&new->svm_bo->list_lock);
957 list_add(&new->svm_bo_list, &new->svm_bo->range_list);
958 spin_unlock(&new->svm_bo->list_lock);
964 * svm_range_split_adjust - split range and adjust
967 * @old: the old range
968 * @start: the old range adjust to start address in pages
969 * @last: the old range adjust to last address in pages
971 * Copy system memory dma_addr or vram ttm_res in old range to new
972 * range from new_start up to size new->npages, the remaining old range is from
976 * 0 - OK, -ENOMEM - out of memory
979 svm_range_split_adjust(struct svm_range *new, struct svm_range *old,
980 uint64_t start, uint64_t last)
984 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n",
985 new->svms, new->start, old->start, old->last, start, last);
987 if (new->start < old->start ||
988 new->last > old->last) {
989 WARN_ONCE(1, "invalid new range start or last\n");
993 r = svm_range_split_pages(new, old, start, last);
997 if (old->actual_loc && old->ttm_res) {
998 r = svm_range_split_nodes(new, old, start, last);
1003 old->npages = last - start + 1;
1006 new->flags = old->flags;
1007 new->preferred_loc = old->preferred_loc;
1008 new->prefetch_loc = old->prefetch_loc;
1009 new->actual_loc = old->actual_loc;
1010 new->granularity = old->granularity;
1011 new->mapped_to_gpu = old->mapped_to_gpu;
1012 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
1013 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
1019 * svm_range_split - split a range in 2 ranges
1021 * @prange: the svm range to split
1022 * @start: the remaining range start address in pages
1023 * @last: the remaining range last address in pages
1024 * @new: the result new range generated
1027 * case 1: if start == prange->start
1028 * prange ==> prange[start, last]
1029 * new range [last + 1, prange->last]
1031 * case 2: if last == prange->last
1032 * prange ==> prange[start, last]
1033 * new range [prange->start, start - 1]
1036 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last
1039 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last,
1040 struct svm_range **new)
1042 uint64_t old_start = prange->start;
1043 uint64_t old_last = prange->last;
1044 struct svm_range_list *svms;
1047 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms,
1048 old_start, old_last, start, last);
1050 if (old_start != start && old_last != last)
1052 if (start < old_start || last > old_last)
1055 svms = prange->svms;
1056 if (old_start == start)
1057 *new = svm_range_new(svms, last + 1, old_last, false);
1059 *new = svm_range_new(svms, old_start, start - 1, false);
1063 r = svm_range_split_adjust(*new, prange, start, last);
1065 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n",
1066 r, old_start, old_last, start, last);
1067 svm_range_free(*new, false);
1075 svm_range_split_tail(struct svm_range *prange,
1076 uint64_t new_last, struct list_head *insert_list)
1078 struct svm_range *tail;
1079 int r = svm_range_split(prange, prange->start, new_last, &tail);
1082 list_add(&tail->list, insert_list);
1087 svm_range_split_head(struct svm_range *prange,
1088 uint64_t new_start, struct list_head *insert_list)
1090 struct svm_range *head;
1091 int r = svm_range_split(prange, new_start, prange->last, &head);
1094 list_add(&head->list, insert_list);
1099 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm,
1100 struct svm_range *pchild, enum svm_work_list_ops op)
1102 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n",
1103 pchild, pchild->start, pchild->last, prange, op);
1105 pchild->work_item.mm = mm;
1106 pchild->work_item.op = op;
1107 list_add_tail(&pchild->child_list, &prange->child_list);
1111 * svm_range_split_by_granularity - collect ranges within granularity boundary
1113 * @p: the process with svms list
1115 * @addr: the vm fault address in pages, to split the prange
1116 * @parent: parent range if prange is from child list
1117 * @prange: prange to split
1119 * Trims @prange to be a single aligned block of prange->granularity if
1120 * possible. The head and tail are added to the child_list in @parent.
1122 * Context: caller must hold mmap_read_lock and prange->lock
1125 * 0 - OK, otherwise error code
1128 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm,
1129 unsigned long addr, struct svm_range *parent,
1130 struct svm_range *prange)
1132 struct svm_range *head, *tail;
1133 unsigned long start, last, size;
1136 /* Align splited range start and size to granularity size, then a single
1137 * PTE will be used for whole range, this reduces the number of PTE
1138 * updated and the L1 TLB space used for translation.
1140 size = 1UL << prange->granularity;
1141 start = ALIGN_DOWN(addr, size);
1142 last = ALIGN(addr + 1, size) - 1;
1144 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n",
1145 prange->svms, prange->start, prange->last, start, last, size);
1147 if (start > prange->start) {
1148 r = svm_range_split(prange, start, prange->last, &head);
1151 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE);
1154 if (last < prange->last) {
1155 r = svm_range_split(prange, prange->start, last, &tail);
1158 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
1161 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */
1162 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) {
1163 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP;
1164 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n",
1165 prange, prange->start, prange->last,
1166 SVM_OP_ADD_RANGE_AND_MAP);
1171 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b)
1173 return (node_a->adev == node_b->adev ||
1174 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev));
1178 svm_range_get_pte_flags(struct kfd_node *node,
1179 struct svm_range *prange, int domain)
1181 struct kfd_node *bo_node;
1182 uint32_t flags = prange->flags;
1183 uint32_t mapping_flags = 0;
1185 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN);
1186 bool coherent = flags & KFD_IOCTL_SVM_FLAG_COHERENT;
1187 bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/
1188 unsigned int mtype_local;
1190 if (domain == SVM_RANGE_VRAM_DOMAIN)
1191 bo_node = prange->svm_bo->node;
1193 switch (node->adev->ip_versions[GC_HWIP][0]) {
1194 case IP_VERSION(9, 4, 1):
1195 if (domain == SVM_RANGE_VRAM_DOMAIN) {
1196 if (bo_node == node) {
1197 mapping_flags |= coherent ?
1198 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1200 mapping_flags |= coherent ?
1201 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1202 if (svm_nodes_in_same_hive(node, bo_node))
1206 mapping_flags |= coherent ?
1207 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1210 case IP_VERSION(9, 4, 2):
1211 if (domain == SVM_RANGE_VRAM_DOMAIN) {
1212 if (bo_node == node) {
1213 mapping_flags |= coherent ?
1214 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1215 if (node->adev->gmc.xgmi.connected_to_cpu)
1218 mapping_flags |= coherent ?
1219 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1220 if (svm_nodes_in_same_hive(node, bo_node))
1224 mapping_flags |= coherent ?
1225 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1228 case IP_VERSION(9, 4, 3):
1229 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC :
1230 (amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW);
1233 mapping_flags |= AMDGPU_VM_MTYPE_UC;
1234 } else if (domain == SVM_RANGE_VRAM_DOMAIN) {
1235 /* local HBM region close to partition */
1236 if (bo_node->adev == node->adev &&
1237 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id))
1238 mapping_flags |= mtype_local;
1239 /* local HBM region far from partition or remote XGMI GPU */
1240 else if (svm_nodes_in_same_hive(bo_node, node))
1241 mapping_flags |= AMDGPU_VM_MTYPE_NC;
1244 mapping_flags |= AMDGPU_VM_MTYPE_UC;
1245 /* system memory accessed by the APU */
1246 } else if (node->adev->flags & AMD_IS_APU) {
1247 /* On NUMA systems, locality is determined per-page
1248 * in amdgpu_gmc_override_vm_pte_flags
1250 if (num_possible_nodes() <= 1)
1251 mapping_flags |= mtype_local;
1253 mapping_flags |= AMDGPU_VM_MTYPE_NC;
1254 /* system memory accessed by the dGPU */
1256 mapping_flags |= AMDGPU_VM_MTYPE_UC;
1260 mapping_flags |= coherent ?
1261 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1264 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE;
1266 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO)
1267 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE;
1268 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC)
1269 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
1271 pte_flags = AMDGPU_PTE_VALID;
1272 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM;
1273 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0;
1275 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags);
1280 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
1281 uint64_t start, uint64_t last,
1282 struct dma_fence **fence)
1284 uint64_t init_pte_value = 0;
1286 pr_debug("[0x%llx 0x%llx]\n", start, last);
1288 return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start,
1289 last, init_pte_value, 0, 0, NULL, NULL,
1294 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start,
1295 unsigned long last, uint32_t trigger)
1297 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1298 struct kfd_process_device *pdd;
1299 struct dma_fence *fence = NULL;
1300 struct kfd_process *p;
1304 if (!prange->mapped_to_gpu) {
1305 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n",
1306 prange, prange->start, prange->last);
1310 if (prange->start == start && prange->last == last) {
1311 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange);
1312 prange->mapped_to_gpu = false;
1315 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
1317 p = container_of(prange->svms, struct kfd_process, svms);
1319 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1320 pr_debug("unmap from gpu idx 0x%x\n", gpuidx);
1321 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1323 pr_debug("failed to find device idx %d\n", gpuidx);
1327 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid,
1328 start, last, trigger);
1330 r = svm_range_unmap_from_gpu(pdd->dev->adev,
1331 drm_priv_to_vm(pdd->drm_priv),
1332 start, last, &fence);
1337 r = dma_fence_wait(fence, false);
1338 dma_fence_put(fence);
1343 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT);
1350 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange,
1351 unsigned long offset, unsigned long npages, bool readonly,
1352 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev,
1353 struct dma_fence **fence, bool flush_tlb)
1355 struct amdgpu_device *adev = pdd->dev->adev;
1356 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv);
1358 unsigned long last_start;
1363 last_start = prange->start + offset;
1365 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms,
1366 last_start, last_start + npages - 1, readonly);
1368 for (i = offset; i < offset + npages; i++) {
1369 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN;
1370 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN;
1372 /* Collect all pages in the same address range and memory domain
1373 * that can be mapped with a single call to update mapping.
1375 if (i < offset + npages - 1 &&
1376 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN))
1379 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n",
1380 last_start, prange->start + i, last_domain ? "GPU" : "CPU");
1382 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain);
1384 pte_flags &= ~AMDGPU_PTE_WRITEABLE;
1386 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n",
1387 prange->svms, last_start, prange->start + i,
1388 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0,
1391 /* For dGPU mode, we use same vm_manager to allocate VRAM for
1392 * different memory partition based on fpfn/lpfn, we should use
1393 * same vm_manager.vram_base_offset regardless memory partition.
1395 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, NULL,
1396 last_start, prange->start + i,
1398 (last_start - prange->start) << PAGE_SHIFT,
1399 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0,
1400 NULL, dma_addr, &vm->last_update);
1402 for (j = last_start - prange->start; j <= i; j++)
1403 dma_addr[j] |= last_domain;
1406 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start);
1409 last_start = prange->start + i + 1;
1412 r = amdgpu_vm_update_pdes(adev, vm, false);
1414 pr_debug("failed %d to update directories 0x%lx\n", r,
1420 *fence = dma_fence_get(vm->last_update);
1427 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset,
1428 unsigned long npages, bool readonly,
1429 unsigned long *bitmap, bool wait, bool flush_tlb)
1431 struct kfd_process_device *pdd;
1432 struct amdgpu_device *bo_adev = NULL;
1433 struct kfd_process *p;
1434 struct dma_fence *fence = NULL;
1438 if (prange->svm_bo && prange->ttm_res)
1439 bo_adev = prange->svm_bo->node->adev;
1441 p = container_of(prange->svms, struct kfd_process, svms);
1442 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1443 pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
1444 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1446 pr_debug("failed to find device idx %d\n", gpuidx);
1450 pdd = kfd_bind_process_to_device(pdd->dev, p);
1454 if (bo_adev && pdd->dev->adev != bo_adev &&
1455 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) {
1456 pr_debug("cannot map to device idx %d\n", gpuidx);
1460 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly,
1461 prange->dma_addr[gpuidx],
1462 bo_adev, wait ? &fence : NULL,
1468 r = dma_fence_wait(fence, false);
1469 dma_fence_put(fence);
1472 pr_debug("failed %d to dma fence wait\n", r);
1477 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY);
1483 struct svm_validate_context {
1484 struct kfd_process *process;
1485 struct svm_range *prange;
1487 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1488 struct drm_exec exec;
1491 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr)
1493 struct kfd_process_device *pdd;
1494 struct amdgpu_vm *vm;
1498 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0);
1499 drm_exec_until_all_locked(&ctx->exec) {
1500 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1501 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1503 pr_debug("failed to find device idx %d\n", gpuidx);
1507 vm = drm_priv_to_vm(pdd->drm_priv);
1509 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2);
1510 drm_exec_retry_on_contention(&ctx->exec);
1512 pr_debug("failed %d to reserve bo\n", r);
1518 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1519 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1521 pr_debug("failed to find device idx %d\n", gpuidx);
1526 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev,
1527 drm_priv_to_vm(pdd->drm_priv),
1528 svm_range_bo_validate, NULL);
1530 pr_debug("failed %d validate pt bos\n", r);
1538 drm_exec_fini(&ctx->exec);
1542 static void svm_range_unreserve_bos(struct svm_validate_context *ctx)
1544 drm_exec_fini(&ctx->exec);
1547 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx)
1549 struct kfd_process_device *pdd;
1551 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1555 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev);
1559 * Validation+GPU mapping with concurrent invalidation (MMU notifiers)
1561 * To prevent concurrent destruction or change of range attributes, the
1562 * svm_read_lock must be held. The caller must not hold the svm_write_lock
1563 * because that would block concurrent evictions and lead to deadlocks. To
1564 * serialize concurrent migrations or validations of the same range, the
1565 * prange->migrate_mutex must be held.
1567 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its
1570 * The following sequence ensures race-free validation and GPU mapping:
1572 * 1. Reserve page table (and SVM BO if range is in VRAM)
1573 * 2. hmm_range_fault to get page addresses (if system memory)
1574 * 3. DMA-map pages (if system memory)
1575 * 4-a. Take notifier lock
1576 * 4-b. Check that pages still valid (mmu_interval_read_retry)
1577 * 4-c. Check that the range was not split or otherwise invalidated
1578 * 4-d. Update GPU page table
1579 * 4.e. Release notifier lock
1580 * 5. Release page table (and SVM BO) reservation
1582 static int svm_range_validate_and_map(struct mm_struct *mm,
1583 struct svm_range *prange, int32_t gpuidx,
1584 bool intr, bool wait, bool flush_tlb)
1586 struct svm_validate_context *ctx;
1587 unsigned long start, end, addr;
1588 struct kfd_process *p;
1593 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL);
1596 ctx->process = container_of(prange->svms, struct kfd_process, svms);
1597 ctx->prange = prange;
1600 if (gpuidx < MAX_GPU_INSTANCE) {
1601 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE);
1602 bitmap_set(ctx->bitmap, gpuidx, 1);
1603 } else if (ctx->process->xnack_enabled) {
1604 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
1606 /* If prefetch range to GPU, or GPU retry fault migrate range to
1607 * GPU, which has ACCESS attribute to the range, create mapping
1610 if (prange->actual_loc) {
1611 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process,
1612 prange->actual_loc);
1614 WARN_ONCE(1, "failed get device by id 0x%x\n",
1615 prange->actual_loc);
1619 if (test_bit(gpuidx, prange->bitmap_access))
1620 bitmap_set(ctx->bitmap, gpuidx, 1);
1623 bitmap_or(ctx->bitmap, prange->bitmap_access,
1624 prange->bitmap_aip, MAX_GPU_INSTANCE);
1627 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1628 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE);
1629 if (!prange->mapped_to_gpu ||
1630 bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1636 if (prange->actual_loc && !prange->ttm_res) {
1637 /* This should never happen. actual_loc gets set by
1638 * svm_migrate_ram_to_vram after allocating a BO.
1640 WARN_ONCE(1, "VRAM BO missing during validation\n");
1645 svm_range_reserve_bos(ctx, intr);
1647 p = container_of(prange->svms, struct kfd_process, svms);
1648 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap,
1650 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) {
1651 if (kfd_svm_page_owner(p, idx) != owner) {
1657 start = prange->start << PAGE_SHIFT;
1658 end = (prange->last + 1) << PAGE_SHIFT;
1659 for (addr = start; addr < end && !r; ) {
1660 struct hmm_range *hmm_range;
1661 struct vm_area_struct *vma;
1663 unsigned long offset;
1664 unsigned long npages;
1667 vma = vma_lookup(mm, addr);
1672 readonly = !(vma->vm_flags & VM_WRITE);
1674 next = min(vma->vm_end, end);
1675 npages = (next - addr) >> PAGE_SHIFT;
1676 WRITE_ONCE(p->svms.faulting_task, current);
1677 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages,
1678 readonly, owner, NULL,
1680 WRITE_ONCE(p->svms.faulting_task, NULL);
1682 pr_debug("failed %d to get svm range pages\n", r);
1686 offset = (addr - start) >> PAGE_SHIFT;
1687 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages,
1688 hmm_range->hmm_pfns);
1690 pr_debug("failed %d to dma map range\n", r);
1694 svm_range_lock(prange);
1695 if (amdgpu_hmm_range_get_pages_done(hmm_range)) {
1696 pr_debug("hmm update the range, need validate again\n");
1700 if (!list_empty(&prange->child_list)) {
1701 pr_debug("range split by unmap in parallel, validate again\n");
1706 r = svm_range_map_to_gpus(prange, offset, npages, readonly,
1707 ctx->bitmap, wait, flush_tlb);
1710 svm_range_unlock(prange);
1716 prange->validated_once = true;
1717 prange->mapped_to_gpu = true;
1721 svm_range_unreserve_bos(ctx);
1723 prange->is_error_flag = !!r;
1725 prange->validate_timestamp = ktime_get_boottime();
1734 * svm_range_list_lock_and_flush_work - flush pending deferred work
1736 * @svms: the svm range list
1737 * @mm: the mm structure
1739 * Context: Returns with mmap write lock held, pending deferred work flushed
1743 svm_range_list_lock_and_flush_work(struct svm_range_list *svms,
1744 struct mm_struct *mm)
1747 flush_work(&svms->deferred_list_work);
1748 mmap_write_lock(mm);
1750 if (list_empty(&svms->deferred_range_list))
1752 mmap_write_unlock(mm);
1753 pr_debug("retry flush\n");
1754 goto retry_flush_work;
1757 static void svm_range_restore_work(struct work_struct *work)
1759 struct delayed_work *dwork = to_delayed_work(work);
1760 struct amdkfd_process_info *process_info;
1761 struct svm_range_list *svms;
1762 struct svm_range *prange;
1763 struct kfd_process *p;
1764 struct mm_struct *mm;
1769 svms = container_of(dwork, struct svm_range_list, restore_work);
1770 evicted_ranges = atomic_read(&svms->evicted_ranges);
1771 if (!evicted_ranges)
1774 pr_debug("restore svm ranges\n");
1776 p = container_of(svms, struct kfd_process, svms);
1777 process_info = p->kgd_process_info;
1779 /* Keep mm reference when svm_range_validate_and_map ranges */
1780 mm = get_task_mm(p->lead_thread);
1782 pr_debug("svms 0x%p process mm gone\n", svms);
1786 mutex_lock(&process_info->lock);
1787 svm_range_list_lock_and_flush_work(svms, mm);
1788 mutex_lock(&svms->lock);
1790 evicted_ranges = atomic_read(&svms->evicted_ranges);
1792 list_for_each_entry(prange, &svms->list, list) {
1793 invalid = atomic_read(&prange->invalid);
1797 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n",
1798 prange->svms, prange, prange->start, prange->last,
1802 * If range is migrating, wait for migration is done.
1804 mutex_lock(&prange->migrate_mutex);
1806 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE,
1807 false, true, false);
1809 pr_debug("failed %d to map 0x%lx to gpus\n", r,
1812 mutex_unlock(&prange->migrate_mutex);
1814 goto out_reschedule;
1816 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid)
1817 goto out_reschedule;
1820 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) !=
1822 goto out_reschedule;
1826 r = kgd2kfd_resume_mm(mm);
1828 /* No recovery from this failure. Probably the CP is
1829 * hanging. No point trying again.
1831 pr_debug("failed %d to resume KFD\n", r);
1834 pr_debug("restore svm ranges successfully\n");
1837 mutex_unlock(&svms->lock);
1838 mmap_write_unlock(mm);
1839 mutex_unlock(&process_info->lock);
1841 /* If validation failed, reschedule another attempt */
1842 if (evicted_ranges) {
1843 pr_debug("reschedule to restore svm range\n");
1844 schedule_delayed_work(&svms->restore_work,
1845 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1847 kfd_smi_event_queue_restore_rescheduled(mm);
1853 * svm_range_evict - evict svm range
1854 * @prange: svm range structure
1855 * @mm: current process mm_struct
1856 * @start: starting process queue number
1857 * @last: last process queue number
1858 * @event: mmu notifier event when range is evicted or migrated
1860 * Stop all queues of the process to ensure GPU doesn't access the memory, then
1861 * return to let CPU evict the buffer and proceed CPU pagetable update.
1863 * Don't need use lock to sync cpu pagetable invalidation with GPU execution.
1864 * If invalidation happens while restore work is running, restore work will
1865 * restart to ensure to get the latest CPU pages mapping to GPU, then start
1869 svm_range_evict(struct svm_range *prange, struct mm_struct *mm,
1870 unsigned long start, unsigned long last,
1871 enum mmu_notifier_event event)
1873 struct svm_range_list *svms = prange->svms;
1874 struct svm_range *pchild;
1875 struct kfd_process *p;
1878 p = container_of(svms, struct kfd_process, svms);
1880 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
1881 svms, prange->start, prange->last, start, last);
1883 if (!p->xnack_enabled ||
1884 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) {
1886 bool mapped = prange->mapped_to_gpu;
1888 list_for_each_entry(pchild, &prange->child_list, child_list) {
1889 if (!pchild->mapped_to_gpu)
1892 mutex_lock_nested(&pchild->lock, 1);
1893 if (pchild->start <= last && pchild->last >= start) {
1894 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n",
1895 pchild->start, pchild->last);
1896 atomic_inc(&pchild->invalid);
1898 mutex_unlock(&pchild->lock);
1904 if (prange->start <= last && prange->last >= start)
1905 atomic_inc(&prange->invalid);
1907 evicted_ranges = atomic_inc_return(&svms->evicted_ranges);
1908 if (evicted_ranges != 1)
1911 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n",
1912 prange->svms, prange->start, prange->last);
1914 /* First eviction, stop the queues */
1915 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM);
1917 pr_debug("failed to quiesce KFD\n");
1919 pr_debug("schedule to restore svm %p ranges\n", svms);
1920 schedule_delayed_work(&svms->restore_work,
1921 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1926 if (event == MMU_NOTIFY_MIGRATE)
1927 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE;
1929 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY;
1931 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n",
1932 prange->svms, start, last);
1933 list_for_each_entry(pchild, &prange->child_list, child_list) {
1934 mutex_lock_nested(&pchild->lock, 1);
1935 s = max(start, pchild->start);
1936 l = min(last, pchild->last);
1938 svm_range_unmap_from_gpus(pchild, s, l, trigger);
1939 mutex_unlock(&pchild->lock);
1941 s = max(start, prange->start);
1942 l = min(last, prange->last);
1944 svm_range_unmap_from_gpus(prange, s, l, trigger);
1950 static struct svm_range *svm_range_clone(struct svm_range *old)
1952 struct svm_range *new;
1954 new = svm_range_new(old->svms, old->start, old->last, false);
1957 if (svm_range_copy_dma_addrs(new, old)) {
1958 svm_range_free(new, false);
1962 new->ttm_res = old->ttm_res;
1963 new->offset = old->offset;
1964 new->svm_bo = svm_range_bo_ref(old->svm_bo);
1965 spin_lock(&new->svm_bo->list_lock);
1966 list_add(&new->svm_bo_list, &new->svm_bo->range_list);
1967 spin_unlock(&new->svm_bo->list_lock);
1969 new->flags = old->flags;
1970 new->preferred_loc = old->preferred_loc;
1971 new->prefetch_loc = old->prefetch_loc;
1972 new->actual_loc = old->actual_loc;
1973 new->granularity = old->granularity;
1974 new->mapped_to_gpu = old->mapped_to_gpu;
1975 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
1976 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
1981 void svm_range_set_max_pages(struct amdgpu_device *adev)
1984 uint64_t pages, _pages;
1985 uint64_t min_pages = 0;
1988 for (i = 0; i < adev->kfd.dev->num_nodes; i++) {
1989 if (adev->kfd.dev->nodes[i]->xcp)
1990 id = adev->kfd.dev->nodes[i]->xcp->id;
1993 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17;
1994 pages = clamp(pages, 1ULL << 9, 1ULL << 18);
1995 pages = rounddown_pow_of_two(pages);
1996 min_pages = min_not_zero(min_pages, pages);
2000 max_pages = READ_ONCE(max_svm_range_pages);
2001 _pages = min_not_zero(max_pages, min_pages);
2002 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages);
2006 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last,
2007 uint64_t max_pages, struct list_head *insert_list,
2008 struct list_head *update_list)
2010 struct svm_range *prange;
2013 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n",
2014 max_pages, start, last);
2016 while (last >= start) {
2017 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1);
2019 prange = svm_range_new(svms, start, l, true);
2022 list_add(&prange->list, insert_list);
2023 list_add(&prange->update_list, update_list);
2031 * svm_range_add - add svm range and handle overlap
2032 * @p: the range add to this process svms
2033 * @start: page size aligned
2034 * @size: page size aligned
2035 * @nattr: number of attributes
2036 * @attrs: array of attributes
2037 * @update_list: output, the ranges need validate and update GPU mapping
2038 * @insert_list: output, the ranges need insert to svms
2039 * @remove_list: output, the ranges are replaced and need remove from svms
2041 * Check if the virtual address range has overlap with any existing ranges,
2042 * split partly overlapping ranges and add new ranges in the gaps. All changes
2043 * should be applied to the range_list and interval tree transactionally. If
2044 * any range split or allocation fails, the entire update fails. Therefore any
2045 * existing overlapping svm_ranges are cloned and the original svm_ranges left
2048 * If the transaction succeeds, the caller can update and insert clones and
2049 * new ranges, then free the originals.
2051 * Otherwise the caller can free the clones and new ranges, while the old
2052 * svm_ranges remain unchanged.
2054 * Context: Process context, caller must hold svms->lock
2057 * 0 - OK, otherwise error code
2060 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size,
2061 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
2062 struct list_head *update_list, struct list_head *insert_list,
2063 struct list_head *remove_list)
2065 unsigned long last = start + size - 1UL;
2066 struct svm_range_list *svms = &p->svms;
2067 struct interval_tree_node *node;
2068 struct svm_range *prange;
2069 struct svm_range *tmp;
2070 struct list_head new_list;
2073 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last);
2075 INIT_LIST_HEAD(update_list);
2076 INIT_LIST_HEAD(insert_list);
2077 INIT_LIST_HEAD(remove_list);
2078 INIT_LIST_HEAD(&new_list);
2080 node = interval_tree_iter_first(&svms->objects, start, last);
2082 struct interval_tree_node *next;
2083 unsigned long next_start;
2085 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start,
2088 prange = container_of(node, struct svm_range, it_node);
2089 next = interval_tree_iter_next(node, start, last);
2090 next_start = min(node->last, last) + 1;
2092 if (svm_range_is_same_attrs(p, prange, nattr, attrs)) {
2094 } else if (node->start < start || node->last > last) {
2095 /* node intersects the update range and its attributes
2096 * will change. Clone and split it, apply updates only
2097 * to the overlapping part
2099 struct svm_range *old = prange;
2101 prange = svm_range_clone(old);
2107 list_add(&old->update_list, remove_list);
2108 list_add(&prange->list, insert_list);
2109 list_add(&prange->update_list, update_list);
2111 if (node->start < start) {
2112 pr_debug("change old range start\n");
2113 r = svm_range_split_head(prange, start,
2118 if (node->last > last) {
2119 pr_debug("change old range last\n");
2120 r = svm_range_split_tail(prange, last,
2126 /* The node is contained within start..last,
2129 list_add(&prange->update_list, update_list);
2132 /* insert a new node if needed */
2133 if (node->start > start) {
2134 r = svm_range_split_new(svms, start, node->start - 1,
2135 READ_ONCE(max_svm_range_pages),
2136 &new_list, update_list);
2145 /* add a final range at the end if needed */
2147 r = svm_range_split_new(svms, start, last,
2148 READ_ONCE(max_svm_range_pages),
2149 &new_list, update_list);
2153 list_for_each_entry_safe(prange, tmp, insert_list, list)
2154 svm_range_free(prange, false);
2155 list_for_each_entry_safe(prange, tmp, &new_list, list)
2156 svm_range_free(prange, true);
2158 list_splice(&new_list, insert_list);
2165 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm,
2166 struct svm_range *prange)
2168 unsigned long start;
2171 start = prange->notifier.interval_tree.start >> PAGE_SHIFT;
2172 last = prange->notifier.interval_tree.last >> PAGE_SHIFT;
2174 if (prange->start == start && prange->last == last)
2177 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
2178 prange->svms, prange, start, last, prange->start,
2181 if (start != 0 && last != 0) {
2182 interval_tree_remove(&prange->it_node, &prange->svms->objects);
2183 svm_range_remove_notifier(prange);
2185 prange->it_node.start = prange->start;
2186 prange->it_node.last = prange->last;
2188 interval_tree_insert(&prange->it_node, &prange->svms->objects);
2189 svm_range_add_notifier_locked(mm, prange);
2193 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange,
2194 struct mm_struct *mm)
2196 switch (prange->work_item.op) {
2198 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2199 svms, prange, prange->start, prange->last);
2201 case SVM_OP_UNMAP_RANGE:
2202 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2203 svms, prange, prange->start, prange->last);
2204 svm_range_unlink(prange);
2205 svm_range_remove_notifier(prange);
2206 svm_range_free(prange, true);
2208 case SVM_OP_UPDATE_RANGE_NOTIFIER:
2209 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2210 svms, prange, prange->start, prange->last);
2211 svm_range_update_notifier_and_interval_tree(mm, prange);
2213 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP:
2214 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2215 svms, prange, prange->start, prange->last);
2216 svm_range_update_notifier_and_interval_tree(mm, prange);
2217 /* TODO: implement deferred validation and mapping */
2219 case SVM_OP_ADD_RANGE:
2220 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange,
2221 prange->start, prange->last);
2222 svm_range_add_to_svms(prange);
2223 svm_range_add_notifier_locked(mm, prange);
2225 case SVM_OP_ADD_RANGE_AND_MAP:
2226 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms,
2227 prange, prange->start, prange->last);
2228 svm_range_add_to_svms(prange);
2229 svm_range_add_notifier_locked(mm, prange);
2230 /* TODO: implement deferred validation and mapping */
2233 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange,
2234 prange->work_item.op);
2238 static void svm_range_drain_retry_fault(struct svm_range_list *svms)
2240 struct kfd_process_device *pdd;
2241 struct kfd_process *p;
2245 p = container_of(svms, struct kfd_process, svms);
2248 drain = atomic_read(&svms->drain_pagefaults);
2252 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) {
2257 pr_debug("drain retry fault gpu %d svms %p\n", i, svms);
2259 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2260 pdd->dev->adev->irq.retry_cam_enabled ?
2261 &pdd->dev->adev->irq.ih :
2262 &pdd->dev->adev->irq.ih1);
2264 if (pdd->dev->adev->irq.retry_cam_enabled)
2265 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2266 &pdd->dev->adev->irq.ih_soft);
2269 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms);
2271 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain)
2275 static void svm_range_deferred_list_work(struct work_struct *work)
2277 struct svm_range_list *svms;
2278 struct svm_range *prange;
2279 struct mm_struct *mm;
2281 svms = container_of(work, struct svm_range_list, deferred_list_work);
2282 pr_debug("enter svms 0x%p\n", svms);
2284 spin_lock(&svms->deferred_list_lock);
2285 while (!list_empty(&svms->deferred_range_list)) {
2286 prange = list_first_entry(&svms->deferred_range_list,
2287 struct svm_range, deferred_list);
2288 spin_unlock(&svms->deferred_list_lock);
2290 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange,
2291 prange->start, prange->last, prange->work_item.op);
2293 mm = prange->work_item.mm;
2295 mmap_write_lock(mm);
2297 /* Checking for the need to drain retry faults must be inside
2298 * mmap write lock to serialize with munmap notifiers.
2300 if (unlikely(atomic_read(&svms->drain_pagefaults))) {
2301 mmap_write_unlock(mm);
2302 svm_range_drain_retry_fault(svms);
2306 /* Remove from deferred_list must be inside mmap write lock, for
2308 * 1. unmap_from_cpu may change work_item.op and add the range
2309 * to deferred_list again, cause use after free bug.
2310 * 2. svm_range_list_lock_and_flush_work may hold mmap write
2311 * lock and continue because deferred_list is empty, but
2312 * deferred_list work is actually waiting for mmap lock.
2314 spin_lock(&svms->deferred_list_lock);
2315 list_del_init(&prange->deferred_list);
2316 spin_unlock(&svms->deferred_list_lock);
2318 mutex_lock(&svms->lock);
2319 mutex_lock(&prange->migrate_mutex);
2320 while (!list_empty(&prange->child_list)) {
2321 struct svm_range *pchild;
2323 pchild = list_first_entry(&prange->child_list,
2324 struct svm_range, child_list);
2325 pr_debug("child prange 0x%p op %d\n", pchild,
2326 pchild->work_item.op);
2327 list_del_init(&pchild->child_list);
2328 svm_range_handle_list_op(svms, pchild, mm);
2330 mutex_unlock(&prange->migrate_mutex);
2332 svm_range_handle_list_op(svms, prange, mm);
2333 mutex_unlock(&svms->lock);
2334 mmap_write_unlock(mm);
2336 /* Pairs with mmget in svm_range_add_list_work */
2339 spin_lock(&svms->deferred_list_lock);
2341 spin_unlock(&svms->deferred_list_lock);
2342 pr_debug("exit svms 0x%p\n", svms);
2346 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange,
2347 struct mm_struct *mm, enum svm_work_list_ops op)
2349 spin_lock(&svms->deferred_list_lock);
2350 /* if prange is on the deferred list */
2351 if (!list_empty(&prange->deferred_list)) {
2352 pr_debug("update exist prange 0x%p work op %d\n", prange, op);
2353 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n");
2354 if (op != SVM_OP_NULL &&
2355 prange->work_item.op != SVM_OP_UNMAP_RANGE)
2356 prange->work_item.op = op;
2358 prange->work_item.op = op;
2360 /* Pairs with mmput in deferred_list_work */
2362 prange->work_item.mm = mm;
2363 list_add_tail(&prange->deferred_list,
2364 &prange->svms->deferred_range_list);
2365 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n",
2366 prange, prange->start, prange->last, op);
2368 spin_unlock(&svms->deferred_list_lock);
2371 void schedule_deferred_list_work(struct svm_range_list *svms)
2373 spin_lock(&svms->deferred_list_lock);
2374 if (!list_empty(&svms->deferred_range_list))
2375 schedule_work(&svms->deferred_list_work);
2376 spin_unlock(&svms->deferred_list_lock);
2380 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent,
2381 struct svm_range *prange, unsigned long start,
2384 struct svm_range *head;
2385 struct svm_range *tail;
2387 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2388 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange,
2389 prange->start, prange->last);
2392 if (start > prange->last || last < prange->start)
2395 head = tail = prange;
2396 if (start > prange->start)
2397 svm_range_split(prange, prange->start, start - 1, &tail);
2398 if (last < tail->last)
2399 svm_range_split(tail, last + 1, tail->last, &head);
2401 if (head != prange && tail != prange) {
2402 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2403 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
2404 } else if (tail != prange) {
2405 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE);
2406 } else if (head != prange) {
2407 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2408 } else if (parent != prange) {
2409 prange->work_item.op = SVM_OP_UNMAP_RANGE;
2414 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange,
2415 unsigned long start, unsigned long last)
2417 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU;
2418 struct svm_range_list *svms;
2419 struct svm_range *pchild;
2420 struct kfd_process *p;
2424 p = kfd_lookup_process_by_mm(mm);
2429 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms,
2430 prange, prange->start, prange->last, start, last);
2432 /* Make sure pending page faults are drained in the deferred worker
2433 * before the range is freed to avoid straggler interrupts on
2434 * unmapped memory causing "phantom faults".
2436 atomic_inc(&svms->drain_pagefaults);
2438 unmap_parent = start <= prange->start && last >= prange->last;
2440 list_for_each_entry(pchild, &prange->child_list, child_list) {
2441 mutex_lock_nested(&pchild->lock, 1);
2442 s = max(start, pchild->start);
2443 l = min(last, pchild->last);
2445 svm_range_unmap_from_gpus(pchild, s, l, trigger);
2446 svm_range_unmap_split(mm, prange, pchild, start, last);
2447 mutex_unlock(&pchild->lock);
2449 s = max(start, prange->start);
2450 l = min(last, prange->last);
2452 svm_range_unmap_from_gpus(prange, s, l, trigger);
2453 svm_range_unmap_split(mm, prange, prange, start, last);
2456 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE);
2458 svm_range_add_list_work(svms, prange, mm,
2459 SVM_OP_UPDATE_RANGE_NOTIFIER);
2460 schedule_deferred_list_work(svms);
2462 kfd_unref_process(p);
2466 * svm_range_cpu_invalidate_pagetables - interval notifier callback
2467 * @mni: mmu_interval_notifier struct
2468 * @range: mmu_notifier_range struct
2469 * @cur_seq: value to pass to mmu_interval_set_seq()
2471 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it
2472 * is from migration, or CPU page invalidation callback.
2474 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed
2475 * work thread, and split prange if only part of prange is unmapped.
2477 * For invalidation event, if GPU retry fault is not enabled, evict the queues,
2478 * then schedule svm_range_restore_work to update GPU mapping and resume queues.
2479 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will
2480 * update GPU mapping to recover.
2482 * Context: mmap lock, notifier_invalidate_start lock are held
2483 * for invalidate event, prange lock is held if this is from migration
2486 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
2487 const struct mmu_notifier_range *range,
2488 unsigned long cur_seq)
2490 struct svm_range *prange;
2491 unsigned long start;
2494 if (range->event == MMU_NOTIFY_RELEASE)
2496 if (!mmget_not_zero(mni->mm))
2499 start = mni->interval_tree.start;
2500 last = mni->interval_tree.last;
2501 start = max(start, range->start) >> PAGE_SHIFT;
2502 last = min(last, range->end - 1) >> PAGE_SHIFT;
2503 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n",
2504 start, last, range->start >> PAGE_SHIFT,
2505 (range->end - 1) >> PAGE_SHIFT,
2506 mni->interval_tree.start >> PAGE_SHIFT,
2507 mni->interval_tree.last >> PAGE_SHIFT, range->event);
2509 prange = container_of(mni, struct svm_range, notifier);
2511 svm_range_lock(prange);
2512 mmu_interval_set_seq(mni, cur_seq);
2514 switch (range->event) {
2515 case MMU_NOTIFY_UNMAP:
2516 svm_range_unmap_from_cpu(mni->mm, prange, start, last);
2519 svm_range_evict(prange, mni->mm, start, last, range->event);
2523 svm_range_unlock(prange);
2530 * svm_range_from_addr - find svm range from fault address
2531 * @svms: svm range list header
2532 * @addr: address to search range interval tree, in pages
2533 * @parent: parent range if range is on child list
2535 * Context: The caller must hold svms->lock
2537 * Return: the svm_range found or NULL
2540 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr,
2541 struct svm_range **parent)
2543 struct interval_tree_node *node;
2544 struct svm_range *prange;
2545 struct svm_range *pchild;
2547 node = interval_tree_iter_first(&svms->objects, addr, addr);
2551 prange = container_of(node, struct svm_range, it_node);
2552 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n",
2553 addr, prange->start, prange->last, node->start, node->last);
2555 if (addr >= prange->start && addr <= prange->last) {
2560 list_for_each_entry(pchild, &prange->child_list, child_list)
2561 if (addr >= pchild->start && addr <= pchild->last) {
2562 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n",
2563 addr, pchild->start, pchild->last);
2572 /* svm_range_best_restore_location - decide the best fault restore location
2573 * @prange: svm range structure
2574 * @adev: the GPU on which vm fault happened
2576 * This is only called when xnack is on, to decide the best location to restore
2577 * the range mapping after GPU vm fault. Caller uses the best location to do
2578 * migration if actual loc is not best location, then update GPU page table
2579 * mapping to the best location.
2581 * If the preferred loc is accessible by faulting GPU, use preferred loc.
2582 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu
2583 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then
2584 * if range actual loc is cpu, best_loc is cpu
2585 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is
2587 * Otherwise, GPU no access, best_loc is -1.
2590 * -1 means vm fault GPU no access
2591 * 0 for CPU or GPU id
2594 svm_range_best_restore_location(struct svm_range *prange,
2595 struct kfd_node *node,
2598 struct kfd_node *bo_node, *preferred_node;
2599 struct kfd_process *p;
2603 p = container_of(prange->svms, struct kfd_process, svms);
2605 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx);
2607 pr_debug("failed to get gpuid from kgd\n");
2611 if (node->adev->gmc.is_app_apu)
2614 if (prange->preferred_loc == gpuid ||
2615 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) {
2616 return prange->preferred_loc;
2617 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
2618 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc);
2619 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node))
2620 return prange->preferred_loc;
2624 if (test_bit(*gpuidx, prange->bitmap_access))
2627 if (test_bit(*gpuidx, prange->bitmap_aip)) {
2628 if (!prange->actual_loc)
2631 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc);
2632 if (bo_node && svm_nodes_in_same_hive(node, bo_node))
2633 return prange->actual_loc;
2642 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr,
2643 unsigned long *start, unsigned long *last,
2644 bool *is_heap_stack)
2646 struct vm_area_struct *vma;
2647 struct interval_tree_node *node;
2648 unsigned long start_limit, end_limit;
2650 vma = vma_lookup(p->mm, addr << PAGE_SHIFT);
2652 pr_debug("VMA does not exist in address [0x%llx]\n", addr);
2656 *is_heap_stack = (vma->vm_start <= vma->vm_mm->brk &&
2657 vma->vm_end >= vma->vm_mm->start_brk) ||
2658 (vma->vm_start <= vma->vm_mm->start_stack &&
2659 vma->vm_end >= vma->vm_mm->start_stack);
2661 start_limit = max(vma->vm_start >> PAGE_SHIFT,
2662 (unsigned long)ALIGN_DOWN(addr, 2UL << 8));
2663 end_limit = min(vma->vm_end >> PAGE_SHIFT,
2664 (unsigned long)ALIGN(addr + 1, 2UL << 8));
2665 /* First range that starts after the fault address */
2666 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX);
2668 end_limit = min(end_limit, node->start);
2669 /* Last range that ends before the fault address */
2670 node = container_of(rb_prev(&node->rb),
2671 struct interval_tree_node, rb);
2673 /* Last range must end before addr because
2674 * there was no range after addr
2676 node = container_of(rb_last(&p->svms.objects.rb_root),
2677 struct interval_tree_node, rb);
2680 if (node->last >= addr) {
2681 WARN(1, "Overlap with prev node and page fault addr\n");
2684 start_limit = max(start_limit, node->last + 1);
2687 *start = start_limit;
2688 *last = end_limit - 1;
2690 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n",
2691 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT,
2692 *start, *last, *is_heap_stack);
2698 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last,
2699 uint64_t *bo_s, uint64_t *bo_l)
2701 struct amdgpu_bo_va_mapping *mapping;
2702 struct interval_tree_node *node;
2703 struct amdgpu_bo *bo = NULL;
2704 unsigned long userptr;
2708 for (i = 0; i < p->n_pdds; i++) {
2709 struct amdgpu_vm *vm;
2711 if (!p->pdds[i]->drm_priv)
2714 vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
2715 r = amdgpu_bo_reserve(vm->root.bo, false);
2719 /* Check userptr by searching entire vm->va interval tree */
2720 node = interval_tree_iter_first(&vm->va, 0, ~0ULL);
2722 mapping = container_of((struct rb_node *)node,
2723 struct amdgpu_bo_va_mapping, rb);
2724 bo = mapping->bo_va->base.bo;
2726 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm,
2727 start << PAGE_SHIFT,
2730 node = interval_tree_iter_next(node, 0, ~0ULL);
2734 pr_debug("[0x%llx 0x%llx] already userptr mapped\n",
2737 *bo_s = userptr >> PAGE_SHIFT;
2738 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1;
2740 amdgpu_bo_unreserve(vm->root.bo);
2743 amdgpu_bo_unreserve(vm->root.bo);
2749 svm_range *svm_range_create_unregistered_range(struct kfd_node *node,
2750 struct kfd_process *p,
2751 struct mm_struct *mm,
2754 struct svm_range *prange = NULL;
2755 unsigned long start, last;
2756 uint32_t gpuid, gpuidx;
2762 if (svm_range_get_range_boundaries(p, addr, &start, &last,
2766 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l);
2767 if (r != -EADDRINUSE)
2768 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l);
2770 if (r == -EADDRINUSE) {
2771 if (addr >= bo_s && addr <= bo_l)
2774 /* Create one page svm range if 2MB range overlapping */
2779 prange = svm_range_new(&p->svms, start, last, true);
2781 pr_debug("Failed to create prange in address [0x%llx]\n", addr);
2784 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) {
2785 pr_debug("failed to get gpuid from kgd\n");
2786 svm_range_free(prange, true);
2791 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM;
2793 svm_range_add_to_svms(prange);
2794 svm_range_add_notifier_locked(mm, prange);
2799 /* svm_range_skip_recover - decide if prange can be recovered
2800 * @prange: svm range structure
2802 * GPU vm retry fault handle skip recover the range for cases:
2803 * 1. prange is on deferred list to be removed after unmap, it is stale fault,
2804 * deferred list work will drain the stale fault before free the prange.
2805 * 2. prange is on deferred list to add interval notifier after split, or
2806 * 3. prange is child range, it is split from parent prange, recover later
2807 * after interval notifier is added.
2809 * Return: true to skip recover, false to recover
2811 static bool svm_range_skip_recover(struct svm_range *prange)
2813 struct svm_range_list *svms = prange->svms;
2815 spin_lock(&svms->deferred_list_lock);
2816 if (list_empty(&prange->deferred_list) &&
2817 list_empty(&prange->child_list)) {
2818 spin_unlock(&svms->deferred_list_lock);
2821 spin_unlock(&svms->deferred_list_lock);
2823 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2824 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n",
2825 svms, prange, prange->start, prange->last);
2828 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP ||
2829 prange->work_item.op == SVM_OP_ADD_RANGE) {
2830 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n",
2831 svms, prange, prange->start, prange->last);
2838 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p,
2841 struct kfd_process_device *pdd;
2843 /* fault is on different page of same range
2844 * or fault is skipped to recover later
2845 * or fault is on invalid virtual address
2847 if (gpuidx == MAX_GPU_INSTANCE) {
2851 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx);
2856 /* fault is recovered
2857 * or fault cannot recover because GPU no access on the range
2859 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
2861 WRITE_ONCE(pdd->faults, pdd->faults + 1);
2865 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault)
2867 unsigned long requested = VM_READ;
2870 requested |= VM_WRITE;
2872 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested,
2874 return (vma->vm_flags & requested) == requested;
2878 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid,
2879 uint32_t vmid, uint32_t node_id,
2880 uint64_t addr, bool write_fault)
2882 struct mm_struct *mm = NULL;
2883 struct svm_range_list *svms;
2884 struct svm_range *prange;
2885 struct kfd_process *p;
2886 ktime_t timestamp = ktime_get_boottime();
2887 struct kfd_node *node;
2889 int32_t gpuidx = MAX_GPU_INSTANCE;
2890 bool write_locked = false;
2891 struct vm_area_struct *vma;
2892 bool migration = false;
2895 if (!KFD_IS_SVM_API_SUPPORTED(adev)) {
2896 pr_debug("device does not support SVM\n");
2900 p = kfd_lookup_process_by_pasid(pasid);
2902 pr_debug("kfd process not founded pasid 0x%x\n", pasid);
2907 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr);
2909 if (atomic_read(&svms->drain_pagefaults)) {
2910 pr_debug("draining retry fault, drop fault 0x%llx\n", addr);
2915 if (!p->xnack_enabled) {
2916 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid);
2921 /* p->lead_thread is available as kfd_process_wq_release flush the work
2922 * before releasing task ref.
2924 mm = get_task_mm(p->lead_thread);
2926 pr_debug("svms 0x%p failed to get mm\n", svms);
2931 node = kfd_node_by_irq_ids(adev, node_id, vmid);
2933 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id,
2940 mutex_lock(&svms->lock);
2941 prange = svm_range_from_addr(svms, addr, NULL);
2943 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n",
2945 if (!write_locked) {
2946 /* Need the write lock to create new range with MMU notifier.
2947 * Also flush pending deferred work to make sure the interval
2948 * tree is up to date before we add a new range
2950 mutex_unlock(&svms->lock);
2951 mmap_read_unlock(mm);
2952 mmap_write_lock(mm);
2953 write_locked = true;
2954 goto retry_write_locked;
2956 prange = svm_range_create_unregistered_range(node, p, mm, addr);
2958 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n",
2960 mmap_write_downgrade(mm);
2962 goto out_unlock_svms;
2966 mmap_write_downgrade(mm);
2968 mutex_lock(&prange->migrate_mutex);
2970 if (svm_range_skip_recover(prange)) {
2971 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
2973 goto out_unlock_range;
2976 /* skip duplicate vm fault on different pages of same range */
2977 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp,
2978 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) {
2979 pr_debug("svms 0x%p [0x%lx %lx] already restored\n",
2980 svms, prange->start, prange->last);
2982 goto out_unlock_range;
2985 /* __do_munmap removed VMA, return success as we are handling stale
2988 vma = vma_lookup(mm, addr << PAGE_SHIFT);
2990 pr_debug("address 0x%llx VMA is removed\n", addr);
2992 goto out_unlock_range;
2995 if (!svm_fault_allowed(vma, write_fault)) {
2996 pr_debug("fault addr 0x%llx no %s permission\n", addr,
2997 write_fault ? "write" : "read");
2999 goto out_unlock_range;
3002 best_loc = svm_range_best_restore_location(prange, node, &gpuidx);
3003 if (best_loc == -1) {
3004 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n",
3005 svms, prange->start, prange->last);
3007 goto out_unlock_range;
3010 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n",
3011 svms, prange->start, prange->last, best_loc,
3012 prange->actual_loc);
3014 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr,
3015 write_fault, timestamp);
3017 if (prange->actual_loc != best_loc) {
3020 r = svm_migrate_to_vram(prange, best_loc, mm,
3021 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU);
3023 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n",
3025 /* Fallback to system memory if migration to
3028 if (prange->actual_loc)
3029 r = svm_migrate_vram_to_ram(prange, mm,
3030 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU,
3036 r = svm_migrate_vram_to_ram(prange, mm,
3037 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU,
3041 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n",
3042 r, svms, prange->start, prange->last);
3043 goto out_unlock_range;
3047 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false);
3049 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n",
3050 r, svms, prange->start, prange->last);
3052 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr,
3056 mutex_unlock(&prange->migrate_mutex);
3058 mutex_unlock(&svms->lock);
3059 mmap_read_unlock(mm);
3061 svm_range_count_fault(node, p, gpuidx);
3065 kfd_unref_process(p);
3068 pr_debug("recover vm fault later\n");
3069 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
3076 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled)
3078 struct svm_range *prange, *pchild;
3079 uint64_t reserved_size = 0;
3083 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled);
3085 mutex_lock(&p->svms.lock);
3087 list_for_each_entry(prange, &p->svms.list, list) {
3088 svm_range_lock(prange);
3089 list_for_each_entry(pchild, &prange->child_list, child_list) {
3090 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT;
3091 if (xnack_enabled) {
3092 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3093 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3095 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3096 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3099 reserved_size += size;
3103 size = (prange->last - prange->start + 1) << PAGE_SHIFT;
3104 if (xnack_enabled) {
3105 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3106 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3108 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3109 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3112 reserved_size += size;
3115 svm_range_unlock(prange);
3121 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size,
3122 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3124 /* Change xnack mode must be inside svms lock, to avoid race with
3125 * svm_range_deferred_list_work unreserve memory in parallel.
3127 p->xnack_enabled = xnack_enabled;
3129 mutex_unlock(&p->svms.lock);
3133 void svm_range_list_fini(struct kfd_process *p)
3135 struct svm_range *prange;
3136 struct svm_range *next;
3138 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms);
3140 cancel_delayed_work_sync(&p->svms.restore_work);
3142 /* Ensure list work is finished before process is destroyed */
3143 flush_work(&p->svms.deferred_list_work);
3146 * Ensure no retry fault comes in afterwards, as page fault handler will
3147 * not find kfd process and take mm lock to recover fault.
3149 atomic_inc(&p->svms.drain_pagefaults);
3150 svm_range_drain_retry_fault(&p->svms);
3152 list_for_each_entry_safe(prange, next, &p->svms.list, list) {
3153 svm_range_unlink(prange);
3154 svm_range_remove_notifier(prange);
3155 svm_range_free(prange, true);
3158 mutex_destroy(&p->svms.lock);
3160 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms);
3163 int svm_range_list_init(struct kfd_process *p)
3165 struct svm_range_list *svms = &p->svms;
3168 svms->objects = RB_ROOT_CACHED;
3169 mutex_init(&svms->lock);
3170 INIT_LIST_HEAD(&svms->list);
3171 atomic_set(&svms->evicted_ranges, 0);
3172 atomic_set(&svms->drain_pagefaults, 0);
3173 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work);
3174 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work);
3175 INIT_LIST_HEAD(&svms->deferred_range_list);
3176 INIT_LIST_HEAD(&svms->criu_svm_metadata_list);
3177 spin_lock_init(&svms->deferred_list_lock);
3179 for (i = 0; i < p->n_pdds; i++)
3180 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev))
3181 bitmap_set(svms->bitmap_supported, i, 1);
3187 * svm_range_check_vm - check if virtual address range mapped already
3188 * @p: current kfd_process
3189 * @start: range start address, in pages
3190 * @last: range last address, in pages
3191 * @bo_s: mapping start address in pages if address range already mapped
3192 * @bo_l: mapping last address in pages if address range already mapped
3194 * The purpose is to avoid virtual address ranges already allocated by
3195 * kfd_ioctl_alloc_memory_of_gpu ioctl.
3196 * It looks for each pdd in the kfd_process.
3198 * Context: Process context
3200 * Return 0 - OK, if the range is not mapped.
3201 * Otherwise error code:
3202 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu
3203 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by
3204 * a signal. Release all buffer reservations and return to user-space.
3207 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
3208 uint64_t *bo_s, uint64_t *bo_l)
3210 struct amdgpu_bo_va_mapping *mapping;
3211 struct interval_tree_node *node;
3215 for (i = 0; i < p->n_pdds; i++) {
3216 struct amdgpu_vm *vm;
3218 if (!p->pdds[i]->drm_priv)
3221 vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
3222 r = amdgpu_bo_reserve(vm->root.bo, false);
3226 node = interval_tree_iter_first(&vm->va, start, last);
3228 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n",
3230 mapping = container_of((struct rb_node *)node,
3231 struct amdgpu_bo_va_mapping, rb);
3233 *bo_s = mapping->start;
3234 *bo_l = mapping->last;
3236 amdgpu_bo_unreserve(vm->root.bo);
3239 amdgpu_bo_unreserve(vm->root.bo);
3246 * svm_range_is_valid - check if virtual address range is valid
3247 * @p: current kfd_process
3248 * @start: range start address, in pages
3249 * @size: range size, in pages
3251 * Valid virtual address range means it belongs to one or more VMAs
3253 * Context: Process context
3256 * 0 - OK, otherwise error code
3259 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size)
3261 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP;
3262 struct vm_area_struct *vma;
3264 unsigned long start_unchg = start;
3266 start <<= PAGE_SHIFT;
3267 end = start + (size << PAGE_SHIFT);
3269 vma = vma_lookup(p->mm, start);
3270 if (!vma || (vma->vm_flags & device_vma))
3272 start = min(end, vma->vm_end);
3273 } while (start < end);
3275 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL,
3280 * svm_range_best_prefetch_location - decide the best prefetch location
3281 * @prange: svm range structure
3284 * If range map to single GPU, the best prefetch location is prefetch_loc, which
3285 * can be CPU or GPU.
3287 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on
3288 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise
3289 * the best prefetch location is always CPU, because GPU can not have coherent
3290 * mapping VRAM of other GPUs even with large-BAR PCIe connection.
3293 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is
3294 * prefetch_loc, other GPU access will generate vm fault and trigger migration.
3296 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same
3297 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best
3298 * prefetch location is always CPU.
3300 * Context: Process context
3303 * 0 for CPU or GPU id
3306 svm_range_best_prefetch_location(struct svm_range *prange)
3308 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
3309 uint32_t best_loc = prange->prefetch_loc;
3310 struct kfd_process_device *pdd;
3311 struct kfd_node *bo_node;
3312 struct kfd_process *p;
3315 p = container_of(prange->svms, struct kfd_process, svms);
3317 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED)
3320 bo_node = svm_range_get_node_by_id(prange, best_loc);
3322 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc);
3327 if (bo_node->adev->gmc.is_app_apu) {
3332 if (p->xnack_enabled)
3333 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
3335 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
3338 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
3339 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
3341 pr_debug("failed to get device by idx 0x%x\n", gpuidx);
3345 if (pdd->dev->adev == bo_node->adev)
3348 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) {
3355 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n",
3356 p->xnack_enabled, &p->svms, prange->start, prange->last,
3362 /* svm_range_trigger_migration - start page migration if prefetch loc changed
3363 * @mm: current process mm_struct
3364 * @prange: svm range structure
3365 * @migrated: output, true if migration is triggered
3367 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range
3369 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range
3372 * If GPU vm fault retry is not enabled, migration interact with MMU notifier
3374 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict
3375 * stops all queues, schedule restore work
3376 * 2. svm_range_restore_work wait for migration is done by
3377 * a. svm_range_validate_vram takes prange->migrate_mutex
3378 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns
3379 * 3. restore work update mappings of GPU, resume all queues.
3381 * Context: Process context
3384 * 0 - OK, otherwise - error code of migration
3387 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange,
3394 best_loc = svm_range_best_prefetch_location(prange);
3396 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3397 best_loc == prange->actual_loc)
3401 r = svm_migrate_vram_to_ram(prange, mm,
3402 KFD_MIGRATE_TRIGGER_PREFETCH, NULL);
3407 r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH);
3413 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence)
3418 if (dma_fence_is_signaled(&fence->base))
3421 if (fence->svm_bo) {
3422 WRITE_ONCE(fence->svm_bo->evicting, 1);
3423 schedule_work(&fence->svm_bo->eviction_work);
3429 static void svm_range_evict_svm_bo_worker(struct work_struct *work)
3431 struct svm_range_bo *svm_bo;
3432 struct mm_struct *mm;
3435 svm_bo = container_of(work, struct svm_range_bo, eviction_work);
3436 if (!svm_bo_ref_unless_zero(svm_bo))
3437 return; /* svm_bo was freed while eviction was pending */
3439 if (mmget_not_zero(svm_bo->eviction_fence->mm)) {
3440 mm = svm_bo->eviction_fence->mm;
3442 svm_range_bo_unref(svm_bo);
3447 spin_lock(&svm_bo->list_lock);
3448 while (!list_empty(&svm_bo->range_list) && !r) {
3449 struct svm_range *prange =
3450 list_first_entry(&svm_bo->range_list,
3451 struct svm_range, svm_bo_list);
3454 list_del_init(&prange->svm_bo_list);
3455 spin_unlock(&svm_bo->list_lock);
3457 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
3458 prange->start, prange->last);
3460 mutex_lock(&prange->migrate_mutex);
3462 r = svm_migrate_vram_to_ram(prange, mm,
3463 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL);
3464 } while (!r && prange->actual_loc && --retries);
3466 if (!r && prange->actual_loc)
3467 pr_info_once("Migration failed during eviction");
3469 if (!prange->actual_loc) {
3470 mutex_lock(&prange->lock);
3471 prange->svm_bo = NULL;
3472 mutex_unlock(&prange->lock);
3474 mutex_unlock(&prange->migrate_mutex);
3476 spin_lock(&svm_bo->list_lock);
3478 spin_unlock(&svm_bo->list_lock);
3479 mmap_read_unlock(mm);
3482 dma_fence_signal(&svm_bo->eviction_fence->base);
3484 /* This is the last reference to svm_bo, after svm_range_vram_node_free
3485 * has been called in svm_migrate_vram_to_ram
3487 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n");
3488 svm_range_bo_unref(svm_bo);
3492 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm,
3493 uint64_t start, uint64_t size, uint32_t nattr,
3494 struct kfd_ioctl_svm_attribute *attrs)
3496 struct amdkfd_process_info *process_info = p->kgd_process_info;
3497 struct list_head update_list;
3498 struct list_head insert_list;
3499 struct list_head remove_list;
3500 struct svm_range_list *svms;
3501 struct svm_range *prange;
3502 struct svm_range *next;
3503 bool update_mapping = false;
3507 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n",
3508 p->pasid, &p->svms, start, start + size - 1, size);
3510 r = svm_range_check_attr(p, nattr, attrs);
3516 mutex_lock(&process_info->lock);
3518 svm_range_list_lock_and_flush_work(svms, mm);
3520 r = svm_range_is_valid(p, start, size);
3522 pr_debug("invalid range r=%d\n", r);
3523 mmap_write_unlock(mm);
3527 mutex_lock(&svms->lock);
3529 /* Add new range and split existing ranges as needed */
3530 r = svm_range_add(p, start, size, nattr, attrs, &update_list,
3531 &insert_list, &remove_list);
3533 mutex_unlock(&svms->lock);
3534 mmap_write_unlock(mm);
3537 /* Apply changes as a transaction */
3538 list_for_each_entry_safe(prange, next, &insert_list, list) {
3539 svm_range_add_to_svms(prange);
3540 svm_range_add_notifier_locked(mm, prange);
3542 list_for_each_entry(prange, &update_list, update_list) {
3543 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping);
3544 /* TODO: unmap ranges from GPU that lost access */
3546 list_for_each_entry_safe(prange, next, &remove_list, update_list) {
3547 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n",
3548 prange->svms, prange, prange->start,
3550 svm_range_unlink(prange);
3551 svm_range_remove_notifier(prange);
3552 svm_range_free(prange, false);
3555 mmap_write_downgrade(mm);
3556 /* Trigger migrations and revalidate and map to GPUs as needed. If
3557 * this fails we may be left with partially completed actions. There
3558 * is no clean way of rolling back to the previous state in such a
3559 * case because the rollback wouldn't be guaranteed to work either.
3561 list_for_each_entry(prange, &update_list, update_list) {
3564 mutex_lock(&prange->migrate_mutex);
3566 r = svm_range_trigger_migration(mm, prange, &migrated);
3568 goto out_unlock_range;
3570 if (migrated && (!p->xnack_enabled ||
3571 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) &&
3572 prange->mapped_to_gpu) {
3573 pr_debug("restore_work will update mappings of GPUs\n");
3574 mutex_unlock(&prange->migrate_mutex);
3578 if (!migrated && !update_mapping) {
3579 mutex_unlock(&prange->migrate_mutex);
3583 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu;
3585 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE,
3586 true, true, flush_tlb);
3588 pr_debug("failed %d to map svm range\n", r);
3591 mutex_unlock(&prange->migrate_mutex);
3596 dynamic_svm_range_dump(svms);
3598 mutex_unlock(&svms->lock);
3599 mmap_read_unlock(mm);
3601 mutex_unlock(&process_info->lock);
3603 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid,
3604 &p->svms, start, start + size - 1, r);
3610 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm,
3611 uint64_t start, uint64_t size, uint32_t nattr,
3612 struct kfd_ioctl_svm_attribute *attrs)
3614 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE);
3615 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE);
3616 bool get_preferred_loc = false;
3617 bool get_prefetch_loc = false;
3618 bool get_granularity = false;
3619 bool get_accessible = false;
3620 bool get_flags = false;
3621 uint64_t last = start + size - 1UL;
3622 uint8_t granularity = 0xff;
3623 struct interval_tree_node *node;
3624 struct svm_range_list *svms;
3625 struct svm_range *prange;
3626 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3627 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3628 uint32_t flags_and = 0xffffffff;
3629 uint32_t flags_or = 0;
3634 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start,
3635 start + size - 1, nattr);
3637 /* Flush pending deferred work to avoid racing with deferred actions from
3638 * previous memory map changes (e.g. munmap). Concurrent memory map changes
3639 * can still race with get_attr because we don't hold the mmap lock. But that
3640 * would be a race condition in the application anyway, and undefined
3641 * behaviour is acceptable in that case.
3643 flush_work(&p->svms.deferred_list_work);
3646 r = svm_range_is_valid(p, start, size);
3647 mmap_read_unlock(mm);
3649 pr_debug("invalid range r=%d\n", r);
3653 for (i = 0; i < nattr; i++) {
3654 switch (attrs[i].type) {
3655 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3656 get_preferred_loc = true;
3658 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3659 get_prefetch_loc = true;
3661 case KFD_IOCTL_SVM_ATTR_ACCESS:
3662 get_accessible = true;
3664 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3665 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3668 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3669 get_granularity = true;
3671 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
3672 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
3675 pr_debug("get invalid attr type 0x%x\n", attrs[i].type);
3682 mutex_lock(&svms->lock);
3684 node = interval_tree_iter_first(&svms->objects, start, last);
3686 pr_debug("range attrs not found return default values\n");
3687 svm_range_set_default_attributes(&location, &prefetch_loc,
3688 &granularity, &flags_and);
3689 flags_or = flags_and;
3690 if (p->xnack_enabled)
3691 bitmap_copy(bitmap_access, svms->bitmap_supported,
3694 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE);
3695 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE);
3698 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE);
3699 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE);
3702 struct interval_tree_node *next;
3704 prange = container_of(node, struct svm_range, it_node);
3705 next = interval_tree_iter_next(node, start, last);
3707 if (get_preferred_loc) {
3708 if (prange->preferred_loc ==
3709 KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3710 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3711 location != prange->preferred_loc)) {
3712 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3713 get_preferred_loc = false;
3715 location = prange->preferred_loc;
3718 if (get_prefetch_loc) {
3719 if (prange->prefetch_loc ==
3720 KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3721 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3722 prefetch_loc != prange->prefetch_loc)) {
3723 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3724 get_prefetch_loc = false;
3726 prefetch_loc = prange->prefetch_loc;
3729 if (get_accessible) {
3730 bitmap_and(bitmap_access, bitmap_access,
3731 prange->bitmap_access, MAX_GPU_INSTANCE);
3732 bitmap_and(bitmap_aip, bitmap_aip,
3733 prange->bitmap_aip, MAX_GPU_INSTANCE);
3736 flags_and &= prange->flags;
3737 flags_or |= prange->flags;
3740 if (get_granularity && prange->granularity < granularity)
3741 granularity = prange->granularity;
3746 mutex_unlock(&svms->lock);
3748 for (i = 0; i < nattr; i++) {
3749 switch (attrs[i].type) {
3750 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3751 attrs[i].value = location;
3753 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3754 attrs[i].value = prefetch_loc;
3756 case KFD_IOCTL_SVM_ATTR_ACCESS:
3757 gpuidx = kfd_process_gpuidx_from_gpuid(p,
3760 pr_debug("invalid gpuid %x\n", attrs[i].value);
3763 if (test_bit(gpuidx, bitmap_access))
3764 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS;
3765 else if (test_bit(gpuidx, bitmap_aip))
3767 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE;
3769 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS;
3771 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3772 attrs[i].value = flags_and;
3774 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3775 attrs[i].value = ~flags_or;
3777 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3778 attrs[i].value = (uint32_t)granularity;
3786 int kfd_criu_resume_svm(struct kfd_process *p)
3788 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL;
3789 int nattr_common = 4, nattr_accessibility = 1;
3790 struct criu_svm_metadata *criu_svm_md = NULL;
3791 struct svm_range_list *svms = &p->svms;
3792 struct criu_svm_metadata *next = NULL;
3793 uint32_t set_flags = 0xffffffff;
3794 int i, j, num_attrs, ret = 0;
3795 uint64_t set_attr_size;
3796 struct mm_struct *mm;
3798 if (list_empty(&svms->criu_svm_metadata_list)) {
3799 pr_debug("No SVM data from CRIU restore stage 2\n");
3803 mm = get_task_mm(p->lead_thread);
3805 pr_err("failed to get mm for the target process\n");
3809 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds);
3812 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) {
3813 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n",
3814 i, criu_svm_md->data.start_addr, criu_svm_md->data.size);
3816 for (j = 0; j < num_attrs; j++) {
3817 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n",
3818 i, j, criu_svm_md->data.attrs[j].type,
3819 i, j, criu_svm_md->data.attrs[j].value);
3820 switch (criu_svm_md->data.attrs[j].type) {
3821 /* During Checkpoint operation, the query for
3822 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might
3823 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were
3824 * not used by the range which was checkpointed. Care
3825 * must be taken to not restore with an invalid value
3826 * otherwise the gpuidx value will be invalid and
3827 * set_attr would eventually fail so just replace those
3828 * with another dummy attribute such as
3829 * KFD_IOCTL_SVM_ATTR_SET_FLAGS.
3831 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3832 if (criu_svm_md->data.attrs[j].value ==
3833 KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
3834 criu_svm_md->data.attrs[j].type =
3835 KFD_IOCTL_SVM_ATTR_SET_FLAGS;
3836 criu_svm_md->data.attrs[j].value = 0;
3839 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3840 set_flags = criu_svm_md->data.attrs[j].value;
3847 /* CLR_FLAGS is not available via get_attr during checkpoint but
3848 * it needs to be inserted before restoring the ranges so
3849 * allocate extra space for it before calling set_attr
3851 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3853 set_attr_new = krealloc(set_attr, set_attr_size,
3855 if (!set_attr_new) {
3859 set_attr = set_attr_new;
3861 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs *
3862 sizeof(struct kfd_ioctl_svm_attribute));
3863 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS;
3864 set_attr[num_attrs].value = ~set_flags;
3866 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr,
3867 criu_svm_md->data.size, num_attrs + 1,
3870 pr_err("CRIU: failed to set range attributes\n");
3878 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) {
3879 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n",
3880 criu_svm_md->data.start_addr);
3889 int kfd_criu_restore_svm(struct kfd_process *p,
3890 uint8_t __user *user_priv_ptr,
3891 uint64_t *priv_data_offset,
3892 uint64_t max_priv_data_size)
3894 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size;
3895 int nattr_common = 4, nattr_accessibility = 1;
3896 struct criu_svm_metadata *criu_svm_md = NULL;
3897 struct svm_range_list *svms = &p->svms;
3898 uint32_t num_devices;
3901 num_devices = p->n_pdds;
3902 /* Handle one SVM range object at a time, also the number of gpus are
3903 * assumed to be same on the restore node, checking must be done while
3904 * evaluating the topology earlier
3907 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) *
3908 (nattr_common + nattr_accessibility * num_devices);
3909 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size;
3911 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) +
3914 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL);
3916 pr_err("failed to allocate memory to store svm metadata\n");
3919 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) {
3924 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset,
3925 svm_priv_data_size);
3930 *priv_data_offset += svm_priv_data_size;
3932 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list);
3942 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges,
3943 uint64_t *svm_priv_data_size)
3945 uint64_t total_size, accessibility_size, common_attr_size;
3946 int nattr_common = 4, nattr_accessibility = 1;
3947 int num_devices = p->n_pdds;
3948 struct svm_range_list *svms;
3949 struct svm_range *prange;
3952 *svm_priv_data_size = 0;
3958 mutex_lock(&svms->lock);
3959 list_for_each_entry(prange, &svms->list, list) {
3960 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n",
3961 prange, prange->start, prange->npages,
3962 prange->start + prange->npages - 1);
3965 mutex_unlock(&svms->lock);
3967 *num_svm_ranges = count;
3968 /* Only the accessbility attributes need to be queried for all the gpus
3969 * individually, remaining ones are spanned across the entire process
3970 * regardless of the various gpu nodes. Of the remaining attributes,
3971 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved.
3973 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC
3974 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC
3975 * KFD_IOCTL_SVM_ATTR_SET_FLAGS
3976 * KFD_IOCTL_SVM_ATTR_GRANULARITY
3978 * ** ACCESSBILITY ATTRIBUTES **
3979 * (Considered as one, type is altered during query, value is gpuid)
3980 * KFD_IOCTL_SVM_ATTR_ACCESS
3981 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE
3982 * KFD_IOCTL_SVM_ATTR_NO_ACCESS
3984 if (*num_svm_ranges > 0) {
3985 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3987 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) *
3988 nattr_accessibility * num_devices;
3990 total_size = sizeof(struct kfd_criu_svm_range_priv_data) +
3991 common_attr_size + accessibility_size;
3993 *svm_priv_data_size = *num_svm_ranges * total_size;
3996 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges,
3997 *svm_priv_data_size);
4001 int kfd_criu_checkpoint_svm(struct kfd_process *p,
4002 uint8_t __user *user_priv_data,
4003 uint64_t *priv_data_offset)
4005 struct kfd_criu_svm_range_priv_data *svm_priv = NULL;
4006 struct kfd_ioctl_svm_attribute *query_attr = NULL;
4007 uint64_t svm_priv_data_size, query_attr_size = 0;
4008 int index, nattr_common = 4, ret = 0;
4009 struct svm_range_list *svms;
4010 int num_devices = p->n_pdds;
4011 struct svm_range *prange;
4012 struct mm_struct *mm;
4018 mm = get_task_mm(p->lead_thread);
4020 pr_err("failed to get mm for the target process\n");
4024 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
4025 (nattr_common + num_devices);
4027 query_attr = kzalloc(query_attr_size, GFP_KERNEL);
4033 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC;
4034 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC;
4035 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS;
4036 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY;
4038 for (index = 0; index < num_devices; index++) {
4039 struct kfd_process_device *pdd = p->pdds[index];
4041 query_attr[index + nattr_common].type =
4042 KFD_IOCTL_SVM_ATTR_ACCESS;
4043 query_attr[index + nattr_common].value = pdd->user_gpu_id;
4046 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size;
4048 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL);
4055 list_for_each_entry(prange, &svms->list, list) {
4057 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE;
4058 svm_priv->start_addr = prange->start;
4059 svm_priv->size = prange->npages;
4060 memcpy(&svm_priv->attrs, query_attr, query_attr_size);
4061 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n",
4062 prange, prange->start, prange->npages,
4063 prange->start + prange->npages - 1,
4064 prange->npages * PAGE_SIZE);
4066 ret = svm_range_get_attr(p, mm, svm_priv->start_addr,
4068 (nattr_common + num_devices),
4071 pr_err("CRIU: failed to obtain range attributes\n");
4075 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv,
4076 svm_priv_data_size)) {
4077 pr_err("Failed to copy svm priv to user\n");
4082 *priv_data_offset += svm_priv_data_size;
4097 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start,
4098 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs)
4100 struct mm_struct *mm = current->mm;
4103 start >>= PAGE_SHIFT;
4104 size >>= PAGE_SHIFT;
4107 case KFD_IOCTL_SVM_OP_SET_ATTR:
4108 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs);
4110 case KFD_IOCTL_SVM_OP_GET_ATTR:
4111 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs);