2 * Copyright 2014 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef KFD_PRIV_H_INCLUDED
24 #define KFD_PRIV_H_INCLUDED
26 #include <linux/hashtable.h>
27 #include <linux/mmu_notifier.h>
28 #include <linux/mutex.h>
29 #include <linux/types.h>
30 #include <linux/atomic.h>
31 #include <linux/workqueue.h>
32 #include <linux/spinlock.h>
33 #include <linux/kfd_ioctl.h>
34 #include <linux/idr.h>
35 #include <linux/kfifo.h>
36 #include <linux/seq_file.h>
37 #include <linux/kref.h>
38 #include <linux/sysfs.h>
39 #include <linux/device_cgroup.h>
40 #include <drm/drm_file.h>
41 #include <drm/drm_drv.h>
42 #include <drm/drm_device.h>
43 #include <drm/drm_ioctl.h>
44 #include <kgd_kfd_interface.h>
45 #include <linux/swap.h>
47 #include "amd_shared.h"
50 #define KFD_MAX_RING_ENTRY_SIZE 8
52 #define KFD_SYSFS_FILE_MODE 0444
54 /* GPU ID hash width in bits */
55 #define KFD_GPU_ID_HASH_WIDTH 16
57 /* Use upper bits of mmap offset to store KFD driver specific information.
58 * BITS[63:62] - Encode MMAP type
59 * BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to
60 * BITS[45:0] - MMAP offset value
62 * NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these
63 * defines are w.r.t to PAGE_SIZE
65 #define KFD_MMAP_TYPE_SHIFT 62
66 #define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT)
67 #define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT)
68 #define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT)
69 #define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT)
70 #define KFD_MMAP_TYPE_MMIO (0x0ULL << KFD_MMAP_TYPE_SHIFT)
72 #define KFD_MMAP_GPU_ID_SHIFT 46
73 #define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \
74 << KFD_MMAP_GPU_ID_SHIFT)
75 #define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\
76 & KFD_MMAP_GPU_ID_MASK)
77 #define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \
78 >> KFD_MMAP_GPU_ID_SHIFT)
81 * When working with cp scheduler we should assign the HIQ manually or via
82 * the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot
83 * definitions for Kaveri. In Kaveri only the first ME queues participates
84 * in the cp scheduling taking that in mind we set the HIQ slot in the
87 #define KFD_CIK_HIQ_PIPE 4
88 #define KFD_CIK_HIQ_QUEUE 0
90 /* Macro for allocating structures */
91 #define kfd_alloc_struct(ptr_to_struct) \
92 ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL))
94 #define KFD_MAX_NUM_OF_PROCESSES 512
95 #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024
98 * Size of the per-process TBA+TMA buffer: 2 pages
100 * The first page is the TBA used for the CWSR ISA code. The second
101 * page is used as TMA for user-mode trap handler setup in daisy-chain mode.
103 #define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2)
104 #define KFD_CWSR_TMA_OFFSET PAGE_SIZE
106 #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \
107 (KFD_MAX_NUM_OF_PROCESSES * \
108 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS)
110 #define KFD_KERNEL_QUEUE_SIZE 2048
112 #define KFD_UNMAP_LATENCY_MS (4000)
116 * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the
117 * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA.
118 * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC
119 * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in
120 * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE.
122 #define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512
126 * Kernel module parameter to specify maximum number of supported queues per
129 extern int max_num_of_queues_per_device;
132 /* Kernel module parameter to specify the scheduling policy */
133 extern int sched_policy;
136 * Kernel module parameter to specify the maximum process
137 * number per HW scheduler
139 extern int hws_max_conc_proc;
141 extern int cwsr_enable;
144 * Kernel module parameter to specify whether to send sigterm to HSA process on
145 * unhandled exception
147 extern int send_sigterm;
150 * This kernel module is used to simulate large bar machine on non-large bar
153 extern int debug_largebar;
156 * Ignore CRAT table during KFD initialization, can be used to work around
157 * broken CRAT tables on some AMD systems
159 extern int ignore_crat;
161 /* Set sh_mem_config.retry_disable on GFX v9 */
162 extern int amdgpu_noretry;
164 /* Halt if HWS hang is detected */
165 extern int halt_if_hws_hang;
167 /* Whether MEC FW support GWS barriers */
168 extern bool hws_gws_support;
170 /* Queue preemption timeout in ms */
171 extern int queue_preemption_timeout_ms;
174 * Don't evict process queues on vm fault
176 extern int amdgpu_no_queue_eviction_on_vm_fault;
178 /* Enable eviction debug messages */
179 extern bool debug_evictions;
182 cache_policy_coherent,
183 cache_policy_noncoherent
186 #define KFD_IS_SOC15(chip) ((chip) >= CHIP_VEGA10)
188 struct kfd_event_interrupt_class {
189 bool (*interrupt_isr)(struct kfd_dev *dev,
190 const uint32_t *ih_ring_entry, uint32_t *patched_ihre,
192 void (*interrupt_wq)(struct kfd_dev *dev,
193 const uint32_t *ih_ring_entry);
196 struct kfd_device_info {
197 enum amd_asic_type asic_family;
198 const char *asic_name;
199 uint32_t gfx_target_version;
200 const struct kfd_event_interrupt_class *event_interrupt_class;
201 unsigned int max_pasid_bits;
202 unsigned int max_no_of_hqd;
203 unsigned int doorbell_size;
204 size_t ih_ring_entry_size;
205 uint8_t num_of_watch_points;
206 uint16_t mqd_size_aligned;
208 bool needs_iommu_device;
209 bool needs_pci_atomics;
210 uint32_t no_atomic_fw_version;
211 unsigned int num_sdma_engines;
212 unsigned int num_xgmi_sdma_engines;
213 unsigned int num_sdma_queues_per_engine;
217 uint32_t range_start;
224 struct kfd_vmid_info {
225 uint32_t first_vmid_kfd;
226 uint32_t last_vmid_kfd;
227 uint32_t vmid_num_kfd;
233 const struct kfd_device_info *device_info;
234 struct pci_dev *pdev;
235 struct drm_device *ddev;
237 unsigned int id; /* topology stub index */
239 phys_addr_t doorbell_base; /* Start of actual doorbells used by
240 * KFD. It is aligned for mapping
243 size_t doorbell_base_dw_offset; /* Offset from the start of the PCI
244 * doorbell BAR to the first KFD
245 * doorbell in dwords. GFX reserves
246 * the segment before this offset.
248 u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells
249 * page used by kernel queue
252 struct kgd2kfd_shared_resources shared_resources;
253 struct kfd_vmid_info vm_info;
255 const struct kfd2kgd_calls *kfd2kgd;
256 struct mutex doorbell_mutex;
257 DECLARE_BITMAP(doorbell_available_index,
258 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS);
261 uint64_t gtt_start_gpu_addr;
262 void *gtt_start_cpu_ptr;
264 struct mutex gtt_sa_lock;
265 unsigned int gtt_sa_chunk_size;
266 unsigned int gtt_sa_num_of_chunks;
269 struct kfifo ih_fifo;
270 struct workqueue_struct *ih_wq;
271 struct work_struct interrupt_work;
272 spinlock_t interrupt_lock;
274 /* QCM Device instance */
275 struct device_queue_manager *dqm;
279 * Interrupts of interest to KFD are copied
280 * from the HW ring into a SW ring.
282 bool interrupts_active;
285 struct kfd_dbgmgr *dbgmgr;
287 /* Firmware versions */
288 uint16_t mec_fw_version;
289 uint16_t mec2_fw_version;
290 uint16_t sdma_fw_version;
292 /* Maximum process number mapped to HW scheduler */
293 unsigned int max_proc_per_quantum;
297 const void *cwsr_isa;
298 unsigned int cwsr_isa_size;
303 bool pci_atomic_requested;
305 /* Use IOMMU v2 flag */
309 atomic_t sram_ecc_flag;
311 /* Compute Profile ref. count */
312 atomic_t compute_profile;
314 /* Global GWS resource shared between processes */
317 /* Clients watching SMI events */
318 struct list_head smi_clients;
321 uint32_t reset_seq_num;
323 struct ida doorbell_ida;
324 unsigned int max_doorbell_slices;
328 /* HMM page migration MEMORY_DEVICE_PRIVATE mapping */
329 struct dev_pagemap pgmap;
333 KFD_MEMPOOL_SYSTEM_CACHEABLE = 1,
334 KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2,
335 KFD_MEMPOOL_FRAMEBUFFER = 3,
338 /* Character device interface */
339 int kfd_chardev_init(void);
340 void kfd_chardev_exit(void);
341 struct device *kfd_chardev(void);
344 * enum kfd_unmap_queues_filter - Enum for queue filters.
346 * @KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE: Preempts single queue.
348 * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the
349 * running queues list.
351 * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to
355 enum kfd_unmap_queues_filter {
356 KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE,
357 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES,
358 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES,
359 KFD_UNMAP_QUEUES_FILTER_BY_PASID
363 * enum kfd_queue_type - Enum for various queue types.
365 * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type.
367 * @KFD_QUEUE_TYPE_SDMA: SDMA user mode queue type.
369 * @KFD_QUEUE_TYPE_HIQ: HIQ queue type.
371 * @KFD_QUEUE_TYPE_DIQ: DIQ queue type.
373 * @KFD_QUEUE_TYPE_SDMA_XGMI: Special SDMA queue for XGMI interface.
375 enum kfd_queue_type {
376 KFD_QUEUE_TYPE_COMPUTE,
380 KFD_QUEUE_TYPE_SDMA_XGMI
383 enum kfd_queue_format {
384 KFD_QUEUE_FORMAT_PM4,
388 enum KFD_QUEUE_PRIORITY {
389 KFD_QUEUE_PRIORITY_MINIMUM = 0,
390 KFD_QUEUE_PRIORITY_MAXIMUM = 15
394 * struct queue_properties
396 * @type: The queue type.
398 * @queue_id: Queue identifier.
400 * @queue_address: Queue ring buffer address.
402 * @queue_size: Queue ring buffer size.
404 * @priority: Defines the queue priority relative to other queues in the
406 * This is just an indication and HW scheduling may override the priority as
407 * necessary while keeping the relative prioritization.
408 * the priority granularity is from 0 to f which f is the highest priority.
409 * currently all queues are initialized with the highest priority.
411 * @queue_percent: This field is partially implemented and currently a zero in
412 * this field defines that the queue is non active.
414 * @read_ptr: User space address which points to the number of dwords the
415 * cp read from the ring buffer. This field updates automatically by the H/W.
417 * @write_ptr: Defines the number of dwords written to the ring buffer.
419 * @doorbell_ptr: Notifies the H/W of new packet written to the queue ring
420 * buffer. This field should be similar to write_ptr and the user should
421 * update this field after updating the write_ptr.
423 * @doorbell_off: The doorbell offset in the doorbell pci-bar.
425 * @is_interop: Defines if this is a interop queue. Interop queue means that
426 * the queue can access both graphics and compute resources.
428 * @is_evicted: Defines if the queue is evicted. Only active queues
429 * are evicted, rendering them inactive.
431 * @is_active: Defines if the queue is active or not. @is_active and
432 * @is_evicted are protected by the DQM lock.
434 * @is_gws: Defines if the queue has been updated to be GWS-capable or not.
435 * @is_gws should be protected by the DQM lock, since changing it can yield the
436 * possibility of updating DQM state on number of GWS queues.
438 * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid
441 * This structure represents the queue properties for each queue no matter if
442 * it's user mode or kernel mode queue.
445 struct queue_properties {
446 enum kfd_queue_type type;
447 enum kfd_queue_format format;
448 unsigned int queue_id;
449 uint64_t queue_address;
452 uint32_t queue_percent;
455 void __iomem *doorbell_ptr;
456 uint32_t doorbell_off;
461 /* Not relevant for user mode queues in cp scheduling */
463 /* Relevant only for sdma queues*/
464 uint32_t sdma_engine_id;
465 uint32_t sdma_queue_id;
466 uint32_t sdma_vm_addr;
467 /* Relevant only for VI */
468 uint64_t eop_ring_buffer_address;
469 uint32_t eop_ring_buffer_size;
470 uint64_t ctx_save_restore_area_address;
471 uint32_t ctx_save_restore_area_size;
472 uint32_t ctl_stack_size;
475 /* Relevant for CU */
476 uint32_t cu_mask_count; /* Must be a multiple of 32 */
480 #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 && \
481 (q).queue_address != 0 && \
482 (q).queue_percent > 0 && \
488 * @list: Queue linked list.
490 * @mqd: The queue MQD (memory queue descriptor).
492 * @mqd_mem_obj: The MQD local gpu memory object.
494 * @gart_mqd_addr: The MQD gart mc address.
496 * @properties: The queue properties.
498 * @mec: Used only in no cp scheduling mode and identifies to micro engine id
499 * that the queue should be executed on.
501 * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe
504 * @queue: Used only in no cp scheduliong mode and identifies the queue's slot.
506 * @process: The kfd process that created this queue.
508 * @device: The kfd device that created this queue.
510 * @gws: Pointing to gws kgd_mem if this is a gws control queue; NULL
513 * This structure represents user mode compute queues.
514 * It contains all the necessary data to handle such queues.
519 struct list_head list;
521 struct kfd_mem_obj *mqd_mem_obj;
522 uint64_t gart_mqd_addr;
523 struct queue_properties properties;
529 unsigned int sdma_id;
530 unsigned int doorbell_id;
532 struct kfd_process *process;
533 struct kfd_dev *device;
541 KFD_MQD_TYPE_HIQ = 0, /* for hiq */
542 KFD_MQD_TYPE_CP, /* for cp queues and diq */
543 KFD_MQD_TYPE_SDMA, /* for sdma queues */
544 KFD_MQD_TYPE_DIQ, /* for diq */
548 enum KFD_PIPE_PRIORITY {
549 KFD_PIPE_PRIORITY_CS_LOW = 0,
550 KFD_PIPE_PRIORITY_CS_MEDIUM,
551 KFD_PIPE_PRIORITY_CS_HIGH
554 struct scheduling_resources {
555 unsigned int vmid_mask;
556 enum kfd_queue_type type;
560 uint32_t gds_heap_base;
561 uint32_t gds_heap_size;
564 struct process_queue_manager {
566 struct kfd_process *process;
567 struct list_head queues;
568 unsigned long *queue_slot_bitmap;
571 struct qcm_process_device {
572 /* The Device Queue Manager that owns this data */
573 struct device_queue_manager *dqm;
574 struct process_queue_manager *pqm;
576 struct list_head queues_list;
577 struct list_head priv_queue_list;
579 unsigned int queue_count;
582 unsigned int evicted; /* eviction counter, 0=active */
584 /* This flag tells if we should reset all wavefronts on
585 * process termination
587 bool reset_wavefronts;
589 /* This flag tells us if this process has a GWS-capable
590 * queue that will be mapped into the runlist. It's
591 * possible to request a GWS BO, but not have the queue
592 * currently mapped, and this changes how the MAP_PROCESS
593 * PM4 packet is configured.
595 bool mapped_gws_queue;
597 /* All the memory management data should be here too */
598 uint64_t gds_context_area;
599 /* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */
600 uint64_t page_table_base;
601 uint32_t sh_mem_config;
602 uint32_t sh_mem_bases;
603 uint32_t sh_mem_ape1_base;
604 uint32_t sh_mem_ape1_limit;
608 uint32_t sh_hidden_private_base;
620 /* doorbell resources per process per device */
621 unsigned long *doorbell_bitmap;
624 /* KFD Memory Eviction */
626 /* Approx. wait time before attempting to restore evicted BOs */
627 #define PROCESS_RESTORE_TIME_MS 100
628 /* Approx. back off time if restore fails due to lack of memory */
629 #define PROCESS_BACK_OFF_TIME_MS 100
630 /* Approx. time before evicting the process again */
631 #define PROCESS_ACTIVE_TIME_MS 10
633 /* 8 byte handle containing GPU ID in the most significant 4 bytes and
634 * idr_handle in the least significant 4 bytes
636 #define MAKE_HANDLE(gpu_id, idr_handle) \
637 (((uint64_t)(gpu_id) << 32) + idr_handle)
638 #define GET_GPU_ID(handle) (handle >> 32)
639 #define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF)
647 #define MAX_SYSFS_FILENAME_LEN 15
650 * SDMA counter runs at 100MHz frequency.
651 * We display SDMA activity in microsecond granularity in sysfs.
652 * As a result, the divisor is 100.
654 #define SDMA_ACTIVITY_DIVISOR 100
656 /* Data that is per-process-per device. */
657 struct kfd_process_device {
658 /* The device that owns this data. */
661 /* The process that owns this kfd_process_device. */
662 struct kfd_process *process;
664 /* per-process-per device QCM data structure */
665 struct qcm_process_device qpd;
671 uint64_t gpuvm_limit;
672 uint64_t scratch_base;
673 uint64_t scratch_limit;
675 /* VM context for GPUVM allocations */
676 struct file *drm_file;
679 /* GPUVM allocations storage */
680 struct idr alloc_idr;
682 /* Flag used to tell the pdd has dequeued from the dqm.
683 * This is used to prevent dev->dqm->ops.process_termination() from
684 * being called twice when it is already called in IOMMU callback
687 bool already_dequeued;
690 /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */
691 enum kfd_pdd_bound bound;
695 struct attribute attr_vram;
696 char vram_filename[MAX_SYSFS_FILENAME_LEN];
698 /* SDMA activity tracking */
699 uint64_t sdma_past_activity_counter;
700 struct attribute attr_sdma;
701 char sdma_filename[MAX_SYSFS_FILENAME_LEN];
703 /* Eviction activity tracking */
704 uint64_t last_evict_timestamp;
705 atomic64_t evict_duration_counter;
706 struct attribute attr_evict;
708 struct kobject *kobj_stats;
709 unsigned int doorbell_index;
712 * @cu_occupancy: Reports occupancy of Compute Units (CU) of a process
713 * that is associated with device encoded by "this" struct instance. The
714 * value reflects CU usage by all of the waves launched by this process
715 * on this device. A very important property of occupancy parameter is
716 * that its value is a snapshot of current use.
718 * Following is to be noted regarding how this parameter is reported:
720 * The number of waves that a CU can launch is limited by couple of
721 * parameters. These are encoded by struct amdgpu_cu_info instance
722 * that is part of every device definition. For GFX9 devices this
723 * translates to 40 waves (simd_per_cu * max_waves_per_simd) when waves
724 * do not use scratch memory and 32 waves (max_scratch_slots_per_cu)
725 * when they do use scratch memory. This could change for future
726 * devices and therefore this example should be considered as a guide.
728 * All CU's of a device are available for the process. This may not be true
729 * under certain conditions - e.g. CU masking.
731 * Finally number of CU's that are occupied by a process is affected by both
732 * number of CU's a device has along with number of other competing processes
734 struct attribute attr_cu_occupancy;
736 /* sysfs counters for GPU retry fault and page migration tracking */
737 struct kobject *kobj_counters;
738 struct attribute attr_faults;
739 struct attribute attr_page_in;
740 struct attribute attr_page_out;
746 #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd)
748 struct svm_range_list {
750 struct rb_root_cached objects;
751 struct list_head list;
752 struct work_struct deferred_list_work;
753 struct list_head deferred_range_list;
754 spinlock_t deferred_list_lock;
755 atomic_t evicted_ranges;
756 struct delayed_work restore_work;
757 DECLARE_BITMAP(bitmap_supported, MAX_GPU_INSTANCE);
763 * kfd_process are stored in an mm_struct*->kfd_process*
764 * hash table (kfd_processes in kfd_process.c)
766 struct hlist_node kfd_processes;
769 * Opaque pointer to mm_struct. We don't hold a reference to
770 * it so it should never be dereferenced from here. This is
771 * only used for looking up processes by their mm.
776 struct work_struct release_work;
781 * In any process, the thread that started main() is the lead
782 * thread and outlives the rest.
783 * It is here because amd_iommu_bind_pasid wants a task_struct.
784 * It can also be used for safely getting a reference to the
785 * mm_struct of the process.
787 struct task_struct *lead_thread;
789 /* We want to receive a notification when the mm_struct is destroyed */
790 struct mmu_notifier mmu_notifier;
795 * Array of kfd_process_device pointers,
796 * one for each device the process is using.
798 struct kfd_process_device *pdds[MAX_GPU_INSTANCE];
801 struct process_queue_manager pqm;
803 /*Is the user space process 32 bit?*/
804 bool is_32bit_user_mode;
806 /* Event-related data */
807 struct mutex event_mutex;
808 /* Event ID allocator and lookup */
809 struct idr event_idr;
811 struct kfd_signal_page *signal_page;
812 size_t signal_mapped_size;
813 size_t signal_event_count;
814 bool signal_event_limit_reached;
816 /* Information used for memory eviction */
817 void *kgd_process_info;
818 /* Eviction fence that is attached to all the BOs of this process. The
819 * fence will be triggered during eviction and new one will be created
822 struct dma_fence *ef;
824 /* Work items for evicting and restoring BOs */
825 struct delayed_work eviction_work;
826 struct delayed_work restore_work;
827 /* seqno of the last scheduled eviction */
828 unsigned int last_eviction_seqno;
829 /* Approx. the last timestamp (in jiffies) when the process was
830 * restored after an eviction
832 unsigned long last_restore_timestamp;
834 /* Kobj for our procfs */
835 struct kobject *kobj;
836 struct kobject *kobj_queues;
837 struct attribute attr_pasid;
839 /* shared virtual memory registered by this process */
840 struct svm_range_list svms;
845 #define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */
846 extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE);
847 extern struct srcu_struct kfd_processes_srcu;
850 * typedef amdkfd_ioctl_t - typedef for ioctl function pointer.
852 * @filep: pointer to file structure.
853 * @p: amdkfd process pointer.
854 * @data: pointer to arg that was copied from user.
856 * Return: returns ioctl completion code.
858 typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p,
861 struct amdkfd_ioctl_desc {
864 amdkfd_ioctl_t *func;
865 unsigned int cmd_drv;
868 bool kfd_dev_is_large_bar(struct kfd_dev *dev);
870 int kfd_process_create_wq(void);
871 void kfd_process_destroy_wq(void);
872 struct kfd_process *kfd_create_process(struct file *filep);
873 struct kfd_process *kfd_get_process(const struct task_struct *);
874 struct kfd_process *kfd_lookup_process_by_pasid(u32 pasid);
875 struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm);
877 int kfd_process_gpuidx_from_gpuid(struct kfd_process *p, uint32_t gpu_id);
878 int kfd_process_gpuid_from_kgd(struct kfd_process *p,
879 struct amdgpu_device *adev, uint32_t *gpuid,
881 static inline int kfd_process_gpuid_from_gpuidx(struct kfd_process *p,
882 uint32_t gpuidx, uint32_t *gpuid) {
883 return gpuidx < p->n_pdds ? p->pdds[gpuidx]->dev->id : -EINVAL;
885 static inline struct kfd_process_device *kfd_process_device_from_gpuidx(
886 struct kfd_process *p, uint32_t gpuidx) {
887 return gpuidx < p->n_pdds ? p->pdds[gpuidx] : NULL;
890 void kfd_unref_process(struct kfd_process *p);
891 int kfd_process_evict_queues(struct kfd_process *p);
892 int kfd_process_restore_queues(struct kfd_process *p);
893 void kfd_suspend_all_processes(void);
894 int kfd_resume_all_processes(void);
896 int kfd_process_device_init_vm(struct kfd_process_device *pdd,
897 struct file *drm_file);
898 struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev,
899 struct kfd_process *p);
900 struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev,
901 struct kfd_process *p);
902 struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev,
903 struct kfd_process *p);
905 bool kfd_process_xnack_mode(struct kfd_process *p, bool supported);
907 int kfd_reserved_mem_mmap(struct kfd_dev *dev, struct kfd_process *process,
908 struct vm_area_struct *vma);
910 /* KFD process API for creating and translating handles */
911 int kfd_process_device_create_obj_handle(struct kfd_process_device *pdd,
913 void *kfd_process_device_translate_handle(struct kfd_process_device *p,
915 void kfd_process_device_remove_obj_handle(struct kfd_process_device *pdd,
919 int kfd_pasid_init(void);
920 void kfd_pasid_exit(void);
921 bool kfd_set_pasid_limit(unsigned int new_limit);
922 unsigned int kfd_get_pasid_limit(void);
923 u32 kfd_pasid_alloc(void);
924 void kfd_pasid_free(u32 pasid);
927 size_t kfd_doorbell_process_slice(struct kfd_dev *kfd);
928 int kfd_doorbell_init(struct kfd_dev *kfd);
929 void kfd_doorbell_fini(struct kfd_dev *kfd);
930 int kfd_doorbell_mmap(struct kfd_dev *dev, struct kfd_process *process,
931 struct vm_area_struct *vma);
932 void __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd,
933 unsigned int *doorbell_off);
934 void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr);
935 u32 read_kernel_doorbell(u32 __iomem *db);
936 void write_kernel_doorbell(void __iomem *db, u32 value);
937 void write_kernel_doorbell64(void __iomem *db, u64 value);
938 unsigned int kfd_get_doorbell_dw_offset_in_bar(struct kfd_dev *kfd,
939 struct kfd_process_device *pdd,
940 unsigned int doorbell_id);
941 phys_addr_t kfd_get_process_doorbells(struct kfd_process_device *pdd);
942 int kfd_alloc_process_doorbells(struct kfd_dev *kfd,
943 unsigned int *doorbell_index);
944 void kfd_free_process_doorbells(struct kfd_dev *kfd,
945 unsigned int doorbell_index);
946 /* GTT Sub-Allocator */
948 int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
949 struct kfd_mem_obj **mem_obj);
951 int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj);
953 extern struct device *kfd_device;
956 void kfd_procfs_init(void);
957 void kfd_procfs_shutdown(void);
958 int kfd_procfs_add_queue(struct queue *q);
959 void kfd_procfs_del_queue(struct queue *q);
962 int kfd_topology_init(void);
963 void kfd_topology_shutdown(void);
964 int kfd_topology_add_device(struct kfd_dev *gpu);
965 int kfd_topology_remove_device(struct kfd_dev *gpu);
966 struct kfd_topology_device *kfd_topology_device_by_proximity_domain(
967 uint32_t proximity_domain);
968 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id);
969 struct kfd_dev *kfd_device_by_id(uint32_t gpu_id);
970 struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev);
971 struct kfd_dev *kfd_device_by_kgd(const struct kgd_dev *kgd);
972 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev);
973 int kfd_numa_node_to_apic_id(int numa_node_id);
974 void kfd_double_confirm_iommu_support(struct kfd_dev *gpu);
977 int kfd_interrupt_init(struct kfd_dev *dev);
978 void kfd_interrupt_exit(struct kfd_dev *dev);
979 bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const void *ih_ring_entry);
980 bool interrupt_is_wanted(struct kfd_dev *dev,
981 const uint32_t *ih_ring_entry,
982 uint32_t *patched_ihre, bool *flag);
984 /* amdkfd Apertures */
985 int kfd_init_apertures(struct kfd_process *process);
987 void kfd_process_set_trap_handler(struct qcm_process_device *qpd,
991 /* Queue Context Management */
992 int init_queue(struct queue **q, const struct queue_properties *properties);
993 void uninit_queue(struct queue *q);
994 void print_queue_properties(struct queue_properties *q);
995 void print_queue(struct queue *q);
997 struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type,
998 struct kfd_dev *dev);
999 struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type,
1000 struct kfd_dev *dev);
1001 struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type,
1002 struct kfd_dev *dev);
1003 struct mqd_manager *mqd_manager_init_vi_tonga(enum KFD_MQD_TYPE type,
1004 struct kfd_dev *dev);
1005 struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type,
1006 struct kfd_dev *dev);
1007 struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type,
1008 struct kfd_dev *dev);
1009 struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev);
1010 void device_queue_manager_uninit(struct device_queue_manager *dqm);
1011 struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
1012 enum kfd_queue_type type);
1013 void kernel_queue_uninit(struct kernel_queue *kq, bool hanging);
1014 int kfd_process_vm_fault(struct device_queue_manager *dqm, u32 pasid);
1016 /* Process Queue Manager */
1017 struct process_queue_node {
1019 struct kernel_queue *kq;
1020 struct list_head process_queue_list;
1023 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd);
1024 void kfd_process_dequeue_from_all_devices(struct kfd_process *p);
1025 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p);
1026 void pqm_uninit(struct process_queue_manager *pqm);
1027 int pqm_create_queue(struct process_queue_manager *pqm,
1028 struct kfd_dev *dev,
1030 struct queue_properties *properties,
1032 uint32_t *p_doorbell_offset_in_process);
1033 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid);
1034 int pqm_update_queue(struct process_queue_manager *pqm, unsigned int qid,
1035 struct queue_properties *p);
1036 int pqm_set_cu_mask(struct process_queue_manager *pqm, unsigned int qid,
1037 struct queue_properties *p);
1038 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid,
1040 struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm,
1042 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm,
1044 int pqm_get_wave_state(struct process_queue_manager *pqm,
1046 void __user *ctl_stack,
1047 u32 *ctl_stack_used_size,
1048 u32 *save_area_used_size);
1050 int amdkfd_fence_wait_timeout(uint64_t *fence_addr,
1051 uint64_t fence_value,
1052 unsigned int timeout_ms);
1054 /* Packet Manager */
1056 #define KFD_FENCE_COMPLETED (100)
1057 #define KFD_FENCE_INIT (10)
1059 struct packet_manager {
1060 struct device_queue_manager *dqm;
1061 struct kernel_queue *priv_queue;
1064 struct kfd_mem_obj *ib_buffer_obj;
1065 unsigned int ib_size_bytes;
1066 bool is_over_subscription;
1068 const struct packet_manager_funcs *pmf;
1071 struct packet_manager_funcs {
1072 /* Support ASIC-specific packet formats for PM4 packets */
1073 int (*map_process)(struct packet_manager *pm, uint32_t *buffer,
1074 struct qcm_process_device *qpd);
1075 int (*runlist)(struct packet_manager *pm, uint32_t *buffer,
1076 uint64_t ib, size_t ib_size_in_dwords, bool chain);
1077 int (*set_resources)(struct packet_manager *pm, uint32_t *buffer,
1078 struct scheduling_resources *res);
1079 int (*map_queues)(struct packet_manager *pm, uint32_t *buffer,
1080 struct queue *q, bool is_static);
1081 int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer,
1082 enum kfd_queue_type type,
1083 enum kfd_unmap_queues_filter mode,
1084 uint32_t filter_param, bool reset,
1085 unsigned int sdma_engine);
1086 int (*query_status)(struct packet_manager *pm, uint32_t *buffer,
1087 uint64_t fence_address, uint64_t fence_value);
1088 int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer);
1091 int map_process_size;
1093 int set_resources_size;
1094 int map_queues_size;
1095 int unmap_queues_size;
1096 int query_status_size;
1097 int release_mem_size;
1100 extern const struct packet_manager_funcs kfd_vi_pm_funcs;
1101 extern const struct packet_manager_funcs kfd_v9_pm_funcs;
1102 extern const struct packet_manager_funcs kfd_aldebaran_pm_funcs;
1104 int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm);
1105 void pm_uninit(struct packet_manager *pm, bool hanging);
1106 int pm_send_set_resources(struct packet_manager *pm,
1107 struct scheduling_resources *res);
1108 int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues);
1109 int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address,
1110 uint64_t fence_value);
1112 int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type,
1113 enum kfd_unmap_queues_filter mode,
1114 uint32_t filter_param, bool reset,
1115 unsigned int sdma_engine);
1117 void pm_release_ib(struct packet_manager *pm);
1119 /* Following PM funcs can be shared among VI and AI */
1120 unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size);
1122 uint64_t kfd_get_number_elems(struct kfd_dev *kfd);
1125 extern const struct kfd_event_interrupt_class event_interrupt_class_cik;
1126 extern const struct kfd_event_interrupt_class event_interrupt_class_v9;
1128 extern const struct kfd_device_global_init_class device_global_init_class_cik;
1130 void kfd_event_init_process(struct kfd_process *p);
1131 void kfd_event_free_process(struct kfd_process *p);
1132 int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma);
1133 int kfd_wait_on_events(struct kfd_process *p,
1134 uint32_t num_events, void __user *data,
1135 bool all, uint32_t user_timeout_ms,
1136 uint32_t *wait_result);
1137 void kfd_signal_event_interrupt(u32 pasid, uint32_t partial_id,
1138 uint32_t valid_id_bits);
1139 void kfd_signal_iommu_event(struct kfd_dev *dev,
1140 u32 pasid, unsigned long address,
1141 bool is_write_requested, bool is_execute_requested);
1142 void kfd_signal_hw_exception_event(u32 pasid);
1143 int kfd_set_event(struct kfd_process *p, uint32_t event_id);
1144 int kfd_reset_event(struct kfd_process *p, uint32_t event_id);
1145 int kfd_event_page_set(struct kfd_process *p, void *kernel_address,
1147 int kfd_event_create(struct file *devkfd, struct kfd_process *p,
1148 uint32_t event_type, bool auto_reset, uint32_t node_id,
1149 uint32_t *event_id, uint32_t *event_trigger_data,
1150 uint64_t *event_page_offset, uint32_t *event_slot_index);
1151 int kfd_event_destroy(struct kfd_process *p, uint32_t event_id);
1153 void kfd_signal_vm_fault_event(struct kfd_dev *dev, u32 pasid,
1154 struct kfd_vm_fault_info *info);
1156 void kfd_signal_reset_event(struct kfd_dev *dev);
1158 void kfd_signal_poison_consumed_event(struct kfd_dev *dev, u32 pasid);
1160 void kfd_flush_tlb(struct kfd_process_device *pdd, enum TLB_FLUSH_TYPE type);
1162 int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, struct kfd_process *p);
1164 bool kfd_is_locked(void);
1166 /* Compute profile */
1167 void kfd_inc_compute_active(struct kfd_dev *dev);
1168 void kfd_dec_compute_active(struct kfd_dev *dev);
1170 /* Cgroup Support */
1171 /* Check with device cgroup if @kfd device is accessible */
1172 static inline int kfd_devcgroup_check_permission(struct kfd_dev *kfd)
1174 #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF)
1175 struct drm_device *ddev = kfd->ddev;
1177 return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR,
1178 ddev->render->index,
1179 DEVCG_ACC_WRITE | DEVCG_ACC_READ);
1186 #if defined(CONFIG_DEBUG_FS)
1188 void kfd_debugfs_init(void);
1189 void kfd_debugfs_fini(void);
1190 int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data);
1191 int pqm_debugfs_mqds(struct seq_file *m, void *data);
1192 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data);
1193 int dqm_debugfs_hqds(struct seq_file *m, void *data);
1194 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data);
1195 int pm_debugfs_runlist(struct seq_file *m, void *data);
1197 int kfd_debugfs_hang_hws(struct kfd_dev *dev);
1198 int pm_debugfs_hang_hws(struct packet_manager *pm);
1199 int dqm_debugfs_hang_hws(struct device_queue_manager *dqm);
1203 static inline void kfd_debugfs_init(void) {}
1204 static inline void kfd_debugfs_fini(void) {}