2 * Copyright 2016 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
24 #ifndef __AMDGPU_TTM_H__
25 #define __AMDGPU_TTM_H__
27 #include <linux/dma-direction.h>
28 #include <drm/gpu_scheduler.h>
29 #include "amdgpu_vram_mgr.h"
32 #define AMDGPU_PL_GDS (TTM_PL_PRIV + 0)
33 #define AMDGPU_PL_GWS (TTM_PL_PRIV + 1)
34 #define AMDGPU_PL_OA (TTM_PL_PRIV + 2)
35 #define AMDGPU_PL_PREEMPT (TTM_PL_PRIV + 3)
37 #define AMDGPU_GTT_MAX_TRANSFER_SIZE 512
38 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2
40 #define AMDGPU_POISON 0xd0bed0be
42 extern const struct attribute_group amdgpu_vram_mgr_attr_group;
43 extern const struct attribute_group amdgpu_gtt_mgr_attr_group;
47 struct amdgpu_gtt_mgr {
48 struct ttm_resource_manager manager;
54 struct ttm_device bdev;
55 struct ttm_pool *ttm_pools;
57 void __iomem *aper_base_kaddr;
60 const struct amdgpu_buffer_funcs *buffer_funcs;
61 struct amdgpu_ring *buffer_funcs_ring;
62 bool buffer_funcs_enabled;
64 struct mutex gtt_window_lock;
65 /* High priority scheduler entity for buffer moves */
66 struct drm_sched_entity high_pr;
67 /* Low priority scheduler entity for VRAM clearing */
68 struct drm_sched_entity low_pr;
70 struct amdgpu_vram_mgr vram_mgr;
71 struct amdgpu_gtt_mgr gtt_mgr;
72 struct ttm_resource_manager preempt_mgr;
74 uint64_t stolen_vga_size;
75 struct amdgpu_bo *stolen_vga_memory;
76 uint64_t stolen_extended_size;
77 struct amdgpu_bo *stolen_extended_memory;
78 bool keep_stolen_vga_memory;
80 struct amdgpu_bo *stolen_reserved_memory;
81 uint64_t stolen_reserved_offset;
82 uint64_t stolen_reserved_size;
85 uint8_t *discovery_bin;
86 uint32_t discovery_tmr_size;
87 /* fw reserved memory */
88 struct amdgpu_bo *fw_reserved_memory;
90 /* firmware VRAM reservation */
91 u64 fw_vram_usage_start_offset;
92 u64 fw_vram_usage_size;
93 struct amdgpu_bo *fw_vram_usage_reserved_bo;
94 void *fw_vram_usage_va;
96 /* driver VRAM reservation */
97 u64 drv_vram_usage_start_offset;
98 u64 drv_vram_usage_size;
99 struct amdgpu_bo *drv_vram_usage_reserved_bo;
100 void *drv_vram_usage_va;
102 /* PAGE_SIZE'd BO for process memory r/w over SDMA. */
103 struct amdgpu_bo *sdma_access_bo;
104 void *sdma_access_ptr;
107 struct amdgpu_copy_mem {
108 struct ttm_buffer_object *bo;
109 struct ttm_resource *mem;
110 unsigned long offset;
113 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
114 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
115 int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);
116 void amdgpu_preempt_mgr_fini(struct amdgpu_device *adev);
117 int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
118 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
120 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
121 void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr);
123 uint64_t amdgpu_preempt_mgr_usage(struct ttm_resource_manager *man);
125 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
126 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
127 struct ttm_resource *mem,
128 u64 offset, u64 size,
130 enum dma_data_direction dir,
131 struct sg_table **sgt);
132 void amdgpu_vram_mgr_free_sgt(struct device *dev,
133 enum dma_data_direction dir,
134 struct sg_table *sgt);
135 uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr);
136 int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
137 uint64_t start, uint64_t size);
138 int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
141 int amdgpu_ttm_init(struct amdgpu_device *adev);
142 void amdgpu_ttm_fini(struct amdgpu_device *adev);
143 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
146 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
147 uint64_t dst_offset, uint32_t byte_count,
148 struct dma_resv *resv,
149 struct dma_fence **fence, bool direct_submit,
150 bool vm_needs_flush, bool tmz);
151 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
152 const struct amdgpu_copy_mem *src,
153 const struct amdgpu_copy_mem *dst,
154 uint64_t size, bool tmz,
155 struct dma_resv *resv,
156 struct dma_fence **f);
157 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
159 struct dma_resv *resv,
160 struct dma_fence **fence,
163 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
164 void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
165 uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type);
167 #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
168 int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages,
169 struct hmm_range **range);
170 void amdgpu_ttm_tt_discard_user_pages(struct ttm_tt *ttm,
171 struct hmm_range *range);
172 bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm,
173 struct hmm_range *range);
175 static inline int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo,
177 struct hmm_range **range)
181 static inline void amdgpu_ttm_tt_discard_user_pages(struct ttm_tt *ttm,
182 struct hmm_range *range)
185 static inline bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm,
186 struct hmm_range *range)
192 void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages);
193 int amdgpu_ttm_tt_get_userptr(const struct ttm_buffer_object *tbo,
194 uint64_t *user_addr);
195 int amdgpu_ttm_tt_set_userptr(struct ttm_buffer_object *bo,
196 uint64_t addr, uint32_t flags);
197 bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm);
198 struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm);
199 bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start,
200 unsigned long end, unsigned long *userptr);
201 bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
202 int *last_invalidated);
203 bool amdgpu_ttm_tt_is_userptr(struct ttm_tt *ttm);
204 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
205 uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem);
206 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
207 struct ttm_resource *mem);
208 int amdgpu_ttm_evict_resources(struct amdgpu_device *adev, int mem_type);
210 void amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);