2 * Copyright 2018 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef __AMDGPU_GEM_H__
24 #define __AMDGPU_GEM_H__
26 #include <drm/amdgpu_drm.h>
27 #include <drm/drm_gem.h>
33 #define AMDGPU_GEM_DOMAIN_MAX 0x3
34 #define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, tbo.base)
36 unsigned long amdgpu_gem_timeout(uint64_t timeout_ns);
41 void amdgpu_gem_force_release(struct amdgpu_device *adev);
42 int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
43 int alignment, u32 initial_domain,
44 u64 flags, enum ttm_bo_type type,
45 struct dma_resv *resv,
46 struct drm_gem_object **obj);
48 int amdgpu_mode_dumb_create(struct drm_file *file_priv,
49 struct drm_device *dev,
50 struct drm_mode_create_dumb *args);
51 int amdgpu_mode_dumb_mmap(struct drm_file *filp,
52 struct drm_device *dev,
53 uint32_t handle, uint64_t *offset_p);
55 int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
56 struct drm_file *filp);
57 int amdgpu_gem_info_ioctl(struct drm_device *dev, void *data,
58 struct drm_file *filp);
59 int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
60 struct drm_file *filp);
61 int amdgpu_gem_mmap_ioctl(struct drm_device *dev, void *data,
62 struct drm_file *filp);
63 int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
64 struct drm_file *filp);
65 uint64_t amdgpu_gem_va_map_flags(struct amdgpu_device *adev, uint32_t flags);
66 int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
67 struct drm_file *filp);
68 int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
69 struct drm_file *filp);
71 int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data,
72 struct drm_file *filp);