drivers/gpu/arm/midgard/r12p0_04rel0/mali_base_hwconfig_issues.h

   1 /*
   2  *
   3  * (C) COPYRIGHT 2015-2016 ARM Limited. All rights reserved.
   4  *
   5  * This program is free software and is provided to you under the terms of the
   6  * GNU General Public License version 2 as published by the Free Software
   7  * Foundation, and any use by you of this program is subject to the terms
   8  * of such GNU licence.
   9  *
  10  * A copy of the licence is included with the program, and can also be obtained
  11  * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  12  * Boston, MA  02110-1301, USA.
  13  *
  14  */
  15
  16
  17
  18 /* AUTOMATICALLY GENERATED FILE. If you want to amend the issues/features,
  19  * please update base/tools/hwconfig_generator/hwc_{issues,features}.py
  20  * For more information see base/tools/hwconfig_generator/README
  21  */
  22
  23 #ifndef _BASE_HWCONFIG_ISSUES_H_
  24 #define _BASE_HWCONFIG_ISSUES_H_
  25
  26 enum base_hw_issue {
  27         BASE_HW_ISSUE_5736,
  28         BASE_HW_ISSUE_6367,
  29         BASE_HW_ISSUE_6398,
  30         BASE_HW_ISSUE_6402,
  31         BASE_HW_ISSUE_6787,
  32         BASE_HW_ISSUE_7027,
  33         BASE_HW_ISSUE_7144,
  34         BASE_HW_ISSUE_7304,
  35         BASE_HW_ISSUE_8073,
  36         BASE_HW_ISSUE_8186,
  37         BASE_HW_ISSUE_8215,
  38         BASE_HW_ISSUE_8245,
  39         BASE_HW_ISSUE_8250,
  40         BASE_HW_ISSUE_8260,
  41         BASE_HW_ISSUE_8280,
  42         BASE_HW_ISSUE_8316,
  43         BASE_HW_ISSUE_8381,
  44         BASE_HW_ISSUE_8394,
  45         BASE_HW_ISSUE_8401,
  46         BASE_HW_ISSUE_8408,
  47         BASE_HW_ISSUE_8443,
  48         BASE_HW_ISSUE_8456,
  49         BASE_HW_ISSUE_8564,
  50         BASE_HW_ISSUE_8634,
  51         BASE_HW_ISSUE_8778,
  52         BASE_HW_ISSUE_8791,
  53         BASE_HW_ISSUE_8833,
  54         BASE_HW_ISSUE_8879,
  55         BASE_HW_ISSUE_8896,
  56         BASE_HW_ISSUE_8975,
  57         BASE_HW_ISSUE_8986,
  58         BASE_HW_ISSUE_8987,
  59         BASE_HW_ISSUE_9010,
  60         BASE_HW_ISSUE_9418,
  61         BASE_HW_ISSUE_9423,
  62         BASE_HW_ISSUE_9435,
  63         BASE_HW_ISSUE_9510,
  64         BASE_HW_ISSUE_9566,
  65         BASE_HW_ISSUE_9630,
  66         BASE_HW_ISSUE_10127,
  67         BASE_HW_ISSUE_10327,
  68         BASE_HW_ISSUE_10410,
  69         BASE_HW_ISSUE_10471,
  70         BASE_HW_ISSUE_10472,
  71         BASE_HW_ISSUE_10487,
  72         BASE_HW_ISSUE_10607,
  73         BASE_HW_ISSUE_10632,
  74         BASE_HW_ISSUE_10676,
  75         BASE_HW_ISSUE_10682,
  76         BASE_HW_ISSUE_10684,
  77         BASE_HW_ISSUE_10797,
  78         BASE_HW_ISSUE_10817,
  79         BASE_HW_ISSUE_10821,
  80         BASE_HW_ISSUE_10883,
  81         BASE_HW_ISSUE_10931,
  82         BASE_HW_ISSUE_10946,
  83         BASE_HW_ISSUE_10959,
  84         BASE_HW_ISSUE_10969,
  85         BASE_HW_ISSUE_10984,
  86         BASE_HW_ISSUE_10995,
  87         BASE_HW_ISSUE_11012,
  88         BASE_HW_ISSUE_11020,
  89         BASE_HW_ISSUE_11024,
  90         BASE_HW_ISSUE_11035,
  91         BASE_HW_ISSUE_11042,
  92         BASE_HW_ISSUE_11051,
  93         BASE_HW_ISSUE_11054,
  94         BASE_HW_ISSUE_T76X_26,
  95         BASE_HW_ISSUE_T76X_1909,
  96         BASE_HW_ISSUE_T76X_1963,
  97         BASE_HW_ISSUE_T76X_3086,
  98         BASE_HW_ISSUE_T76X_3542,
  99         BASE_HW_ISSUE_T76X_3556,
 100         BASE_HW_ISSUE_T76X_3700,
 101         BASE_HW_ISSUE_T76X_3793,
 102         BASE_HW_ISSUE_T76X_3953,
 103         BASE_HW_ISSUE_T76X_3960,
 104         BASE_HW_ISSUE_T76X_3964,
 105         BASE_HW_ISSUE_T76X_3966,
 106         BASE_HW_ISSUE_T76X_3979,
 107         BASE_HW_ISSUE_TMIX_7891,
 108         BASE_HW_ISSUE_TMIX_7940,
 109         BASE_HW_ISSUE_TMIX_8042,
 110         BASE_HW_ISSUE_TMIX_8133,
 111         BASE_HW_ISSUE_TMIX_8138,
 112         BASE_HW_ISSUE_TMIX_8206,
 113         GPUCORE_1619,
 114         BASE_HW_ISSUE_END
 115 };
 116
 117 static const enum base_hw_issue base_hw_issues_generic[] = {
 118         BASE_HW_ISSUE_END
 119 };
 120
 121 static const enum base_hw_issue base_hw_issues_t60x_r0p0_15dev0[] = {
 122         BASE_HW_ISSUE_6367,
 123         BASE_HW_ISSUE_6398,
 124         BASE_HW_ISSUE_6402,
 125         BASE_HW_ISSUE_6787,
 126         BASE_HW_ISSUE_7027,
 127         BASE_HW_ISSUE_7144,
 128         BASE_HW_ISSUE_7304,
 129         BASE_HW_ISSUE_8073,
 130         BASE_HW_ISSUE_8186,
 131         BASE_HW_ISSUE_8215,
 132         BASE_HW_ISSUE_8245,
 133         BASE_HW_ISSUE_8250,
 134         BASE_HW_ISSUE_8260,
 135         BASE_HW_ISSUE_8280,
 136         BASE_HW_ISSUE_8316,
 137         BASE_HW_ISSUE_8381,
 138         BASE_HW_ISSUE_8394,
 139         BASE_HW_ISSUE_8401,
 140         BASE_HW_ISSUE_8408,
 141         BASE_HW_ISSUE_8443,
 142         BASE_HW_ISSUE_8456,
 143         BASE_HW_ISSUE_8564,
 144         BASE_HW_ISSUE_8634,
 145         BASE_HW_ISSUE_8778,
 146         BASE_HW_ISSUE_8791,
 147         BASE_HW_ISSUE_8833,
 148         BASE_HW_ISSUE_8896,
 149         BASE_HW_ISSUE_8975,
 150         BASE_HW_ISSUE_8986,
 151         BASE_HW_ISSUE_8987,
 152         BASE_HW_ISSUE_9010,
 153         BASE_HW_ISSUE_9418,
 154         BASE_HW_ISSUE_9423,
 155         BASE_HW_ISSUE_9435,
 156         BASE_HW_ISSUE_9510,
 157         BASE_HW_ISSUE_9566,
 158         BASE_HW_ISSUE_9630,
 159         BASE_HW_ISSUE_10410,
 160         BASE_HW_ISSUE_10471,
 161         BASE_HW_ISSUE_10472,
 162         BASE_HW_ISSUE_10487,
 163         BASE_HW_ISSUE_10607,
 164         BASE_HW_ISSUE_10632,
 165         BASE_HW_ISSUE_10676,
 166         BASE_HW_ISSUE_10682,
 167         BASE_HW_ISSUE_10684,
 168         BASE_HW_ISSUE_10883,
 169         BASE_HW_ISSUE_10931,
 170         BASE_HW_ISSUE_10946,
 171         BASE_HW_ISSUE_10969,
 172         BASE_HW_ISSUE_10984,
 173         BASE_HW_ISSUE_10995,
 174         BASE_HW_ISSUE_11012,
 175         BASE_HW_ISSUE_11020,
 176         BASE_HW_ISSUE_11035,
 177         BASE_HW_ISSUE_11051,
 178         BASE_HW_ISSUE_11054,
 179         BASE_HW_ISSUE_T76X_1909,
 180         BASE_HW_ISSUE_T76X_3964,
 181         GPUCORE_1619,
 182         BASE_HW_ISSUE_END
 183 };
 184
 185 static const enum base_hw_issue base_hw_issues_t60x_r0p0_eac[] = {
 186         BASE_HW_ISSUE_6367,
 187         BASE_HW_ISSUE_6402,
 188         BASE_HW_ISSUE_6787,
 189         BASE_HW_ISSUE_7027,
 190         BASE_HW_ISSUE_7304,
 191         BASE_HW_ISSUE_8408,
 192         BASE_HW_ISSUE_8564,
 193         BASE_HW_ISSUE_8778,
 194         BASE_HW_ISSUE_8975,
 195         BASE_HW_ISSUE_9010,
 196         BASE_HW_ISSUE_9418,
 197         BASE_HW_ISSUE_9423,
 198         BASE_HW_ISSUE_9435,
 199         BASE_HW_ISSUE_9510,
 200         BASE_HW_ISSUE_10410,
 201         BASE_HW_ISSUE_10471,
 202         BASE_HW_ISSUE_10472,
 203         BASE_HW_ISSUE_10487,
 204         BASE_HW_ISSUE_10607,
 205         BASE_HW_ISSUE_10632,
 206         BASE_HW_ISSUE_10676,
 207         BASE_HW_ISSUE_10682,
 208         BASE_HW_ISSUE_10684,
 209         BASE_HW_ISSUE_10883,
 210         BASE_HW_ISSUE_10931,
 211         BASE_HW_ISSUE_10946,
 212         BASE_HW_ISSUE_10969,
 213         BASE_HW_ISSUE_11012,
 214         BASE_HW_ISSUE_11020,
 215         BASE_HW_ISSUE_11035,
 216         BASE_HW_ISSUE_11051,
 217         BASE_HW_ISSUE_11054,
 218         BASE_HW_ISSUE_T76X_1909,
 219         BASE_HW_ISSUE_T76X_3964,
 220         BASE_HW_ISSUE_END
 221 };
 222
 223 static const enum base_hw_issue base_hw_issues_t60x_r0p1[] = {
 224         BASE_HW_ISSUE_6367,
 225         BASE_HW_ISSUE_6402,
 226         BASE_HW_ISSUE_6787,
 227         BASE_HW_ISSUE_7027,
 228         BASE_HW_ISSUE_7304,
 229         BASE_HW_ISSUE_8408,
 230         BASE_HW_ISSUE_8564,
 231         BASE_HW_ISSUE_8778,
 232         BASE_HW_ISSUE_8975,
 233         BASE_HW_ISSUE_9010,
 234         BASE_HW_ISSUE_9435,
 235         BASE_HW_ISSUE_9510,
 236         BASE_HW_ISSUE_10410,
 237         BASE_HW_ISSUE_10471,
 238         BASE_HW_ISSUE_10472,
 239         BASE_HW_ISSUE_10487,
 240         BASE_HW_ISSUE_10607,
 241         BASE_HW_ISSUE_10632,
 242         BASE_HW_ISSUE_10676,
 243         BASE_HW_ISSUE_10682,
 244         BASE_HW_ISSUE_10684,
 245         BASE_HW_ISSUE_10883,
 246         BASE_HW_ISSUE_10931,
 247         BASE_HW_ISSUE_10946,
 248         BASE_HW_ISSUE_11012,
 249         BASE_HW_ISSUE_11020,
 250         BASE_HW_ISSUE_11035,
 251         BASE_HW_ISSUE_11051,
 252         BASE_HW_ISSUE_11054,
 253         BASE_HW_ISSUE_T76X_1909,
 254         BASE_HW_ISSUE_T76X_1963,
 255         BASE_HW_ISSUE_T76X_3964,
 256         BASE_HW_ISSUE_END
 257 };
 258
 259 static const enum base_hw_issue base_hw_issues_t62x_r0p1[] = {
 260         BASE_HW_ISSUE_6402,
 261         BASE_HW_ISSUE_9435,
 262         BASE_HW_ISSUE_10127,
 263         BASE_HW_ISSUE_10327,
 264         BASE_HW_ISSUE_10410,
 265         BASE_HW_ISSUE_10471,
 266         BASE_HW_ISSUE_10472,
 267         BASE_HW_ISSUE_10487,
 268         BASE_HW_ISSUE_10607,
 269         BASE_HW_ISSUE_10632,
 270         BASE_HW_ISSUE_10676,
 271         BASE_HW_ISSUE_10682,
 272         BASE_HW_ISSUE_10684,
 273         BASE_HW_ISSUE_10817,
 274         BASE_HW_ISSUE_10821,
 275         BASE_HW_ISSUE_10883,
 276         BASE_HW_ISSUE_10931,
 277         BASE_HW_ISSUE_10946,
 278         BASE_HW_ISSUE_10959,
 279         BASE_HW_ISSUE_11012,
 280         BASE_HW_ISSUE_11020,
 281         BASE_HW_ISSUE_11024,
 282         BASE_HW_ISSUE_11035,
 283         BASE_HW_ISSUE_11042,
 284         BASE_HW_ISSUE_11051,
 285         BASE_HW_ISSUE_11054,
 286         BASE_HW_ISSUE_T76X_1909,
 287         BASE_HW_ISSUE_T76X_1963,
 288         BASE_HW_ISSUE_END
 289 };
 290
 291 static const enum base_hw_issue base_hw_issues_t62x_r1p0[] = {
 292         BASE_HW_ISSUE_6402,
 293         BASE_HW_ISSUE_9435,
 294         BASE_HW_ISSUE_10471,
 295         BASE_HW_ISSUE_10472,
 296         BASE_HW_ISSUE_10684,
 297         BASE_HW_ISSUE_10821,
 298         BASE_HW_ISSUE_10883,
 299         BASE_HW_ISSUE_10931,
 300         BASE_HW_ISSUE_10946,
 301         BASE_HW_ISSUE_10959,
 302         BASE_HW_ISSUE_11012,
 303         BASE_HW_ISSUE_11020,
 304         BASE_HW_ISSUE_11024,
 305         BASE_HW_ISSUE_11042,
 306         BASE_HW_ISSUE_11051,
 307         BASE_HW_ISSUE_11054,
 308         BASE_HW_ISSUE_T76X_1909,
 309         BASE_HW_ISSUE_T76X_1963,
 310         BASE_HW_ISSUE_T76X_3964,
 311         BASE_HW_ISSUE_END
 312 };
 313
 314 static const enum base_hw_issue base_hw_issues_t62x_r1p1[] = {
 315         BASE_HW_ISSUE_6402,
 316         BASE_HW_ISSUE_9435,
 317         BASE_HW_ISSUE_10471,
 318         BASE_HW_ISSUE_10472,
 319         BASE_HW_ISSUE_10684,
 320         BASE_HW_ISSUE_10821,
 321         BASE_HW_ISSUE_10883,
 322         BASE_HW_ISSUE_10931,
 323         BASE_HW_ISSUE_10946,
 324         BASE_HW_ISSUE_10959,
 325         BASE_HW_ISSUE_11012,
 326         BASE_HW_ISSUE_11042,
 327         BASE_HW_ISSUE_11051,
 328         BASE_HW_ISSUE_11054,
 329         BASE_HW_ISSUE_T76X_1909,
 330         BASE_HW_ISSUE_T76X_1963,
 331         BASE_HW_ISSUE_END
 332 };
 333
 334 static const enum base_hw_issue base_hw_issues_t76x_r0p0[] = {
 335         BASE_HW_ISSUE_9435,
 336         BASE_HW_ISSUE_10821,
 337         BASE_HW_ISSUE_10883,
 338         BASE_HW_ISSUE_10946,
 339         BASE_HW_ISSUE_11020,
 340         BASE_HW_ISSUE_11024,
 341         BASE_HW_ISSUE_11042,
 342         BASE_HW_ISSUE_11051,
 343         BASE_HW_ISSUE_11054,
 344         BASE_HW_ISSUE_T76X_26,
 345         BASE_HW_ISSUE_T76X_1909,
 346         BASE_HW_ISSUE_T76X_1963,
 347         BASE_HW_ISSUE_T76X_3086,
 348         BASE_HW_ISSUE_T76X_3542,
 349         BASE_HW_ISSUE_T76X_3556,
 350         BASE_HW_ISSUE_T76X_3700,
 351         BASE_HW_ISSUE_T76X_3793,
 352         BASE_HW_ISSUE_T76X_3953,
 353         BASE_HW_ISSUE_T76X_3960,
 354         BASE_HW_ISSUE_T76X_3964,
 355         BASE_HW_ISSUE_T76X_3966,
 356         BASE_HW_ISSUE_T76X_3979,
 357         BASE_HW_ISSUE_TMIX_7891,
 358         BASE_HW_ISSUE_END
 359 };
 360
 361 static const enum base_hw_issue base_hw_issues_t76x_r0p1[] = {
 362         BASE_HW_ISSUE_9435,
 363         BASE_HW_ISSUE_10821,
 364         BASE_HW_ISSUE_10883,
 365         BASE_HW_ISSUE_10946,
 366         BASE_HW_ISSUE_11020,
 367         BASE_HW_ISSUE_11024,
 368         BASE_HW_ISSUE_11042,
 369         BASE_HW_ISSUE_11051,
 370         BASE_HW_ISSUE_11054,
 371         BASE_HW_ISSUE_T76X_26,
 372         BASE_HW_ISSUE_T76X_1909,
 373         BASE_HW_ISSUE_T76X_1963,
 374         BASE_HW_ISSUE_T76X_3086,
 375         BASE_HW_ISSUE_T76X_3542,
 376         BASE_HW_ISSUE_T76X_3556,
 377         BASE_HW_ISSUE_T76X_3700,
 378         BASE_HW_ISSUE_T76X_3793,
 379         BASE_HW_ISSUE_T76X_3953,
 380         BASE_HW_ISSUE_T76X_3960,
 381         BASE_HW_ISSUE_T76X_3964,
 382         BASE_HW_ISSUE_T76X_3966,
 383         BASE_HW_ISSUE_T76X_3979,
 384         BASE_HW_ISSUE_TMIX_7891,
 385         BASE_HW_ISSUE_END
 386 };
 387
 388 static const enum base_hw_issue base_hw_issues_t76x_r0p1_50rel0[] = {
 389         BASE_HW_ISSUE_9435,
 390         BASE_HW_ISSUE_10821,
 391         BASE_HW_ISSUE_10883,
 392         BASE_HW_ISSUE_10946,
 393         BASE_HW_ISSUE_11042,
 394         BASE_HW_ISSUE_11051,
 395         BASE_HW_ISSUE_11054,
 396         BASE_HW_ISSUE_T76X_26,
 397         BASE_HW_ISSUE_T76X_1909,
 398         BASE_HW_ISSUE_T76X_1963,
 399         BASE_HW_ISSUE_T76X_3086,
 400         BASE_HW_ISSUE_T76X_3542,
 401         BASE_HW_ISSUE_T76X_3556,
 402         BASE_HW_ISSUE_T76X_3700,
 403         BASE_HW_ISSUE_T76X_3793,
 404         BASE_HW_ISSUE_T76X_3953,
 405         BASE_HW_ISSUE_T76X_3960,
 406         BASE_HW_ISSUE_T76X_3964,
 407         BASE_HW_ISSUE_T76X_3966,
 408         BASE_HW_ISSUE_T76X_3979,
 409         BASE_HW_ISSUE_TMIX_7891,
 410         BASE_HW_ISSUE_END
 411 };
 412
 413 static const enum base_hw_issue base_hw_issues_t76x_r0p2[] = {
 414         BASE_HW_ISSUE_9435,
 415         BASE_HW_ISSUE_10821,
 416         BASE_HW_ISSUE_10883,
 417         BASE_HW_ISSUE_10946,
 418         BASE_HW_ISSUE_11020,
 419         BASE_HW_ISSUE_11024,
 420         BASE_HW_ISSUE_11042,
 421         BASE_HW_ISSUE_11051,
 422         BASE_HW_ISSUE_11054,
 423         BASE_HW_ISSUE_T76X_26,
 424         BASE_HW_ISSUE_T76X_1909,
 425         BASE_HW_ISSUE_T76X_1963,
 426         BASE_HW_ISSUE_T76X_3086,
 427         BASE_HW_ISSUE_T76X_3542,
 428         BASE_HW_ISSUE_T76X_3556,
 429         BASE_HW_ISSUE_T76X_3700,
 430         BASE_HW_ISSUE_T76X_3793,
 431         BASE_HW_ISSUE_T76X_3953,
 432         BASE_HW_ISSUE_T76X_3960,
 433         BASE_HW_ISSUE_T76X_3964,
 434         BASE_HW_ISSUE_T76X_3966,
 435         BASE_HW_ISSUE_T76X_3979,
 436         BASE_HW_ISSUE_TMIX_7891,
 437         BASE_HW_ISSUE_END
 438 };
 439
 440 static const enum base_hw_issue base_hw_issues_t76x_r0p3[] = {
 441         BASE_HW_ISSUE_9435,
 442         BASE_HW_ISSUE_10821,
 443         BASE_HW_ISSUE_10883,
 444         BASE_HW_ISSUE_10946,
 445         BASE_HW_ISSUE_11042,
 446         BASE_HW_ISSUE_11051,
 447         BASE_HW_ISSUE_11054,
 448         BASE_HW_ISSUE_T76X_26,
 449         BASE_HW_ISSUE_T76X_1909,
 450         BASE_HW_ISSUE_T76X_1963,
 451         BASE_HW_ISSUE_T76X_3086,
 452         BASE_HW_ISSUE_T76X_3542,
 453         BASE_HW_ISSUE_T76X_3556,
 454         BASE_HW_ISSUE_T76X_3700,
 455         BASE_HW_ISSUE_T76X_3793,
 456         BASE_HW_ISSUE_T76X_3953,
 457         BASE_HW_ISSUE_T76X_3960,
 458         BASE_HW_ISSUE_T76X_3964,
 459         BASE_HW_ISSUE_T76X_3966,
 460         BASE_HW_ISSUE_T76X_3979,
 461         BASE_HW_ISSUE_TMIX_7891,
 462         BASE_HW_ISSUE_END
 463 };
 464
 465 static const enum base_hw_issue base_hw_issues_t76x_r1p0[] = {
 466         BASE_HW_ISSUE_9435,
 467         BASE_HW_ISSUE_10821,
 468         BASE_HW_ISSUE_10883,
 469         BASE_HW_ISSUE_10946,
 470         BASE_HW_ISSUE_11042,
 471         BASE_HW_ISSUE_11051,
 472         BASE_HW_ISSUE_11054,
 473         BASE_HW_ISSUE_T76X_1909,
 474         BASE_HW_ISSUE_T76X_1963,
 475         BASE_HW_ISSUE_T76X_3086,
 476         BASE_HW_ISSUE_T76X_3700,
 477         BASE_HW_ISSUE_T76X_3793,
 478         BASE_HW_ISSUE_T76X_3953,
 479         BASE_HW_ISSUE_T76X_3960,
 480         BASE_HW_ISSUE_T76X_3964,
 481         BASE_HW_ISSUE_T76X_3966,
 482         BASE_HW_ISSUE_T76X_3979,
 483         BASE_HW_ISSUE_TMIX_7891,
 484         BASE_HW_ISSUE_END
 485 };
 486
 487 static const enum base_hw_issue base_hw_issues_t72x_r0p0[] = {
 488         BASE_HW_ISSUE_6402,
 489         BASE_HW_ISSUE_9435,
 490         BASE_HW_ISSUE_10471,
 491         BASE_HW_ISSUE_10684,
 492         BASE_HW_ISSUE_10797,
 493         BASE_HW_ISSUE_10821,
 494         BASE_HW_ISSUE_10883,
 495         BASE_HW_ISSUE_10946,
 496         BASE_HW_ISSUE_11042,
 497         BASE_HW_ISSUE_11051,
 498         BASE_HW_ISSUE_11054,
 499         BASE_HW_ISSUE_T76X_1909,
 500         BASE_HW_ISSUE_T76X_1963,
 501         BASE_HW_ISSUE_T76X_3964,
 502         BASE_HW_ISSUE_END
 503 };
 504
 505 static const enum base_hw_issue base_hw_issues_t72x_r1p0[] = {
 506         BASE_HW_ISSUE_6402,
 507         BASE_HW_ISSUE_9435,
 508         BASE_HW_ISSUE_10471,
 509         BASE_HW_ISSUE_10684,
 510         BASE_HW_ISSUE_10797,
 511         BASE_HW_ISSUE_10821,
 512         BASE_HW_ISSUE_10883,
 513         BASE_HW_ISSUE_10946,
 514         BASE_HW_ISSUE_11042,
 515         BASE_HW_ISSUE_11051,
 516         BASE_HW_ISSUE_11054,
 517         BASE_HW_ISSUE_T76X_1909,
 518         BASE_HW_ISSUE_T76X_1963,
 519         BASE_HW_ISSUE_T76X_3964,
 520         BASE_HW_ISSUE_END
 521 };
 522
 523 static const enum base_hw_issue base_hw_issues_t72x_r1p1[] = {
 524         BASE_HW_ISSUE_6402,
 525         BASE_HW_ISSUE_9435,
 526         BASE_HW_ISSUE_10471,
 527         BASE_HW_ISSUE_10684,
 528         BASE_HW_ISSUE_10797,
 529         BASE_HW_ISSUE_10821,
 530         BASE_HW_ISSUE_10883,
 531         BASE_HW_ISSUE_10946,
 532         BASE_HW_ISSUE_11042,
 533         BASE_HW_ISSUE_11051,
 534         BASE_HW_ISSUE_11054,
 535         BASE_HW_ISSUE_T76X_1909,
 536         BASE_HW_ISSUE_T76X_1963,
 537         BASE_HW_ISSUE_T76X_3964,
 538         BASE_HW_ISSUE_END
 539 };
 540
 541 static const enum base_hw_issue base_hw_issues_model_t72x[] = {
 542         BASE_HW_ISSUE_5736,
 543         BASE_HW_ISSUE_6402,
 544         BASE_HW_ISSUE_9435,
 545         BASE_HW_ISSUE_10471,
 546         BASE_HW_ISSUE_10797,
 547         BASE_HW_ISSUE_11042,
 548         BASE_HW_ISSUE_11051,
 549         BASE_HW_ISSUE_T76X_1909,
 550         BASE_HW_ISSUE_T76X_1963,
 551         BASE_HW_ISSUE_T76X_3964,
 552         GPUCORE_1619,
 553         BASE_HW_ISSUE_END
 554 };
 555
 556 static const enum base_hw_issue base_hw_issues_model_t76x[] = {
 557         BASE_HW_ISSUE_5736,
 558         BASE_HW_ISSUE_9435,
 559         BASE_HW_ISSUE_11020,
 560         BASE_HW_ISSUE_11024,
 561         BASE_HW_ISSUE_11042,
 562         BASE_HW_ISSUE_11051,
 563         BASE_HW_ISSUE_T76X_1909,
 564         BASE_HW_ISSUE_T76X_1963,
 565         BASE_HW_ISSUE_T76X_3086,
 566         BASE_HW_ISSUE_T76X_3700,
 567         BASE_HW_ISSUE_T76X_3793,
 568         BASE_HW_ISSUE_T76X_3964,
 569         BASE_HW_ISSUE_T76X_3979,
 570         BASE_HW_ISSUE_TMIX_7891,
 571         GPUCORE_1619,
 572         BASE_HW_ISSUE_END
 573 };
 574
 575 static const enum base_hw_issue base_hw_issues_model_t60x[] = {
 576         BASE_HW_ISSUE_5736,
 577         BASE_HW_ISSUE_6402,
 578         BASE_HW_ISSUE_8778,
 579         BASE_HW_ISSUE_9435,
 580         BASE_HW_ISSUE_10472,
 581         BASE_HW_ISSUE_10931,
 582         BASE_HW_ISSUE_11012,
 583         BASE_HW_ISSUE_11020,
 584         BASE_HW_ISSUE_11024,
 585         BASE_HW_ISSUE_11051,
 586         BASE_HW_ISSUE_T76X_1909,
 587         BASE_HW_ISSUE_T76X_1963,
 588         BASE_HW_ISSUE_T76X_3964,
 589         GPUCORE_1619,
 590         BASE_HW_ISSUE_END
 591 };
 592
 593 static const enum base_hw_issue base_hw_issues_model_t62x[] = {
 594         BASE_HW_ISSUE_5736,
 595         BASE_HW_ISSUE_6402,
 596         BASE_HW_ISSUE_9435,
 597         BASE_HW_ISSUE_10472,
 598         BASE_HW_ISSUE_10931,
 599         BASE_HW_ISSUE_11012,
 600         BASE_HW_ISSUE_11020,
 601         BASE_HW_ISSUE_11024,
 602         BASE_HW_ISSUE_11042,
 603         BASE_HW_ISSUE_11051,
 604         BASE_HW_ISSUE_T76X_1909,
 605         BASE_HW_ISSUE_T76X_1963,
 606         BASE_HW_ISSUE_T76X_3964,
 607         GPUCORE_1619,
 608         BASE_HW_ISSUE_END
 609 };
 610
 611 static const enum base_hw_issue base_hw_issues_tFRx_r0p1[] = {
 612         BASE_HW_ISSUE_9435,
 613         BASE_HW_ISSUE_10821,
 614         BASE_HW_ISSUE_10883,
 615         BASE_HW_ISSUE_10946,
 616         BASE_HW_ISSUE_11051,
 617         BASE_HW_ISSUE_11054,
 618         BASE_HW_ISSUE_T76X_1909,
 619         BASE_HW_ISSUE_T76X_1963,
 620         BASE_HW_ISSUE_T76X_3086,
 621         BASE_HW_ISSUE_T76X_3700,
 622         BASE_HW_ISSUE_T76X_3793,
 623         BASE_HW_ISSUE_T76X_3953,
 624         BASE_HW_ISSUE_T76X_3960,
 625         BASE_HW_ISSUE_T76X_3964,
 626         BASE_HW_ISSUE_T76X_3966,
 627         BASE_HW_ISSUE_T76X_3979,
 628         BASE_HW_ISSUE_TMIX_7891,
 629         BASE_HW_ISSUE_END
 630 };
 631
 632 static const enum base_hw_issue base_hw_issues_tFRx_r0p2[] = {
 633         BASE_HW_ISSUE_9435,
 634         BASE_HW_ISSUE_10821,
 635         BASE_HW_ISSUE_10883,
 636         BASE_HW_ISSUE_10946,
 637         BASE_HW_ISSUE_11051,
 638         BASE_HW_ISSUE_11054,
 639         BASE_HW_ISSUE_T76X_1909,
 640         BASE_HW_ISSUE_T76X_1963,
 641         BASE_HW_ISSUE_T76X_3086,
 642         BASE_HW_ISSUE_T76X_3700,
 643         BASE_HW_ISSUE_T76X_3793,
 644         BASE_HW_ISSUE_T76X_3953,
 645         BASE_HW_ISSUE_T76X_3964,
 646         BASE_HW_ISSUE_T76X_3966,
 647         BASE_HW_ISSUE_T76X_3979,
 648         BASE_HW_ISSUE_TMIX_7891,
 649         BASE_HW_ISSUE_END
 650 };
 651
 652 static const enum base_hw_issue base_hw_issues_tFRx_r1p0[] = {
 653         BASE_HW_ISSUE_9435,
 654         BASE_HW_ISSUE_10821,
 655         BASE_HW_ISSUE_10883,
 656         BASE_HW_ISSUE_10946,
 657         BASE_HW_ISSUE_11051,
 658         BASE_HW_ISSUE_11054,
 659         BASE_HW_ISSUE_T76X_1963,
 660         BASE_HW_ISSUE_T76X_3086,
 661         BASE_HW_ISSUE_T76X_3700,
 662         BASE_HW_ISSUE_T76X_3793,
 663         BASE_HW_ISSUE_T76X_3953,
 664         BASE_HW_ISSUE_T76X_3966,
 665         BASE_HW_ISSUE_T76X_3979,
 666         BASE_HW_ISSUE_TMIX_7891,
 667         BASE_HW_ISSUE_END
 668 };
 669
 670 static const enum base_hw_issue base_hw_issues_tFRx_r2p0[] = {
 671         BASE_HW_ISSUE_9435,
 672         BASE_HW_ISSUE_10821,
 673         BASE_HW_ISSUE_10883,
 674         BASE_HW_ISSUE_10946,
 675         BASE_HW_ISSUE_11051,
 676         BASE_HW_ISSUE_11054,
 677         BASE_HW_ISSUE_T76X_1963,
 678         BASE_HW_ISSUE_T76X_3086,
 679         BASE_HW_ISSUE_T76X_3700,
 680         BASE_HW_ISSUE_T76X_3793,
 681         BASE_HW_ISSUE_T76X_3953,
 682         BASE_HW_ISSUE_T76X_3966,
 683         BASE_HW_ISSUE_T76X_3979,
 684         BASE_HW_ISSUE_TMIX_7891,
 685         BASE_HW_ISSUE_END
 686 };
 687
 688 static const enum base_hw_issue base_hw_issues_model_tFRx[] = {
 689         BASE_HW_ISSUE_5736,
 690         BASE_HW_ISSUE_9435,
 691         BASE_HW_ISSUE_11051,
 692         BASE_HW_ISSUE_T76X_1963,
 693         BASE_HW_ISSUE_T76X_3086,
 694         BASE_HW_ISSUE_T76X_3700,
 695         BASE_HW_ISSUE_T76X_3793,
 696         BASE_HW_ISSUE_T76X_3964,
 697         BASE_HW_ISSUE_T76X_3979,
 698         BASE_HW_ISSUE_TMIX_7891,
 699         GPUCORE_1619,
 700         BASE_HW_ISSUE_END
 701 };
 702
 703 static const enum base_hw_issue base_hw_issues_t86x_r0p2[] = {
 704         BASE_HW_ISSUE_9435,
 705         BASE_HW_ISSUE_10821,
 706         BASE_HW_ISSUE_10883,
 707         BASE_HW_ISSUE_10946,
 708         BASE_HW_ISSUE_11051,
 709         BASE_HW_ISSUE_11054,
 710         BASE_HW_ISSUE_T76X_1909,
 711         BASE_HW_ISSUE_T76X_1963,
 712         BASE_HW_ISSUE_T76X_3086,
 713         BASE_HW_ISSUE_T76X_3700,
 714         BASE_HW_ISSUE_T76X_3793,
 715         BASE_HW_ISSUE_T76X_3953,
 716         BASE_HW_ISSUE_T76X_3964,
 717         BASE_HW_ISSUE_T76X_3966,
 718         BASE_HW_ISSUE_T76X_3979,
 719         BASE_HW_ISSUE_TMIX_7891,
 720         BASE_HW_ISSUE_END
 721 };
 722
 723 static const enum base_hw_issue base_hw_issues_t86x_r1p0[] = {
 724         BASE_HW_ISSUE_9435,
 725         BASE_HW_ISSUE_10821,
 726         BASE_HW_ISSUE_10883,
 727         BASE_HW_ISSUE_10946,
 728         BASE_HW_ISSUE_11051,
 729         BASE_HW_ISSUE_11054,
 730         BASE_HW_ISSUE_T76X_1963,
 731         BASE_HW_ISSUE_T76X_3086,
 732         BASE_HW_ISSUE_T76X_3700,
 733         BASE_HW_ISSUE_T76X_3793,
 734         BASE_HW_ISSUE_T76X_3953,
 735         BASE_HW_ISSUE_T76X_3966,
 736         BASE_HW_ISSUE_T76X_3979,
 737         BASE_HW_ISSUE_TMIX_7891,
 738         BASE_HW_ISSUE_END
 739 };
 740
 741 static const enum base_hw_issue base_hw_issues_t86x_r2p0[] = {
 742         BASE_HW_ISSUE_9435,
 743         BASE_HW_ISSUE_10821,
 744         BASE_HW_ISSUE_10883,
 745         BASE_HW_ISSUE_10946,
 746         BASE_HW_ISSUE_11051,
 747         BASE_HW_ISSUE_11054,
 748         BASE_HW_ISSUE_T76X_1963,
 749         BASE_HW_ISSUE_T76X_3086,
 750         BASE_HW_ISSUE_T76X_3700,
 751         BASE_HW_ISSUE_T76X_3793,
 752         BASE_HW_ISSUE_T76X_3953,
 753         BASE_HW_ISSUE_T76X_3966,
 754         BASE_HW_ISSUE_T76X_3979,
 755         BASE_HW_ISSUE_TMIX_7891,
 756         BASE_HW_ISSUE_END
 757 };
 758
 759 static const enum base_hw_issue base_hw_issues_model_t86x[] = {
 760         BASE_HW_ISSUE_5736,
 761         BASE_HW_ISSUE_9435,
 762         BASE_HW_ISSUE_11051,
 763         BASE_HW_ISSUE_T76X_1963,
 764         BASE_HW_ISSUE_T76X_3086,
 765         BASE_HW_ISSUE_T76X_3700,
 766         BASE_HW_ISSUE_T76X_3793,
 767         BASE_HW_ISSUE_T76X_3979,
 768         BASE_HW_ISSUE_TMIX_7891,
 769         GPUCORE_1619,
 770         BASE_HW_ISSUE_END
 771 };
 772
 773 static const enum base_hw_issue base_hw_issues_t83x_r0p1[] = {
 774         BASE_HW_ISSUE_9435,
 775         BASE_HW_ISSUE_10821,
 776         BASE_HW_ISSUE_10883,
 777         BASE_HW_ISSUE_10946,
 778         BASE_HW_ISSUE_11051,
 779         BASE_HW_ISSUE_11054,
 780         BASE_HW_ISSUE_T76X_1909,
 781         BASE_HW_ISSUE_T76X_1963,
 782         BASE_HW_ISSUE_T76X_3086,
 783         BASE_HW_ISSUE_T76X_3700,
 784         BASE_HW_ISSUE_T76X_3793,
 785         BASE_HW_ISSUE_T76X_3953,
 786         BASE_HW_ISSUE_T76X_3960,
 787         BASE_HW_ISSUE_T76X_3979,
 788         BASE_HW_ISSUE_TMIX_7891,
 789         BASE_HW_ISSUE_END
 790 };
 791
 792 static const enum base_hw_issue base_hw_issues_t83x_r1p0[] = {
 793         BASE_HW_ISSUE_9435,
 794         BASE_HW_ISSUE_10821,
 795         BASE_HW_ISSUE_10883,
 796         BASE_HW_ISSUE_10946,
 797         BASE_HW_ISSUE_11051,
 798         BASE_HW_ISSUE_11054,
 799         BASE_HW_ISSUE_T76X_1963,
 800         BASE_HW_ISSUE_T76X_3086,
 801         BASE_HW_ISSUE_T76X_3700,
 802         BASE_HW_ISSUE_T76X_3793,
 803         BASE_HW_ISSUE_T76X_3953,
 804         BASE_HW_ISSUE_T76X_3960,
 805         BASE_HW_ISSUE_T76X_3979,
 806         BASE_HW_ISSUE_TMIX_7891,
 807         BASE_HW_ISSUE_END
 808 };
 809
 810 static const enum base_hw_issue base_hw_issues_model_t83x[] = {
 811         BASE_HW_ISSUE_5736,
 812         BASE_HW_ISSUE_9435,
 813         BASE_HW_ISSUE_11051,
 814         BASE_HW_ISSUE_T76X_1909,
 815         BASE_HW_ISSUE_T76X_1963,
 816         BASE_HW_ISSUE_T76X_3086,
 817         BASE_HW_ISSUE_T76X_3700,
 818         BASE_HW_ISSUE_T76X_3793,
 819         BASE_HW_ISSUE_T76X_3964,
 820         BASE_HW_ISSUE_T76X_3979,
 821         BASE_HW_ISSUE_TMIX_7891,
 822         GPUCORE_1619,
 823         BASE_HW_ISSUE_END
 824 };
 825
 826 static const enum base_hw_issue base_hw_issues_t82x_r0p0[] = {
 827         BASE_HW_ISSUE_9435,
 828         BASE_HW_ISSUE_10821,
 829         BASE_HW_ISSUE_10883,
 830         BASE_HW_ISSUE_10946,
 831         BASE_HW_ISSUE_11051,
 832         BASE_HW_ISSUE_11054,
 833         BASE_HW_ISSUE_T76X_1909,
 834         BASE_HW_ISSUE_T76X_1963,
 835         BASE_HW_ISSUE_T76X_3086,
 836         BASE_HW_ISSUE_T76X_3700,
 837         BASE_HW_ISSUE_T76X_3793,
 838         BASE_HW_ISSUE_T76X_3953,
 839         BASE_HW_ISSUE_T76X_3960,
 840         BASE_HW_ISSUE_T76X_3964,
 841         BASE_HW_ISSUE_T76X_3979,
 842         BASE_HW_ISSUE_TMIX_7891,
 843         BASE_HW_ISSUE_END
 844 };
 845
 846 static const enum base_hw_issue base_hw_issues_t82x_r0p1[] = {
 847         BASE_HW_ISSUE_9435,
 848         BASE_HW_ISSUE_10821,
 849         BASE_HW_ISSUE_10883,
 850         BASE_HW_ISSUE_10946,
 851         BASE_HW_ISSUE_11051,
 852         BASE_HW_ISSUE_11054,
 853         BASE_HW_ISSUE_T76X_1909,
 854         BASE_HW_ISSUE_T76X_1963,
 855         BASE_HW_ISSUE_T76X_3086,
 856         BASE_HW_ISSUE_T76X_3700,
 857         BASE_HW_ISSUE_T76X_3793,
 858         BASE_HW_ISSUE_T76X_3953,
 859         BASE_HW_ISSUE_T76X_3960,
 860         BASE_HW_ISSUE_T76X_3979,
 861         BASE_HW_ISSUE_TMIX_7891,
 862         BASE_HW_ISSUE_END
 863 };
 864
 865 static const enum base_hw_issue base_hw_issues_t82x_r1p0[] = {
 866         BASE_HW_ISSUE_9435,
 867         BASE_HW_ISSUE_10821,
 868         BASE_HW_ISSUE_10883,
 869         BASE_HW_ISSUE_10946,
 870         BASE_HW_ISSUE_11051,
 871         BASE_HW_ISSUE_11054,
 872         BASE_HW_ISSUE_T76X_1963,
 873         BASE_HW_ISSUE_T76X_3086,
 874         BASE_HW_ISSUE_T76X_3700,
 875         BASE_HW_ISSUE_T76X_3793,
 876         BASE_HW_ISSUE_T76X_3953,
 877         BASE_HW_ISSUE_T76X_3960,
 878         BASE_HW_ISSUE_T76X_3979,
 879         BASE_HW_ISSUE_TMIX_7891,
 880         BASE_HW_ISSUE_END
 881 };
 882
 883 static const enum base_hw_issue base_hw_issues_model_t82x[] = {
 884         BASE_HW_ISSUE_5736,
 885         BASE_HW_ISSUE_9435,
 886         BASE_HW_ISSUE_11051,
 887         BASE_HW_ISSUE_T76X_1909,
 888         BASE_HW_ISSUE_T76X_1963,
 889         BASE_HW_ISSUE_T76X_3086,
 890         BASE_HW_ISSUE_T76X_3700,
 891         BASE_HW_ISSUE_T76X_3793,
 892         BASE_HW_ISSUE_T76X_3979,
 893         BASE_HW_ISSUE_TMIX_7891,
 894         GPUCORE_1619,
 895         BASE_HW_ISSUE_END
 896 };
 897
 898 static const enum base_hw_issue base_hw_issues_tMIx_r0p0_05dev0[] = {
 899         BASE_HW_ISSUE_9435,
 900         BASE_HW_ISSUE_10682,
 901         BASE_HW_ISSUE_10821,
 902         BASE_HW_ISSUE_11054,
 903         BASE_HW_ISSUE_T76X_3700,
 904         BASE_HW_ISSUE_T76X_3953,
 905         BASE_HW_ISSUE_TMIX_7891,
 906         BASE_HW_ISSUE_TMIX_8042,
 907         BASE_HW_ISSUE_TMIX_8133,
 908         BASE_HW_ISSUE_TMIX_8138,
 909         BASE_HW_ISSUE_END
 910 };
 911
 912 static const enum base_hw_issue base_hw_issues_tMIx_r0p0[] = {
 913         BASE_HW_ISSUE_9435,
 914         BASE_HW_ISSUE_10682,
 915         BASE_HW_ISSUE_10821,
 916         BASE_HW_ISSUE_11054,
 917         BASE_HW_ISSUE_T76X_3700,
 918         BASE_HW_ISSUE_TMIX_7891,
 919         BASE_HW_ISSUE_TMIX_7940,
 920         BASE_HW_ISSUE_TMIX_8042,
 921         BASE_HW_ISSUE_TMIX_8133,
 922         BASE_HW_ISSUE_TMIX_8138,
 923         BASE_HW_ISSUE_TMIX_8206,
 924         BASE_HW_ISSUE_END
 925 };
 926
 927 static const enum base_hw_issue base_hw_issues_model_tMIx[] = {
 928         BASE_HW_ISSUE_5736,
 929         BASE_HW_ISSUE_9435,
 930         BASE_HW_ISSUE_T76X_3700,
 931         BASE_HW_ISSUE_TMIX_7891,
 932         BASE_HW_ISSUE_TMIX_7940,
 933         BASE_HW_ISSUE_TMIX_8042,
 934         BASE_HW_ISSUE_TMIX_8133,
 935         BASE_HW_ISSUE_TMIX_8138,
 936         BASE_HW_ISSUE_TMIX_8206,
 937         GPUCORE_1619,
 938         BASE_HW_ISSUE_END
 939 };
 940
 941
 942
 943
 944
 945 #endif /* _BASE_HWCONFIG_ISSUES_H_ */