2 * Copyright (C) 2011-2012 ARM Limited. All rights reserved.
4 * This program is free software and is provided to you under the terms of the GNU General Public License version 2
5 * as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence.
7 * A copy of the licence is included with the program, and can also be obtained from Free Software
8 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 #include "mali_pp_job.h"
16 #include "mali_hw_core.h"
21 #define MALI_MAX_NUMBER_OF_PP_CORES 9
24 * Definition of the PP core struct
25 * Used to track a PP core in the system.
28 struct mali_hw_core hw_core; /**< Common for all HW cores */
29 _mali_osk_irq_t *irq; /**< IRQ handler */
30 u32 core_id; /**< Unique core ID */
31 u32 bcast_id; /**< The "flag" value used by the Mali-450 broadcast and DLBU unit */
34 _mali_osk_errcode_t mali_pp_initialize(void);
35 void mali_pp_terminate(void);
37 struct mali_pp_core *mali_pp_create(const _mali_osk_resource_t * resource, struct mali_group *group, mali_bool is_virtual, u32 bcast_id);
38 void mali_pp_delete(struct mali_pp_core *core);
40 void mali_pp_stop_bus(struct mali_pp_core *core);
41 _mali_osk_errcode_t mali_pp_stop_bus_wait(struct mali_pp_core *core);
42 void mali_pp_reset_async(struct mali_pp_core *core);
43 _mali_osk_errcode_t mali_pp_reset_wait(struct mali_pp_core *core);
44 _mali_osk_errcode_t mali_pp_reset(struct mali_pp_core *core);
45 _mali_osk_errcode_t mali_pp_hard_reset(struct mali_pp_core *core);
47 void mali_pp_job_start(struct mali_pp_core *core, struct mali_pp_job *job, u32 sub_job, mali_bool restart_virtual);
50 * @brief Add commands to DMA command buffer to start PP job on core.
52 void mali_pp_job_dma_cmd_prepare(struct mali_pp_core *core, struct mali_pp_job *job, u32 sub_job,
53 mali_bool restart_virtual, mali_dma_cmd_buf *buf);
55 u32 mali_pp_core_get_version(struct mali_pp_core *core);
57 MALI_STATIC_INLINE u32 mali_pp_core_get_id(struct mali_pp_core *core)
59 MALI_DEBUG_ASSERT_POINTER(core);
63 MALI_STATIC_INLINE u32 mali_pp_core_get_bcast_id(struct mali_pp_core *core)
65 MALI_DEBUG_ASSERT_POINTER(core);
66 return core->bcast_id;
69 struct mali_pp_core* mali_pp_get_global_pp_core(u32 index);
70 u32 mali_pp_get_glob_num_pp_cores(void);
73 u32 mali_pp_dump_state(struct mali_pp_core *core, char *buf, u32 size);
76 * Put instrumented HW counters from the core(s) to the job object (if enabled)
78 * parent and child is always the same, except for virtual jobs on Mali-450.
79 * In this case, the counters will be enabled on the virtual core (parent),
80 * but values need to be read from the child cores.
82 * @param parent The core used to see if the counters was enabled
83 * @param child The core to actually read the values from
84 * @job Job object to update with counter values (if enabled)
85 * @subjob Which subjob the counters are applicable for (core ID for virtual jobs)
87 void mali_pp_update_performance_counters(struct mali_pp_core *parent, struct mali_pp_core *child, struct mali_pp_job *job, u32 subjob);
89 MALI_STATIC_INLINE const char *mali_pp_get_hw_core_desc(struct mali_pp_core *core)
91 return core->hw_core.description;
94 /*** Register reading/writing functions ***/
95 MALI_STATIC_INLINE u32 mali_pp_get_int_stat(struct mali_pp_core *core)
97 return mali_hw_core_register_read(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_STATUS);
100 MALI_STATIC_INLINE u32 mali_pp_read_rawstat(struct mali_pp_core *core)
102 return mali_hw_core_register_read(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_RAWSTAT) & MALI200_REG_VAL_IRQ_MASK_USED;
105 MALI_STATIC_INLINE u32 mali_pp_read_status(struct mali_pp_core *core)
107 return mali_hw_core_register_read(&core->hw_core, MALI200_REG_ADDR_MGMT_STATUS);
110 MALI_STATIC_INLINE void mali_pp_mask_all_interrupts(struct mali_pp_core *core)
112 mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_MASK, MALI200_REG_VAL_IRQ_MASK_NONE);
115 MALI_STATIC_INLINE void mali_pp_clear_hang_interrupt(struct mali_pp_core *core)
117 mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_CLEAR, MALI200_REG_VAL_IRQ_HANG);
120 MALI_STATIC_INLINE void mali_pp_enable_interrupts(struct mali_pp_core *core)
122 mali_hw_core_register_write(&core->hw_core, MALI200_REG_ADDR_MGMT_INT_MASK, MALI200_REG_VAL_IRQ_MASK_USED);
125 MALI_STATIC_INLINE void mali_pp_write_addr_stack(struct mali_pp_core *core, struct mali_pp_job *job)
127 u32 addr = mali_pp_job_get_addr_stack(job, core->core_id);
128 mali_hw_core_register_write_relaxed(&core->hw_core, MALI200_REG_ADDR_STACK, addr);
131 #endif /* __MALI_PP_H__ */