2 * Copyright (C) 2011-2012 ARM Limited. All rights reserved.
4 * This program is free software and is provided to you under the terms of the GNU General Public License version 2
5 * as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence.
7 * A copy of the licence is included with the program, and can also be obtained from Free Software
8 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
11 #ifndef __MALI_MMU_H__
12 #define __MALI_MMU_H__
15 #include "mali_mmu_page_directory.h"
16 #include "mali_hw_core.h"
18 /* Forward declaration from mali_group.h */
22 * MMU register numbers
23 * Used in the register read/write routines.
24 * See the hardware documentation for more information about each register
26 typedef enum mali_mmu_register {
27 MALI_MMU_REGISTER_DTE_ADDR = 0x0000, /**< Current Page Directory Pointer */
28 MALI_MMU_REGISTER_STATUS = 0x0004, /**< Status of the MMU */
29 MALI_MMU_REGISTER_COMMAND = 0x0008, /**< Command register, used to control the MMU */
30 MALI_MMU_REGISTER_PAGE_FAULT_ADDR = 0x000C, /**< Logical address of the last page fault */
31 MALI_MMU_REGISTER_ZAP_ONE_LINE = 0x010, /**< Used to invalidate the mapping of a single page from the MMU */
32 MALI_MMU_REGISTER_INT_RAWSTAT = 0x0014, /**< Raw interrupt status, all interrupts visible */
33 MALI_MMU_REGISTER_INT_CLEAR = 0x0018, /**< Indicate to the MMU that the interrupt has been received */
34 MALI_MMU_REGISTER_INT_MASK = 0x001C, /**< Enable/disable types of interrupts */
35 MALI_MMU_REGISTER_INT_STATUS = 0x0020 /**< Interrupt status based on the mask */
39 * MMU interrupt register bits
40 * Each cause of the interrupt is reported
41 * through the (raw) interrupt status registers.
42 * Multiple interrupts can be pending, so multiple bits
45 typedef enum mali_mmu_interrupt
47 MALI_MMU_INTERRUPT_PAGE_FAULT = 0x01, /**< A page fault occured */
48 MALI_MMU_INTERRUPT_READ_BUS_ERROR = 0x02 /**< A bus read error occured */
51 typedef enum mali_mmu_status_bits
53 MALI_MMU_STATUS_BIT_PAGING_ENABLED = 1 << 0,
54 MALI_MMU_STATUS_BIT_PAGE_FAULT_ACTIVE = 1 << 1,
55 MALI_MMU_STATUS_BIT_STALL_ACTIVE = 1 << 2,
56 MALI_MMU_STATUS_BIT_IDLE = 1 << 3,
57 MALI_MMU_STATUS_BIT_REPLAY_BUFFER_EMPTY = 1 << 4,
58 MALI_MMU_STATUS_BIT_PAGE_FAULT_IS_WRITE = 1 << 5,
59 MALI_MMU_STATUS_BIT_STALL_NOT_ACTIVE = 1 << 31,
60 } mali_mmu_status_bits;
63 * Definition of the MMU struct
64 * Used to track a MMU unit in the system.
65 * Contains information about the mapping of the registers
69 struct mali_hw_core hw_core; /**< Common for all HW cores */
70 _mali_osk_irq_t *irq; /**< IRQ handler */
73 _mali_osk_errcode_t mali_mmu_initialize(void);
75 void mali_mmu_terminate(void);
77 struct mali_mmu_core *mali_mmu_create(_mali_osk_resource_t *resource, struct mali_group *group, mali_bool is_virtual);
78 void mali_mmu_delete(struct mali_mmu_core *mmu);
80 _mali_osk_errcode_t mali_mmu_reset(struct mali_mmu_core *mmu);
81 mali_bool mali_mmu_zap_tlb(struct mali_mmu_core *mmu);
82 void mali_mmu_zap_tlb_without_stall(struct mali_mmu_core *mmu);
83 void mali_mmu_invalidate_page(struct mali_mmu_core *mmu, u32 mali_address);
85 mali_bool mali_mmu_activate_page_directory(struct mali_mmu_core* mmu, struct mali_page_directory *pagedir);
86 void mali_mmu_activate_empty_page_directory(struct mali_mmu_core* mmu);
87 void mali_mmu_activate_fault_flush_page_directory(struct mali_mmu_core* mmu);
90 * Issues the enable stall command to the MMU and waits for HW to complete the request
91 * @param mmu The MMU to enable paging for
92 * @return MALI_TRUE if HW stall was successfully engaged, otherwise MALI_FALSE (req timed out)
94 mali_bool mali_mmu_enable_stall(struct mali_mmu_core *mmu);
97 * Issues the disable stall command to the MMU and waits for HW to complete the request
98 * @param mmu The MMU to enable paging for
100 void mali_mmu_disable_stall(struct mali_mmu_core *mmu);
102 void mali_mmu_page_fault_done(struct mali_mmu_core *mmu);
104 /*** Register reading/writing functions ***/
105 MALI_STATIC_INLINE u32 mali_mmu_get_int_status(struct mali_mmu_core *mmu)
107 return mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_INT_STATUS);
110 MALI_STATIC_INLINE u32 mali_mmu_get_rawstat(struct mali_mmu_core *mmu)
112 return mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_INT_RAWSTAT);
115 MALI_STATIC_INLINE void mali_mmu_mask_all_interrupts(struct mali_mmu_core *mmu)
117 mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_INT_MASK, 0);
120 MALI_STATIC_INLINE u32 mali_mmu_get_status(struct mali_mmu_core *mmu)
122 return mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_STATUS);
125 MALI_STATIC_INLINE u32 mali_mmu_get_page_fault_addr(struct mali_mmu_core *mmu)
127 return mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_PAGE_FAULT_ADDR);
130 #endif /* __MALI_MMU_H__ */