2 * NVIDIA Tegra20 GPIO handling.
3 * (C) Copyright 2010-2012
4 * NVIDIA Corporation <www.nvidia.com>
6 * SPDX-License-Identifier: GPL-2.0+
10 * Based on (mostly copied from) kw_gpio.c based Linux 2.6 kernel driver.
11 * Tom Warren (twarren@nvidia.com)
16 #include <asm/bitops.h>
17 #include <asm/arch/tegra.h>
27 static struct gpio_names {
28 char name[GPIO_NAME_SIZE];
29 } gpio_names[MAX_NUM_GPIOS];
31 static char *get_name(int i)
33 return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN";
36 /* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */
37 static int get_config(unsigned gpio)
39 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
40 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
44 u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
45 type = (u >> GPIO_BIT(gpio)) & 1;
47 debug("get_config: port = %d, bit = %d is %s\n",
48 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
53 /* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */
54 static void set_config(unsigned gpio, int type)
56 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
57 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
60 debug("set_config: port = %d, bit = %d, %s\n",
61 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
63 u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
65 u |= 1 << GPIO_BIT(gpio);
67 u &= ~(1 << GPIO_BIT(gpio));
68 writel(u, &bank->gpio_config[GPIO_PORT(gpio)]);
71 /* Return GPIO pin 'gpio' direction - 0 = input or 1 = output */
72 static int get_direction(unsigned gpio)
74 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
75 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
79 u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]);
80 dir = (u >> GPIO_BIT(gpio)) & 1;
82 debug("get_direction: port = %d, bit = %d, %s\n",
83 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN");
88 /* Config GPIO pin 'gpio' as input or output (OE) as per 'output' */
89 static void set_direction(unsigned gpio, int output)
91 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
92 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
95 debug("set_direction: port = %d, bit = %d, %s\n",
96 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN");
98 u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]);
100 u |= 1 << GPIO_BIT(gpio);
102 u &= ~(1 << GPIO_BIT(gpio));
103 writel(u, &bank->gpio_dir_out[GPIO_PORT(gpio)]);
106 /* set GPIO pin 'gpio' output bit as 0 or 1 as per 'high' */
107 static void set_level(unsigned gpio, int high)
109 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
110 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
113 debug("set_level: port = %d, bit %d == %d\n",
114 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high);
116 u = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
118 u |= 1 << GPIO_BIT(gpio);
120 u &= ~(1 << GPIO_BIT(gpio));
121 writel(u, &bank->gpio_out[GPIO_PORT(gpio)]);
125 * Generic_GPIO primitives.
128 int gpio_request(unsigned gpio, const char *label)
130 if (gpio >= MAX_NUM_GPIOS)
134 strncpy(gpio_names[gpio].name, label, GPIO_NAME_SIZE);
135 gpio_names[gpio].name[GPIO_NAME_SIZE - 1] = '\0';
138 /* Configure as a GPIO */
144 int gpio_free(unsigned gpio)
146 if (gpio >= MAX_NUM_GPIOS)
149 gpio_names[gpio].name[0] = '\0';
150 /* Do not configure as input or change pin mux here */
154 /* read GPIO OUT value of pin 'gpio' */
155 static int gpio_get_output_value(unsigned gpio)
157 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
158 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
161 debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n",
162 gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
164 val = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
166 return (val >> GPIO_BIT(gpio)) & 1;
169 /* set GPIO pin 'gpio' as an input */
170 int gpio_direction_input(unsigned gpio)
172 debug("gpio_direction_input: pin = %d (port %d:bit %d)\n",
173 gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
175 /* Configure GPIO direction as input. */
176 set_direction(gpio, 0);
181 /* set GPIO pin 'gpio' as an output, with polarity 'value' */
182 int gpio_direction_output(unsigned gpio, int value)
184 debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n",
185 gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio),
186 value ? "HIGH" : "LOW");
188 /* Configure GPIO output value. */
189 set_level(gpio, value);
191 /* Configure GPIO direction as output. */
192 set_direction(gpio, 1);
197 /* read GPIO IN value of pin 'gpio' */
198 int gpio_get_value(unsigned gpio)
200 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
201 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
204 debug("gpio_get_value: pin = %d (port %d:bit %d)\n",
205 gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
207 val = readl(&bank->gpio_in[GPIO_PORT(gpio)]);
209 return (val >> GPIO_BIT(gpio)) & 1;
212 /* write GPIO OUT value to pin 'gpio' */
213 int gpio_set_value(unsigned gpio, int value)
215 debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n",
216 gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value);
218 /* Configure GPIO output value. */
219 set_level(gpio, value);
224 void gpio_config_table(const struct tegra_gpio_config *config, int len)
228 for (i = 0; i < len; i++) {
229 switch (config[i].init) {
230 case TEGRA_GPIO_INIT_IN:
231 gpio_direction_input(config[i].gpio);
233 case TEGRA_GPIO_INIT_OUT0:
234 gpio_direction_output(config[i].gpio, 0);
236 case TEGRA_GPIO_INIT_OUT1:
237 gpio_direction_output(config[i].gpio, 1);
240 set_config(config[i].gpio, 1);
245 * Display Tegra GPIO information
252 for (c = 0; c < MAX_NUM_GPIOS; c++) {
253 type = get_config(c); /* GPIO, not SFPIO */
255 printf("GPIO_%d:\t%s is an %s, ", c,
257 get_direction(c) ? "OUTPUT" : "INPUT");
258 if (get_direction(c))
259 printf("value = %d", gpio_get_output_value(c));
261 printf("value = %d", gpio_get_value(c));