1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
5 * Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
7 * (C) Copyright 2007-2011
8 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
9 * Tom Cubie <tangliang@allwinnertech.com>
19 #include <dt-bindings/gpio/gpio.h>
21 #if !CONFIG_IS_ENABLED(DM_GPIO)
22 static int sunxi_gpio_output(u32 pin, u32 val)
25 u32 bank = GPIO_BANK(pin);
26 u32 num = GPIO_NUM(pin);
27 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
29 dat = readl(&pio->dat);
35 writel(dat, &pio->dat);
40 static int sunxi_gpio_input(u32 pin)
43 u32 bank = GPIO_BANK(pin);
44 u32 num = GPIO_NUM(pin);
45 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
47 dat = readl(&pio->dat);
53 int gpio_request(unsigned gpio, const char *label)
58 int gpio_free(unsigned gpio)
63 int gpio_direction_input(unsigned gpio)
65 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
70 int gpio_direction_output(unsigned gpio, int value)
72 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
74 return sunxi_gpio_output(gpio, value);
77 int gpio_get_value(unsigned gpio)
79 return sunxi_gpio_input(gpio);
82 int gpio_set_value(unsigned gpio, int value)
84 return sunxi_gpio_output(gpio, value);
87 int sunxi_name_to_gpio(const char *name)
90 int groupsize = 9 * 32;
94 if (*name == 'P' || *name == 'p')
97 group = *name - (*name > 'a' ? 'a' : 'A');
102 pin = simple_strtol(name, &eptr, 10);
105 if (pin < 0 || pin > groupsize || group >= 9)
107 return group * 32 + pin;
111 #if CONFIG_IS_ENABLED(DM_GPIO)
112 /* TODO(sjg@chromium.org): Remove this function and use device tree */
113 int sunxi_name_to_gpio(const char *name)
117 #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
120 if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) {
121 sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
122 SUNXI_GPIO_AXP0_VBUS_ENABLE);
126 ret = gpio_lookup_name(name, NULL, NULL, &gpio);
128 return ret ? ret : gpio;
131 static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
133 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
134 u32 num = GPIO_NUM(offset);
137 dat = readl(&plat->regs->dat);
143 static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
145 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
148 func = sunxi_gpio_get_cfgbank(plat->regs, offset);
149 if (func == SUNXI_GPIO_OUTPUT)
151 else if (func == SUNXI_GPIO_INPUT)
157 static int sunxi_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
158 struct ofnode_phandle_args *args)
162 ret = device_get_child(dev, args->args[0], &desc->dev);
165 desc->offset = args->args[1];
166 desc->flags = gpio_flags_xlate(args->args[2]);
171 static int sunxi_gpio_set_flags(struct udevice *dev, unsigned int offset,
174 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
176 if (flags & GPIOD_IS_OUT) {
177 u32 value = !!(flags & GPIOD_IS_OUT_ACTIVE);
178 u32 num = GPIO_NUM(offset);
180 clrsetbits_le32(&plat->regs->dat, 1 << num, value << num);
181 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
182 } else if (flags & GPIOD_IS_IN) {
185 if (flags & GPIOD_PULL_UP)
187 else if (flags & GPIOD_PULL_DOWN)
189 sunxi_gpio_set_pull_bank(plat->regs, offset, pull);
190 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT);
196 static const struct dm_gpio_ops gpio_sunxi_ops = {
197 .get_value = sunxi_gpio_get_value,
198 .get_function = sunxi_gpio_get_function,
199 .xlate = sunxi_gpio_xlate,
200 .set_flags = sunxi_gpio_set_flags,
203 static int gpio_sunxi_probe(struct udevice *dev)
205 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
206 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
208 /* Tell the uclass how many GPIOs we have */
210 uc_priv->gpio_count = SUNXI_GPIOS_PER_BANK;
211 uc_priv->bank_name = plat->bank_name;
217 U_BOOT_DRIVER(gpio_sunxi) = {
218 .name = "gpio_sunxi",
220 .probe = gpio_sunxi_probe,
221 .ops = &gpio_sunxi_ops,