1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
5 * Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
7 * (C) Copyright 2007-2011
8 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
9 * Tom Cubie <tangliang@allwinnertech.com>
17 #include <asm/arch/gpio.h>
20 #include <dm/device-internal.h>
21 #include <dt-bindings/gpio/gpio.h>
23 #define SUNXI_GPIOS_PER_BANK SUNXI_GPIO_A_NR
25 struct sunxi_gpio_plat {
26 struct sunxi_gpio *regs;
27 const char *bank_name; /* Name of bank, e.g. "B" */
31 #if !CONFIG_IS_ENABLED(DM_GPIO)
32 static int sunxi_gpio_output(u32 pin, u32 val)
35 u32 bank = GPIO_BANK(pin);
36 u32 num = GPIO_NUM(pin);
37 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
39 dat = readl(&pio->dat);
45 writel(dat, &pio->dat);
50 static int sunxi_gpio_input(u32 pin)
53 u32 bank = GPIO_BANK(pin);
54 u32 num = GPIO_NUM(pin);
55 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
57 dat = readl(&pio->dat);
63 int gpio_request(unsigned gpio, const char *label)
68 int gpio_free(unsigned gpio)
73 int gpio_direction_input(unsigned gpio)
75 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
80 int gpio_direction_output(unsigned gpio, int value)
82 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
84 return sunxi_gpio_output(gpio, value);
87 int gpio_get_value(unsigned gpio)
89 return sunxi_gpio_input(gpio);
92 int gpio_set_value(unsigned gpio, int value)
94 return sunxi_gpio_output(gpio, value);
97 int sunxi_name_to_gpio(const char *name)
100 int groupsize = 9 * 32;
104 if (*name == 'P' || *name == 'p')
107 group = *name - (*name > 'a' ? 'a' : 'A');
112 pin = simple_strtol(name, &eptr, 10);
115 if (pin < 0 || pin > groupsize || group >= 9)
117 return group * 32 + pin;
121 int sunxi_name_to_gpio_bank(const char *name)
125 if (*name == 'P' || *name == 'p')
128 group = *name - (*name > 'a' ? 'a' : 'A');
135 #if CONFIG_IS_ENABLED(DM_GPIO)
136 /* TODO(sjg@chromium.org): Remove this function and use device tree */
137 int sunxi_name_to_gpio(const char *name)
141 #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
144 if (strcasecmp(name, "AXP0-VBUS-DETECT") == 0) {
145 sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
146 SUNXI_GPIO_AXP0_VBUS_DETECT);
148 } else if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) {
149 sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
150 SUNXI_GPIO_AXP0_VBUS_ENABLE);
154 ret = gpio_lookup_name(name, NULL, NULL, &gpio);
156 return ret ? ret : gpio;
159 static int sunxi_gpio_direction_input(struct udevice *dev, unsigned offset)
161 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
163 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT);
168 static int sunxi_gpio_direction_output(struct udevice *dev, unsigned offset,
171 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
172 u32 num = GPIO_NUM(offset);
174 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
175 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
180 static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
182 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
183 u32 num = GPIO_NUM(offset);
186 dat = readl(&plat->regs->dat);
192 static int sunxi_gpio_set_value(struct udevice *dev, unsigned offset,
195 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
196 u32 num = GPIO_NUM(offset);
198 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
202 static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
204 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
207 func = sunxi_gpio_get_cfgbank(plat->regs, offset);
208 if (func == SUNXI_GPIO_OUTPUT)
210 else if (func == SUNXI_GPIO_INPUT)
216 static int sunxi_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
217 struct ofnode_phandle_args *args)
221 ret = device_get_child(dev, args->args[0], &desc->dev);
224 desc->offset = args->args[1];
225 desc->flags = args->args[2] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
230 static const struct dm_gpio_ops gpio_sunxi_ops = {
231 .direction_input = sunxi_gpio_direction_input,
232 .direction_output = sunxi_gpio_direction_output,
233 .get_value = sunxi_gpio_get_value,
234 .set_value = sunxi_gpio_set_value,
235 .get_function = sunxi_gpio_get_function,
236 .xlate = sunxi_gpio_xlate,
240 * Returns the name of a GPIO bank
242 * GPIO banks are named A, B, C, ...
244 * @bank: Bank number (0, 1..n-1)
245 * @return allocated string containing the name
247 static char *gpio_bank_name(int bank)
254 name[1] = 'A' + bank;
261 static int gpio_sunxi_probe(struct udevice *dev)
263 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
264 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
266 /* Tell the uclass how many GPIOs we have */
268 uc_priv->gpio_count = plat->gpio_count;
269 uc_priv->bank_name = plat->bank_name;
275 struct sunxi_gpio_soc_data {
281 * We have a top-level GPIO device with no actual GPIOs. It has a child
282 * device for each Sunxi bank.
284 static int gpio_sunxi_bind(struct udevice *parent)
286 struct sunxi_gpio_soc_data *soc_data =
287 (struct sunxi_gpio_soc_data *)dev_get_driver_data(parent);
288 struct sunxi_gpio_plat *plat = dev_get_plat(parent);
289 struct sunxi_gpio_reg *ctlr;
292 /* If this is a child device, there is nothing to do here */
296 ctlr = dev_read_addr_ptr(parent);
297 for (bank = 0; bank < soc_data->no_banks; bank++) {
298 struct sunxi_gpio_plat *plat;
301 plat = calloc(1, sizeof(*plat));
304 plat->regs = &ctlr->gpio_bank[bank];
305 plat->bank_name = gpio_bank_name(soc_data->start + bank);
306 plat->gpio_count = SUNXI_GPIOS_PER_BANK;
308 ret = device_bind(parent, parent->driver, plat->bank_name, plat,
309 dev_ofnode(parent), &dev);
317 static const struct sunxi_gpio_soc_data soc_data_a_all = {
319 .no_banks = SUNXI_GPIO_BANKS,
322 static const struct sunxi_gpio_soc_data soc_data_l_1 = {
327 static const struct sunxi_gpio_soc_data soc_data_l_2 = {
332 static const struct sunxi_gpio_soc_data soc_data_l_3 = {
337 #define ID(_compat_, _soc_data_) \
338 { .compatible = _compat_, .data = (ulong)&soc_data_##_soc_data_ }
340 static const struct udevice_id sunxi_gpio_ids[] = {
341 ID("allwinner,sun4i-a10-pinctrl", a_all),
342 ID("allwinner,sun5i-a10s-pinctrl", a_all),
343 ID("allwinner,sun5i-a13-pinctrl", a_all),
344 ID("allwinner,sun50i-h5-pinctrl", a_all),
345 ID("allwinner,sun6i-a31-pinctrl", a_all),
346 ID("allwinner,sun6i-a31s-pinctrl", a_all),
347 ID("allwinner,sun7i-a20-pinctrl", a_all),
348 ID("allwinner,sun8i-a23-pinctrl", a_all),
349 ID("allwinner,sun8i-a33-pinctrl", a_all),
350 ID("allwinner,sun8i-a83t-pinctrl", a_all),
351 ID("allwinner,sun8i-h3-pinctrl", a_all),
352 ID("allwinner,sun8i-r40-pinctrl", a_all),
353 ID("allwinner,sun8i-v3-pinctrl", a_all),
354 ID("allwinner,sun8i-v3s-pinctrl", a_all),
355 ID("allwinner,sun9i-a80-pinctrl", a_all),
356 ID("allwinner,sun50i-a64-pinctrl", a_all),
357 ID("allwinner,sun50i-h6-pinctrl", a_all),
358 ID("allwinner,sun50i-h616-pinctrl", a_all),
359 ID("allwinner,sun6i-a31-r-pinctrl", l_2),
360 ID("allwinner,sun8i-a23-r-pinctrl", l_1),
361 ID("allwinner,sun8i-a83t-r-pinctrl", l_1),
362 ID("allwinner,sun8i-h3-r-pinctrl", l_1),
363 ID("allwinner,sun9i-a80-r-pinctrl", l_3),
364 ID("allwinner,sun50i-a64-r-pinctrl", l_1),
365 ID("allwinner,sun50i-h6-r-pinctrl", l_2),
366 ID("allwinner,sun50i-h616-r-pinctrl", l_1),
370 U_BOOT_DRIVER(gpio_sunxi) = {
371 .name = "gpio_sunxi",
373 .ops = &gpio_sunxi_ops,
374 .of_match = sunxi_gpio_ids,
375 .bind = gpio_sunxi_bind,
376 .probe = gpio_sunxi_probe,