2 * Pinmuxed GPIO support for SuperH.
3 * Copy from linux kernel driver/sh/pfc.c
5 * Copyright (C) 2008 Magnus Damm
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
14 #include <asm/bitops.h>
18 static struct pinmux_info *gpioc;
20 #define pfc_phys_to_virt(p, a) ((void *)a)
22 static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
24 if (enum_id < r->begin)
33 static unsigned long gpio_read_raw_reg(void *mapped_reg,
34 unsigned long reg_width)
39 return readb(mapped_reg);
41 return readw(mapped_reg);
43 return readl(mapped_reg);
50 static void gpio_write_raw_reg(void *mapped_reg,
51 unsigned long reg_width,
56 writeb(data, mapped_reg);
59 writew(data, mapped_reg);
62 writel(data, mapped_reg);
69 static int gpio_read_bit(struct pinmux_data_reg *dr,
75 pos = dr->reg_width - (in_pos + 1);
77 debug("read_bit: addr = %lx, pos = %ld, r_width = %ld\n",
78 dr->reg + offset, pos, dr->reg_width);
80 return (gpio_read_raw_reg(dr->mapped_reg + offset,
81 dr->reg_width) >> pos) & 1;
84 static void gpio_write_bit(struct pinmux_data_reg *dr,
85 unsigned long in_pos, unsigned long value)
89 pos = dr->reg_width - (in_pos + 1);
91 debug("write_bit addr = %lx, value = %d, pos = %ld, "
93 dr->reg, !!value, pos, dr->reg_width);
96 __set_bit(pos, &dr->reg_shadow);
98 __clear_bit(pos, &dr->reg_shadow);
100 gpio_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
103 static void config_reg_helper(struct pinmux_info *gpioc,
104 struct pinmux_cfg_reg *crp,
105 unsigned long in_pos,
107 void __iomem **mapped_regp,
111 unsigned long *maskp,
116 *mapped_regp = pfc_phys_to_virt(gpioc, crp->reg);
118 if (crp->field_width) {
119 *maskp = (1 << crp->field_width) - 1;
120 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width);
122 *maskp = (1 << crp->var_field_width[in_pos]) - 1;
123 *posp = crp->reg_width;
124 for (k = 0; k <= in_pos; k++)
125 *posp -= crp->var_field_width[k];
129 static int read_config_reg(struct pinmux_info *gpioc,
130 struct pinmux_cfg_reg *crp,
135 unsigned long mask, pos;
137 config_reg_helper(gpioc, crp, field, &mapped_reg, &mask, &pos);
139 debug("read_reg: addr = %lx, field = %ld, "
140 "r_width = %ld, f_width = %ld\n",
141 crp->reg, field, crp->reg_width, crp->field_width);
143 return (gpio_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask;
146 static void write_config_reg(struct pinmux_info *gpioc,
147 struct pinmux_cfg_reg *crp,
148 unsigned long field, unsigned long value)
151 unsigned long mask, pos, data;
153 config_reg_helper(gpioc, crp, field, &mapped_reg, &mask, &pos);
155 debug("write_reg addr = %lx, value = %ld, field = %ld, "
156 "r_width = %ld, f_width = %ld\n",
157 crp->reg, value, field, crp->reg_width, crp->field_width);
159 mask = ~(mask << pos);
160 value = value << pos;
162 data = gpio_read_raw_reg(mapped_reg, crp->reg_width);
166 if (gpioc->unlock_reg)
167 gpio_write_raw_reg(pfc_phys_to_virt(gpioc, gpioc->unlock_reg),
170 gpio_write_raw_reg(mapped_reg, crp->reg_width, data);
173 static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
175 struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
176 struct pinmux_data_reg *data_reg;
179 if (!enum_in_range(gpiop->enum_id, &gpioc->data))
184 data_reg = gpioc->data_regs + k;
186 if (!data_reg->reg_width)
189 data_reg->mapped_reg = pfc_phys_to_virt(gpioc, data_reg->reg);
191 for (n = 0; n < data_reg->reg_width; n++) {
192 if (data_reg->enum_ids[n] == gpiop->enum_id) {
193 gpiop->flags &= ~PINMUX_FLAG_DREG;
194 gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
195 gpiop->flags &= ~PINMUX_FLAG_DBIT;
196 gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
208 static void setup_data_regs(struct pinmux_info *gpioc)
210 struct pinmux_data_reg *drp;
213 for (k = gpioc->first_gpio; k <= gpioc->last_gpio; k++)
214 setup_data_reg(gpioc, k);
218 drp = gpioc->data_regs + k;
223 drp->reg_shadow = gpio_read_raw_reg(drp->mapped_reg,
229 static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
230 struct pinmux_data_reg **drp, int *bitp)
232 struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
235 if (!enum_in_range(gpiop->enum_id, &gpioc->data))
238 k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
239 n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
240 *drp = gpioc->data_regs + k;
245 static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
246 struct pinmux_cfg_reg **crp,
247 int *fieldp, int *valuep,
248 unsigned long **cntp)
250 struct pinmux_cfg_reg *config_reg;
251 unsigned long r_width, f_width, curr_width, ncomb;
252 int k, m, n, pos, bit_pos;
256 config_reg = gpioc->cfg_regs + k;
258 r_width = config_reg->reg_width;
259 f_width = config_reg->field_width;
266 for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) {
268 curr_width = f_width;
270 curr_width = config_reg->var_field_width[m];
272 ncomb = 1 << curr_width;
273 for (n = 0; n < ncomb; n++) {
274 if (config_reg->enum_ids[pos + n] == enum_id) {
278 *cntp = &config_reg->cnt[m];
291 static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
292 int pos, pinmux_enum_t *enum_idp)
294 pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
295 pinmux_enum_t *data = gpioc->gpio_data;
298 if (!enum_in_range(enum_id, &gpioc->data)) {
299 if (!enum_in_range(enum_id, &gpioc->mark)) {
300 debug("non data/mark enum_id for gpio %d\n", gpio);
306 *enum_idp = data[pos + 1];
310 for (k = 0; k < gpioc->gpio_data_size; k++) {
311 if (data[k] == enum_id) {
312 *enum_idp = data[k + 1];
317 debug("cannot locate data/mark enum_id for gpio %d\n", gpio);
321 enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
323 static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
324 int pinmux_type, int cfg_mode)
326 struct pinmux_cfg_reg *cr = NULL;
327 pinmux_enum_t enum_id;
328 struct pinmux_range *range;
329 int in_range, pos, field, value;
332 switch (pinmux_type) {
334 case PINMUX_TYPE_FUNCTION:
338 case PINMUX_TYPE_OUTPUT:
339 range = &gpioc->output;
342 case PINMUX_TYPE_INPUT:
343 range = &gpioc->input;
346 case PINMUX_TYPE_INPUT_PULLUP:
347 range = &gpioc->input_pu;
350 case PINMUX_TYPE_INPUT_PULLDOWN:
351 range = &gpioc->input_pd;
363 pos = get_gpio_enum_id(gpioc, gpio, pos, &enum_id);
370 /* first check if this is a function enum */
371 in_range = enum_in_range(enum_id, &gpioc->function);
373 /* not a function enum */
376 * other range exists, so this pin is
377 * a regular GPIO pin that now is being
378 * bound to a specific direction.
380 * for this case we only allow function enums
381 * and the enums that match the other range.
383 in_range = enum_in_range(enum_id, range);
386 * special case pass through for fixed
387 * input-only or output-only pins without
388 * function enum register association.
390 if (in_range && enum_id == range->force)
394 * no other range exists, so this pin
395 * must then be of the function type.
397 * allow function type pins to select
398 * any combination of function/in/out
399 * in their MARK lists.
408 if (get_config_reg(gpioc, enum_id, &cr,
409 &field, &value, &cntp) != 0)
413 case GPIO_CFG_DRYRUN:
415 (read_config_reg(gpioc, cr, field) != value))
420 write_config_reg(gpioc, cr, field, value);
436 static DEFINE_SPINLOCK(gpio_lock);
437 static struct pinmux_info *chip_to_pinmux(struct gpio_chip *chip)
439 return container_of(chip, struct pinmux_info, chip);
443 static int sh_gpio_request(unsigned offset)
445 struct pinmux_data_reg *dummy;
446 int i, ret, pinmux_type;
453 if ((gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
456 /* setup pin function here if no data is associated with pin */
458 if (get_data_reg(gpioc, offset, &dummy, &i) != 0)
459 pinmux_type = PINMUX_TYPE_FUNCTION;
461 pinmux_type = PINMUX_TYPE_GPIO;
463 if (pinmux_type == PINMUX_TYPE_FUNCTION) {
464 if (pinmux_config_gpio(gpioc, offset,
466 GPIO_CFG_DRYRUN) != 0)
469 if (pinmux_config_gpio(gpioc, offset,
475 gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
476 gpioc->gpios[offset].flags |= pinmux_type;
483 static void sh_gpio_free(unsigned offset)
490 pinmux_type = gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE;
491 pinmux_config_gpio(gpioc, offset, pinmux_type, GPIO_CFG_FREE);
492 gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
493 gpioc->gpios[offset].flags |= PINMUX_TYPE_NONE;
496 static int pinmux_direction(struct pinmux_info *gpioc,
497 unsigned gpio, int new_pinmux_type)
505 pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
507 switch (pinmux_type) {
508 case PINMUX_TYPE_GPIO:
510 case PINMUX_TYPE_OUTPUT:
511 case PINMUX_TYPE_INPUT:
512 case PINMUX_TYPE_INPUT_PULLUP:
513 case PINMUX_TYPE_INPUT_PULLDOWN:
514 pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
520 if (pinmux_config_gpio(gpioc, gpio,
522 GPIO_CFG_DRYRUN) != 0)
525 if (pinmux_config_gpio(gpioc, gpio,
530 gpioc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
531 gpioc->gpios[gpio].flags |= new_pinmux_type;
538 static int sh_gpio_direction_input(unsigned offset)
540 return pinmux_direction(gpioc, offset, PINMUX_TYPE_INPUT);
543 static void sh_gpio_set_value(struct pinmux_info *gpioc,
544 unsigned gpio, int value)
546 struct pinmux_data_reg *dr = NULL;
549 if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
552 gpio_write_bit(dr, bit, value);
555 static int sh_gpio_direction_output(unsigned offset, int value)
557 sh_gpio_set_value(gpioc, offset, value);
558 return pinmux_direction(gpioc, offset, PINMUX_TYPE_OUTPUT);
561 static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)
563 struct pinmux_data_reg *dr = NULL;
564 int bit = 0, offset = 0;
566 if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
568 #if defined(CONFIG_RCAR_GEN3)
569 if ((gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_INPUT)
573 return gpio_read_bit(dr, offset, bit);
576 static int sh_gpio_get(unsigned offset)
578 return sh_gpio_get_value(gpioc, offset);
581 static void sh_gpio_set(unsigned offset, int value)
583 sh_gpio_set_value(gpioc, offset, value);
586 int register_pinmux(struct pinmux_info *pip)
590 debug("%s deregistering\n", pip->name);
591 setup_data_regs(gpioc);
596 int unregister_pinmux(struct pinmux_info *pip)
598 debug("%s deregistering\n", pip->name);
606 int gpio_request(unsigned gpio, const char *label)
608 sh_gpio_request(gpio);
612 int gpio_free(unsigned gpio)
618 int gpio_direction_input(unsigned gpio)
620 return sh_gpio_direction_input(gpio);
623 int gpio_direction_output(unsigned gpio, int value)
625 return sh_gpio_direction_output(gpio, value);
628 void gpio_set_value(unsigned gpio, int value)
630 sh_gpio_set(gpio, value);
633 int gpio_get_value(unsigned gpio)
635 return sh_gpio_get(gpio);