2 * Pinmuxed GPIO support for SuperH.
3 * Copy from linux kernel driver/sh/pfc.c
5 * Copyright (C) 2008 Magnus Damm
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
13 #include <asm/bitops.h>
17 static struct pinmux_info *gpioc;
19 #define pfc_phys_to_virt(p, a) ((void *)a)
21 static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
23 if (enum_id < r->begin)
32 static unsigned long gpio_read_raw_reg(void *mapped_reg,
33 unsigned long reg_width)
38 return readb(mapped_reg);
40 return readw(mapped_reg);
42 return readl(mapped_reg);
49 static void gpio_write_raw_reg(void *mapped_reg,
50 unsigned long reg_width,
55 writeb(data, mapped_reg);
58 writew(data, mapped_reg);
61 writel(data, mapped_reg);
68 static int gpio_read_bit(struct pinmux_data_reg *dr,
74 pos = dr->reg_width - (in_pos + 1);
76 debug("read_bit: addr = %lx, pos = %ld, r_width = %ld\n",
77 dr->reg + offset, pos, dr->reg_width);
79 return (gpio_read_raw_reg(dr->mapped_reg + offset,
80 dr->reg_width) >> pos) & 1;
83 static void gpio_write_bit(struct pinmux_data_reg *dr,
84 unsigned long in_pos, unsigned long value)
88 pos = dr->reg_width - (in_pos + 1);
90 debug("write_bit addr = %lx, value = %d, pos = %ld, "
92 dr->reg, !!value, pos, dr->reg_width);
95 __set_bit(pos, &dr->reg_shadow);
97 __clear_bit(pos, &dr->reg_shadow);
99 gpio_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
102 static void config_reg_helper(struct pinmux_info *gpioc,
103 struct pinmux_cfg_reg *crp,
104 unsigned long in_pos,
106 void __iomem **mapped_regp,
110 unsigned long *maskp,
115 *mapped_regp = pfc_phys_to_virt(gpioc, crp->reg);
117 if (crp->field_width) {
118 *maskp = (1 << crp->field_width) - 1;
119 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width);
121 *maskp = (1 << crp->var_field_width[in_pos]) - 1;
122 *posp = crp->reg_width;
123 for (k = 0; k <= in_pos; k++)
124 *posp -= crp->var_field_width[k];
128 static int read_config_reg(struct pinmux_info *gpioc,
129 struct pinmux_cfg_reg *crp,
134 unsigned long mask, pos;
136 config_reg_helper(gpioc, crp, field, &mapped_reg, &mask, &pos);
138 debug("read_reg: addr = %lx, field = %ld, "
139 "r_width = %ld, f_width = %ld\n",
140 crp->reg, field, crp->reg_width, crp->field_width);
142 return (gpio_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask;
145 static void write_config_reg(struct pinmux_info *gpioc,
146 struct pinmux_cfg_reg *crp,
147 unsigned long field, unsigned long value)
150 unsigned long mask, pos, data;
152 config_reg_helper(gpioc, crp, field, &mapped_reg, &mask, &pos);
154 debug("write_reg addr = %lx, value = %ld, field = %ld, "
155 "r_width = %ld, f_width = %ld\n",
156 crp->reg, value, field, crp->reg_width, crp->field_width);
158 mask = ~(mask << pos);
159 value = value << pos;
161 data = gpio_read_raw_reg(mapped_reg, crp->reg_width);
165 if (gpioc->unlock_reg)
166 gpio_write_raw_reg(pfc_phys_to_virt(gpioc, gpioc->unlock_reg),
169 gpio_write_raw_reg(mapped_reg, crp->reg_width, data);
172 static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
174 struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
175 struct pinmux_data_reg *data_reg;
178 if (!enum_in_range(gpiop->enum_id, &gpioc->data))
183 data_reg = gpioc->data_regs + k;
185 if (!data_reg->reg_width)
188 data_reg->mapped_reg = pfc_phys_to_virt(gpioc, data_reg->reg);
190 for (n = 0; n < data_reg->reg_width; n++) {
191 if (data_reg->enum_ids[n] == gpiop->enum_id) {
192 gpiop->flags &= ~PINMUX_FLAG_DREG;
193 gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
194 gpiop->flags &= ~PINMUX_FLAG_DBIT;
195 gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
207 static void setup_data_regs(struct pinmux_info *gpioc)
209 struct pinmux_data_reg *drp;
212 for (k = gpioc->first_gpio; k <= gpioc->last_gpio; k++)
213 setup_data_reg(gpioc, k);
217 drp = gpioc->data_regs + k;
222 drp->reg_shadow = gpio_read_raw_reg(drp->mapped_reg,
228 static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
229 struct pinmux_data_reg **drp, int *bitp)
231 struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
234 if (!enum_in_range(gpiop->enum_id, &gpioc->data))
237 k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
238 n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
239 *drp = gpioc->data_regs + k;
244 static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
245 struct pinmux_cfg_reg **crp,
246 int *fieldp, int *valuep,
247 unsigned long **cntp)
249 struct pinmux_cfg_reg *config_reg;
250 unsigned long r_width, f_width, curr_width, ncomb;
251 int k, m, n, pos, bit_pos;
255 config_reg = gpioc->cfg_regs + k;
257 r_width = config_reg->reg_width;
258 f_width = config_reg->field_width;
265 for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) {
267 curr_width = f_width;
269 curr_width = config_reg->var_field_width[m];
271 ncomb = 1 << curr_width;
272 for (n = 0; n < ncomb; n++) {
273 if (config_reg->enum_ids[pos + n] == enum_id) {
277 *cntp = &config_reg->cnt[m];
290 static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
291 int pos, pinmux_enum_t *enum_idp)
293 pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
294 pinmux_enum_t *data = gpioc->gpio_data;
297 if (!enum_in_range(enum_id, &gpioc->data)) {
298 if (!enum_in_range(enum_id, &gpioc->mark)) {
299 debug("non data/mark enum_id for gpio %d\n", gpio);
305 *enum_idp = data[pos + 1];
309 for (k = 0; k < gpioc->gpio_data_size; k++) {
310 if (data[k] == enum_id) {
311 *enum_idp = data[k + 1];
316 debug("cannot locate data/mark enum_id for gpio %d\n", gpio);
320 enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
322 static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
323 int pinmux_type, int cfg_mode)
325 struct pinmux_cfg_reg *cr = NULL;
326 pinmux_enum_t enum_id;
327 struct pinmux_range *range;
328 int in_range, pos, field, value;
331 switch (pinmux_type) {
333 case PINMUX_TYPE_FUNCTION:
337 case PINMUX_TYPE_OUTPUT:
338 range = &gpioc->output;
341 case PINMUX_TYPE_INPUT:
342 range = &gpioc->input;
345 case PINMUX_TYPE_INPUT_PULLUP:
346 range = &gpioc->input_pu;
349 case PINMUX_TYPE_INPUT_PULLDOWN:
350 range = &gpioc->input_pd;
362 pos = get_gpio_enum_id(gpioc, gpio, pos, &enum_id);
369 /* first check if this is a function enum */
370 in_range = enum_in_range(enum_id, &gpioc->function);
372 /* not a function enum */
375 * other range exists, so this pin is
376 * a regular GPIO pin that now is being
377 * bound to a specific direction.
379 * for this case we only allow function enums
380 * and the enums that match the other range.
382 in_range = enum_in_range(enum_id, range);
385 * special case pass through for fixed
386 * input-only or output-only pins without
387 * function enum register association.
389 if (in_range && enum_id == range->force)
393 * no other range exists, so this pin
394 * must then be of the function type.
396 * allow function type pins to select
397 * any combination of function/in/out
398 * in their MARK lists.
407 if (get_config_reg(gpioc, enum_id, &cr,
408 &field, &value, &cntp) != 0)
412 case GPIO_CFG_DRYRUN:
414 (read_config_reg(gpioc, cr, field) != value))
419 write_config_reg(gpioc, cr, field, value);
435 static DEFINE_SPINLOCK(gpio_lock);
436 static struct pinmux_info *chip_to_pinmux(struct gpio_chip *chip)
438 return container_of(chip, struct pinmux_info, chip);
442 static int sh_gpio_request(unsigned offset)
444 struct pinmux_data_reg *dummy;
445 int i, ret, pinmux_type;
452 if ((gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
455 /* setup pin function here if no data is associated with pin */
457 if (get_data_reg(gpioc, offset, &dummy, &i) != 0)
458 pinmux_type = PINMUX_TYPE_FUNCTION;
460 pinmux_type = PINMUX_TYPE_GPIO;
462 if (pinmux_type == PINMUX_TYPE_FUNCTION) {
463 if (pinmux_config_gpio(gpioc, offset,
465 GPIO_CFG_DRYRUN) != 0)
468 if (pinmux_config_gpio(gpioc, offset,
474 gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
475 gpioc->gpios[offset].flags |= pinmux_type;
482 static void sh_gpio_free(unsigned offset)
489 pinmux_type = gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE;
490 pinmux_config_gpio(gpioc, offset, pinmux_type, GPIO_CFG_FREE);
491 gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
492 gpioc->gpios[offset].flags |= PINMUX_TYPE_NONE;
495 static int pinmux_direction(struct pinmux_info *gpioc,
496 unsigned gpio, int new_pinmux_type)
504 pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
506 switch (pinmux_type) {
507 case PINMUX_TYPE_GPIO:
509 case PINMUX_TYPE_OUTPUT:
510 case PINMUX_TYPE_INPUT:
511 case PINMUX_TYPE_INPUT_PULLUP:
512 case PINMUX_TYPE_INPUT_PULLDOWN:
513 pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
519 if (pinmux_config_gpio(gpioc, gpio,
521 GPIO_CFG_DRYRUN) != 0)
524 if (pinmux_config_gpio(gpioc, gpio,
529 gpioc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
530 gpioc->gpios[gpio].flags |= new_pinmux_type;
537 static int sh_gpio_direction_input(unsigned offset)
539 return pinmux_direction(gpioc, offset, PINMUX_TYPE_INPUT);
542 static void sh_gpio_set_value(struct pinmux_info *gpioc,
543 unsigned gpio, int value)
545 struct pinmux_data_reg *dr = NULL;
548 if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
551 gpio_write_bit(dr, bit, value);
554 static int sh_gpio_direction_output(unsigned offset, int value)
556 sh_gpio_set_value(gpioc, offset, value);
557 return pinmux_direction(gpioc, offset, PINMUX_TYPE_OUTPUT);
560 static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)
562 struct pinmux_data_reg *dr = NULL;
563 int bit = 0, offset = 0;
565 if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
567 #if defined(CONFIG_RCAR_GEN3)
568 if ((gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_INPUT)
572 return gpio_read_bit(dr, offset, bit);
575 static int sh_gpio_get(unsigned offset)
577 return sh_gpio_get_value(gpioc, offset);
580 static void sh_gpio_set(unsigned offset, int value)
582 sh_gpio_set_value(gpioc, offset, value);
585 int register_pinmux(struct pinmux_info *pip)
589 debug("%s deregistering\n", pip->name);
590 setup_data_regs(gpioc);
595 int unregister_pinmux(struct pinmux_info *pip)
597 debug("%s deregistering\n", pip->name);
605 int gpio_request(unsigned gpio, const char *label)
607 sh_gpio_request(gpio);
611 int gpio_free(unsigned gpio)
617 int gpio_direction_input(unsigned gpio)
619 return sh_gpio_direction_input(gpio);
622 int gpio_direction_output(unsigned gpio, int value)
624 return sh_gpio_direction_output(gpio, value);
627 void gpio_set_value(unsigned gpio, int value)
629 sh_gpio_set(gpio, value);
632 int gpio_get_value(unsigned gpio)
634 return sh_gpio_get(gpio);