1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
5 * Author: Weijie Gao <weijie.gao@mediatek.com>
7 * GPIO controller driver for MediaTek MT7620 SoC
12 #include <dm/device_compat.h>
13 #include <linux/bitops.h>
26 struct mt7620_gpio_priv {
28 u32 regs[__GPIO_REG_MAX];
32 static int mt7620_gpio_get_value(struct udevice *dev, unsigned int offset)
34 struct mt7620_gpio_priv *priv = dev_get_priv(dev);
36 return !!(readl(priv->base + priv->regs[GPIO_REG_DATA]) & BIT(offset));
39 static int mt7620_gpio_set_value(struct udevice *dev, unsigned int offset,
42 struct mt7620_gpio_priv *priv = dev_get_priv(dev);
45 reg = value ? priv->regs[GPIO_REG_SET] : priv->regs[GPIO_REG_CLR];
47 writel(BIT(offset), priv->base + reg);
52 static int mt7620_gpio_direction_input(struct udevice *dev, unsigned int offset)
54 struct mt7620_gpio_priv *priv = dev_get_priv(dev);
56 clrbits_32(priv->base + priv->regs[GPIO_REG_DIR], BIT(offset));
61 static int mt7620_gpio_direction_output(struct udevice *dev,
62 unsigned int offset, int value)
64 struct mt7620_gpio_priv *priv = dev_get_priv(dev);
67 mt7620_gpio_set_value(dev, offset, value);
69 setbits_32(priv->base + priv->regs[GPIO_REG_DIR], BIT(offset));
74 static int mt7620_gpio_get_function(struct udevice *dev, unsigned int offset)
76 struct mt7620_gpio_priv *priv = dev_get_priv(dev);
78 return (readl(priv->base + priv->regs[GPIO_REG_DIR]) & BIT(offset)) ?
79 GPIOF_OUTPUT : GPIOF_INPUT;
82 static const struct dm_gpio_ops mt7620_gpio_ops = {
83 .direction_input = mt7620_gpio_direction_input,
84 .direction_output = mt7620_gpio_direction_output,
85 .get_value = mt7620_gpio_get_value,
86 .set_value = mt7620_gpio_set_value,
87 .get_function = mt7620_gpio_get_function,
90 static int mt7620_gpio_probe(struct udevice *dev)
92 struct mt7620_gpio_priv *priv = dev_get_priv(dev);
93 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
96 name = dev_read_string(dev, "mediatek,bank-name");
100 uc_priv->gpio_count = priv->count;
101 uc_priv->bank_name = name;
106 static int mt7620_gpio_of_to_plat(struct udevice *dev)
108 struct mt7620_gpio_priv *priv = dev_get_priv(dev);
111 priv->base = dev_remap_addr_index(dev, 0);
113 dev_err(dev, "mt7620_gpio: unable to map registers\n");
117 ret = dev_read_u32(dev, "mediatek,gpio-num", &priv->count);
119 dev_err(dev, "mt7620_gpio: failed to get GPIO count\n");
123 ret = dev_read_u32_array(dev, "mediatek,register-map", priv->regs,
126 dev_err(dev, "mt7620_gpio: unable to get register map\n");
133 static const struct udevice_id mt7620_gpio_ids[] = {
134 { .compatible = "mediatek,mt7620-gpio" },
138 U_BOOT_DRIVER(mt7620_gpio) = {
139 .name = "mt7620_gpio",
141 .ops = &mt7620_gpio_ops,
142 .of_match = mt7620_gpio_ids,
143 .probe = mt7620_gpio_probe,
144 .of_to_plat = mt7620_gpio_of_to_plat,
145 .priv_auto = sizeof(struct mt7620_gpio_priv),