drivers/gpio/gpio-pca953x.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  PCA953x 4/8/16/24/40 bit I/O ports
   4  *
   5  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
   6  *  Copyright (C) 2007 Marvell International Ltd.
   7  *
   8  *  Derived from drivers/i2c/chips/pca9539.c
   9  */
  10
  11 #include <linux/acpi.h>
  12 #include <linux/bitmap.h>
  13 #include <linux/gpio/driver.h>
  14 #include <linux/gpio/consumer.h>
  15 #include <linux/i2c.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/module.h>
  19 #include <linux/of_platform.h>
  20 #include <linux/platform_data/pca953x.h>
  21 #include <linux/regmap.h>
  22 #include <linux/regulator/consumer.h>
  23 #include <linux/slab.h>
  24
  25 #include <asm/unaligned.h>
  26
  27 #define PCA953X_INPUT           0x00
  28 #define PCA953X_OUTPUT          0x01
  29 #define PCA953X_INVERT          0x02
  30 #define PCA953X_DIRECTION       0x03
  31
  32 #define REG_ADDR_MASK           GENMASK(5, 0)
  33 #define REG_ADDR_EXT            BIT(6)
  34 #define REG_ADDR_AI             BIT(7)
  35
  36 #define PCA957X_IN              0x00
  37 #define PCA957X_INVRT           0x01
  38 #define PCA957X_BKEN            0x02
  39 #define PCA957X_PUPD            0x03
  40 #define PCA957X_CFG             0x04
  41 #define PCA957X_OUT             0x05
  42 #define PCA957X_MSK             0x06
  43 #define PCA957X_INTS            0x07
  44
  45 #define PCAL953X_OUT_STRENGTH   0x20
  46 #define PCAL953X_IN_LATCH       0x22
  47 #define PCAL953X_PULL_EN        0x23
  48 #define PCAL953X_PULL_SEL       0x24
  49 #define PCAL953X_INT_MASK       0x25
  50 #define PCAL953X_INT_STAT       0x26
  51 #define PCAL953X_OUT_CONF       0x27
  52
  53 #define PCAL6524_INT_EDGE       0x28
  54 #define PCAL6524_INT_CLR        0x2a
  55 #define PCAL6524_IN_STATUS      0x2b
  56 #define PCAL6524_OUT_INDCONF    0x2c
  57 #define PCAL6524_DEBOUNCE       0x2d
  58
  59 #define PCA_GPIO_MASK           GENMASK(7, 0)
  60
  61 #define PCAL_GPIO_MASK          GENMASK(4, 0)
  62 #define PCAL_PINCTRL_MASK       GENMASK(6, 5)
  63
  64 #define PCA_INT                 BIT(8)
  65 #define PCA_PCAL                BIT(9)
  66 #define PCA_LATCH_INT           (PCA_PCAL | PCA_INT)
  67 #define PCA953X_TYPE            BIT(12)
  68 #define PCA957X_TYPE            BIT(13)
  69 #define PCA_TYPE_MASK           GENMASK(15, 12)
  70
  71 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
  72
  73 static const struct i2c_device_id pca953x_id[] = {
  74         { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
  75         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
  76         { "pca9506", 40 | PCA953X_TYPE | PCA_INT, },
  77         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
  78         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
  79         { "pca9536", 4  | PCA953X_TYPE, },
  80         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
  81         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
  82         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
  83         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
  84         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
  85         { "pca9556", 8  | PCA953X_TYPE, },
  86         { "pca9557", 8  | PCA953X_TYPE, },
  87         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
  88         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
  89         { "pca9698", 40 | PCA953X_TYPE, },
  90
  91         { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  92         { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
  93         { "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  94         { "pcal9554b", 8  | PCA953X_TYPE | PCA_LATCH_INT, },
  95         { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  96
  97         { "max7310", 8  | PCA953X_TYPE, },
  98         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
  99         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
 100         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
 101         { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
 102         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
 103         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
 104         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
 105         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
 106         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
 107         { "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
 108         { "xra1202", 8  | PCA953X_TYPE },
 109         { }
 110 };
 111 MODULE_DEVICE_TABLE(i2c, pca953x_id);
 112
 113 #ifdef CONFIG_GPIO_PCA953X_IRQ
 114
 115 #include <linux/dmi.h>
 116
 117 static const struct acpi_gpio_params pca953x_irq_gpios = { 0, 0, true };
 118
 119 static const struct acpi_gpio_mapping pca953x_acpi_irq_gpios[] = {
 120         { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
 121         { }
 122 };
 123
 124 static int pca953x_acpi_get_irq(struct device *dev)
 125 {
 126         int ret;
 127
 128         ret = devm_acpi_dev_add_driver_gpios(dev, pca953x_acpi_irq_gpios);
 129         if (ret)
 130                 dev_warn(dev, "can't add GPIO ACPI mapping\n");
 131
 132         ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0);
 133         if (ret < 0)
 134                 return ret;
 135
 136         dev_info(dev, "ACPI interrupt quirk (IRQ %d)\n", ret);
 137         return ret;
 138 }
 139
 140 static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = {
 141         {
 142                 /*
 143                  * On Intel Galileo Gen 2 board the IRQ pin of one of
 144                  * the I²C GPIO expanders, which has GpioInt() resource,
 145                  * is provided as an absolute number instead of being
 146                  * relative. Since first controller (gpio-sch.c) and
 147                  * second (gpio-dwapb.c) are at the fixed bases, we may
 148                  * safely refer to the number in the global space to get
 149                  * an IRQ out of it.
 150                  */
 151                 .matches = {
 152                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
 153                 },
 154         },
 155         {}
 156 };
 157 #endif
 158
 159 static const struct acpi_device_id pca953x_acpi_ids[] = {
 160         { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
 161         { }
 162 };
 163 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
 164
 165 #define MAX_BANK 5
 166 #define BANK_SZ 8
 167 #define MAX_LINE        (MAX_BANK * BANK_SZ)
 168
 169 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
 170
 171 struct pca953x_reg_config {
 172         int direction;
 173         int output;
 174         int input;
 175         int invert;
 176 };
 177
 178 static const struct pca953x_reg_config pca953x_regs = {
 179         .direction = PCA953X_DIRECTION,
 180         .output = PCA953X_OUTPUT,
 181         .input = PCA953X_INPUT,
 182         .invert = PCA953X_INVERT,
 183 };
 184
 185 static const struct pca953x_reg_config pca957x_regs = {
 186         .direction = PCA957X_CFG,
 187         .output = PCA957X_OUT,
 188         .input = PCA957X_IN,
 189         .invert = PCA957X_INVRT,
 190 };
 191
 192 struct pca953x_chip {
 193         unsigned gpio_start;
 194         struct mutex i2c_lock;
 195         struct regmap *regmap;
 196
 197 #ifdef CONFIG_GPIO_PCA953X_IRQ
 198         struct mutex irq_lock;
 199         DECLARE_BITMAP(irq_mask, MAX_LINE);
 200         DECLARE_BITMAP(irq_stat, MAX_LINE);
 201         DECLARE_BITMAP(irq_trig_raise, MAX_LINE);
 202         DECLARE_BITMAP(irq_trig_fall, MAX_LINE);
 203         struct irq_chip irq_chip;
 204 #endif
 205         atomic_t wakeup_path;
 206
 207         struct i2c_client *client;
 208         struct gpio_chip gpio_chip;
 209         const char *const *names;
 210         unsigned long driver_data;
 211         struct regulator *regulator;
 212
 213         const struct pca953x_reg_config *regs;
 214 };
 215
 216 static int pca953x_bank_shift(struct pca953x_chip *chip)
 217 {
 218         return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 219 }
 220
 221 #define PCA953x_BANK_INPUT      BIT(0)
 222 #define PCA953x_BANK_OUTPUT     BIT(1)
 223 #define PCA953x_BANK_POLARITY   BIT(2)
 224 #define PCA953x_BANK_CONFIG     BIT(3)
 225
 226 #define PCA957x_BANK_INPUT      BIT(0)
 227 #define PCA957x_BANK_POLARITY   BIT(1)
 228 #define PCA957x_BANK_BUSHOLD    BIT(2)
 229 #define PCA957x_BANK_CONFIG     BIT(4)
 230 #define PCA957x_BANK_OUTPUT     BIT(5)
 231
 232 #define PCAL9xxx_BANK_IN_LATCH  BIT(8 + 2)
 233 #define PCAL9xxx_BANK_PULL_EN   BIT(8 + 3)
 234 #define PCAL9xxx_BANK_PULL_SEL  BIT(8 + 4)
 235 #define PCAL9xxx_BANK_IRQ_MASK  BIT(8 + 5)
 236 #define PCAL9xxx_BANK_IRQ_STAT  BIT(8 + 6)
 237
 238 /*
 239  * We care about the following registers:
 240  * - Standard set, below 0x40, each port can be replicated up to 8 times
 241  *   - PCA953x standard
 242  *     Input port                       0x00 + 0 * bank_size    R
 243  *     Output port                      0x00 + 1 * bank_size    RW
 244  *     Polarity Inversion port          0x00 + 2 * bank_size    RW
 245  *     Configuration port               0x00 + 3 * bank_size    RW
 246  *   - PCA957x with mixed up registers
 247  *     Input port                       0x00 + 0 * bank_size    R
 248  *     Polarity Inversion port          0x00 + 1 * bank_size    RW
 249  *     Bus hold port                    0x00 + 2 * bank_size    RW
 250  *     Configuration port               0x00 + 4 * bank_size    RW
 251  *     Output port                      0x00 + 5 * bank_size    RW
 252  *
 253  * - Extended set, above 0x40, often chip specific.
 254  *   - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
 255  *     Input latch register             0x40 + 2 * bank_size    RW
 256  *     Pull-up/pull-down enable reg     0x40 + 3 * bank_size    RW
 257  *     Pull-up/pull-down select reg     0x40 + 4 * bank_size    RW
 258  *     Interrupt mask register          0x40 + 5 * bank_size    RW
 259  *     Interrupt status register        0x40 + 6 * bank_size    R
 260  *
 261  * - Registers with bit 0x80 set, the AI bit
 262  *   The bit is cleared and the registers fall into one of the
 263  *   categories above.
 264  */
 265
 266 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
 267                                    u32 checkbank)
 268 {
 269         int bank_shift = pca953x_bank_shift(chip);
 270         int bank = (reg & REG_ADDR_MASK) >> bank_shift;
 271         int offset = reg & (BIT(bank_shift) - 1);
 272
 273         /* Special PCAL extended register check. */
 274         if (reg & REG_ADDR_EXT) {
 275                 if (!(chip->driver_data & PCA_PCAL))
 276                         return false;
 277                 bank += 8;
 278         }
 279
 280         /* Register is not in the matching bank. */
 281         if (!(BIT(bank) & checkbank))
 282                 return false;
 283
 284         /* Register is not within allowed range of bank. */
 285         if (offset >= NBANK(chip))
 286                 return false;
 287
 288         return true;
 289 }
 290
 291 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
 292 {
 293         struct pca953x_chip *chip = dev_get_drvdata(dev);
 294         u32 bank;
 295
 296         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 297                 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
 298                        PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
 299         } else {
 300                 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
 301                        PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
 302                        PCA957x_BANK_BUSHOLD;
 303         }
 304
 305         if (chip->driver_data & PCA_PCAL) {
 306                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 307                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
 308                         PCAL9xxx_BANK_IRQ_STAT;
 309         }
 310
 311         return pca953x_check_register(chip, reg, bank);
 312 }
 313
 314 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
 315 {
 316         struct pca953x_chip *chip = dev_get_drvdata(dev);
 317         u32 bank;
 318
 319         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 320                 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
 321                         PCA953x_BANK_CONFIG;
 322         } else {
 323                 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
 324                         PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
 325         }
 326
 327         if (chip->driver_data & PCA_PCAL)
 328                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 329                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
 330
 331         return pca953x_check_register(chip, reg, bank);
 332 }
 333
 334 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
 335 {
 336         struct pca953x_chip *chip = dev_get_drvdata(dev);
 337         u32 bank;
 338
 339         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
 340                 bank = PCA953x_BANK_INPUT;
 341         else
 342                 bank = PCA957x_BANK_INPUT;
 343
 344         if (chip->driver_data & PCA_PCAL)
 345                 bank |= PCAL9xxx_BANK_IRQ_STAT;
 346
 347         return pca953x_check_register(chip, reg, bank);
 348 }
 349
 350 static const struct regmap_config pca953x_i2c_regmap = {
 351         .reg_bits = 8,
 352         .val_bits = 8,
 353
 354         .readable_reg = pca953x_readable_register,
 355         .writeable_reg = pca953x_writeable_register,
 356         .volatile_reg = pca953x_volatile_register,
 357
 358         .disable_locking = true,
 359         .cache_type = REGCACHE_RBTREE,
 360         .max_register = 0x7f,
 361 };
 362
 363 static const struct regmap_config pca953x_ai_i2c_regmap = {
 364         .reg_bits = 8,
 365         .val_bits = 8,
 366
 367         .read_flag_mask = REG_ADDR_AI,
 368         .write_flag_mask = REG_ADDR_AI,
 369
 370         .readable_reg = pca953x_readable_register,
 371         .writeable_reg = pca953x_writeable_register,
 372         .volatile_reg = pca953x_volatile_register,
 373
 374         .disable_locking = true,
 375         .cache_type = REGCACHE_RBTREE,
 376         .max_register = 0x7f,
 377 };
 378
 379 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off)
 380 {
 381         int bank_shift = pca953x_bank_shift(chip);
 382         int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
 383         int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
 384         u8 regaddr = pinctrl | addr | (off / BANK_SZ);
 385
 386         return regaddr;
 387 }
 388
 389 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
 390 {
 391         u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
 392         u8 value[MAX_BANK];
 393         int i, ret;
 394
 395         for (i = 0; i < NBANK(chip); i++)
 396                 value[i] = bitmap_get_value8(val, i * BANK_SZ);
 397
 398         ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip));
 399         if (ret < 0) {
 400                 dev_err(&chip->client->dev, "failed writing register\n");
 401                 return ret;
 402         }
 403
 404         return 0;
 405 }
 406
 407 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
 408 {
 409         u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
 410         u8 value[MAX_BANK];
 411         int i, ret;
 412
 413         ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip));
 414         if (ret < 0) {
 415                 dev_err(&chip->client->dev, "failed reading register\n");
 416                 return ret;
 417         }
 418
 419         for (i = 0; i < NBANK(chip); i++)
 420                 bitmap_set_value8(val, value[i], i * BANK_SZ);
 421
 422         return 0;
 423 }
 424
 425 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
 426 {
 427         struct pca953x_chip *chip = gpiochip_get_data(gc);
 428         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 429         u8 bit = BIT(off % BANK_SZ);
 430         int ret;
 431
 432         mutex_lock(&chip->i2c_lock);
 433         ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
 434         mutex_unlock(&chip->i2c_lock);
 435         return ret;
 436 }
 437
 438 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
 439                 unsigned off, int val)
 440 {
 441         struct pca953x_chip *chip = gpiochip_get_data(gc);
 442         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 443         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
 444         u8 bit = BIT(off % BANK_SZ);
 445         int ret;
 446
 447         mutex_lock(&chip->i2c_lock);
 448         /* set output level */
 449         ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 450         if (ret)
 451                 goto exit;
 452
 453         /* then direction */
 454         ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
 455 exit:
 456         mutex_unlock(&chip->i2c_lock);
 457         return ret;
 458 }
 459
 460 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
 461 {
 462         struct pca953x_chip *chip = gpiochip_get_data(gc);
 463         u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off);
 464         u8 bit = BIT(off % BANK_SZ);
 465         u32 reg_val;
 466         int ret;
 467
 468         mutex_lock(&chip->i2c_lock);
 469         ret = regmap_read(chip->regmap, inreg, &reg_val);
 470         mutex_unlock(&chip->i2c_lock);
 471         if (ret < 0)
 472                 return ret;
 473
 474         return !!(reg_val & bit);
 475 }
 476
 477 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
 478 {
 479         struct pca953x_chip *chip = gpiochip_get_data(gc);
 480         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
 481         u8 bit = BIT(off % BANK_SZ);
 482
 483         mutex_lock(&chip->i2c_lock);
 484         regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 485         mutex_unlock(&chip->i2c_lock);
 486 }
 487
 488 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
 489 {
 490         struct pca953x_chip *chip = gpiochip_get_data(gc);
 491         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 492         u8 bit = BIT(off % BANK_SZ);
 493         u32 reg_val;
 494         int ret;
 495
 496         mutex_lock(&chip->i2c_lock);
 497         ret = regmap_read(chip->regmap, dirreg, &reg_val);
 498         mutex_unlock(&chip->i2c_lock);
 499         if (ret < 0)
 500                 return ret;
 501
 502         if (reg_val & bit)
 503                 return GPIO_LINE_DIRECTION_IN;
 504
 505         return GPIO_LINE_DIRECTION_OUT;
 506 }
 507
 508 static int pca953x_gpio_get_multiple(struct gpio_chip *gc,
 509                                      unsigned long *mask, unsigned long *bits)
 510 {
 511         struct pca953x_chip *chip = gpiochip_get_data(gc);
 512         DECLARE_BITMAP(reg_val, MAX_LINE);
 513         int ret;
 514
 515         mutex_lock(&chip->i2c_lock);
 516         ret = pca953x_read_regs(chip, chip->regs->input, reg_val);
 517         mutex_unlock(&chip->i2c_lock);
 518         if (ret)
 519                 return ret;
 520
 521         bitmap_replace(bits, bits, reg_val, mask, gc->ngpio);
 522         return 0;
 523 }
 524
 525 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
 526                                       unsigned long *mask, unsigned long *bits)
 527 {
 528         struct pca953x_chip *chip = gpiochip_get_data(gc);
 529         DECLARE_BITMAP(reg_val, MAX_LINE);
 530         int ret;
 531
 532         mutex_lock(&chip->i2c_lock);
 533         ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
 534         if (ret)
 535                 goto exit;
 536
 537         bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio);
 538
 539         pca953x_write_regs(chip, chip->regs->output, reg_val);
 540 exit:
 541         mutex_unlock(&chip->i2c_lock);
 542 }
 543
 544 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
 545                                          unsigned int offset,
 546                                          unsigned long config)
 547 {
 548         u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset);
 549         u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset);
 550         u8 bit = BIT(offset % BANK_SZ);
 551         int ret;
 552
 553         /*
 554          * pull-up/pull-down configuration requires PCAL extended
 555          * registers
 556          */
 557         if (!(chip->driver_data & PCA_PCAL))
 558                 return -ENOTSUPP;
 559
 560         mutex_lock(&chip->i2c_lock);
 561
 562         /* Configure pull-up/pull-down */
 563         if (config == PIN_CONFIG_BIAS_PULL_UP)
 564                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
 565         else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
 566                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
 567         else
 568                 ret = 0;
 569         if (ret)
 570                 goto exit;
 571
 572         /* Disable/Enable pull-up/pull-down */
 573         if (config == PIN_CONFIG_BIAS_DISABLE)
 574                 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
 575         else
 576                 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
 577
 578 exit:
 579         mutex_unlock(&chip->i2c_lock);
 580         return ret;
 581 }
 582
 583 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
 584                                    unsigned long config)
 585 {
 586         struct pca953x_chip *chip = gpiochip_get_data(gc);
 587
 588         switch (pinconf_to_config_param(config)) {
 589         case PIN_CONFIG_BIAS_PULL_UP:
 590         case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 591         case PIN_CONFIG_BIAS_PULL_DOWN:
 592         case PIN_CONFIG_BIAS_DISABLE:
 593                 return pca953x_gpio_set_pull_up_down(chip, offset, config);
 594         default:
 595                 return -ENOTSUPP;
 596         }
 597 }
 598
 599 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
 600 {
 601         struct gpio_chip *gc;
 602
 603         gc = &chip->gpio_chip;
 604
 605         gc->direction_input  = pca953x_gpio_direction_input;
 606         gc->direction_output = pca953x_gpio_direction_output;
 607         gc->get = pca953x_gpio_get_value;
 608         gc->set = pca953x_gpio_set_value;
 609         gc->get_direction = pca953x_gpio_get_direction;
 610         gc->get_multiple = pca953x_gpio_get_multiple;
 611         gc->set_multiple = pca953x_gpio_set_multiple;
 612         gc->set_config = pca953x_gpio_set_config;
 613         gc->can_sleep = true;
 614
 615         gc->base = chip->gpio_start;
 616         gc->ngpio = gpios;
 617         gc->label = dev_name(&chip->client->dev);
 618         gc->parent = &chip->client->dev;
 619         gc->owner = THIS_MODULE;
 620         gc->names = chip->names;
 621 }
 622
 623 #ifdef CONFIG_GPIO_PCA953X_IRQ
 624 static void pca953x_irq_mask(struct irq_data *d)
 625 {
 626         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 627         struct pca953x_chip *chip = gpiochip_get_data(gc);
 628         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 629
 630         clear_bit(hwirq, chip->irq_mask);
 631 }
 632
 633 static void pca953x_irq_unmask(struct irq_data *d)
 634 {
 635         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 636         struct pca953x_chip *chip = gpiochip_get_data(gc);
 637         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 638
 639         set_bit(hwirq, chip->irq_mask);
 640 }
 641
 642 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
 643 {
 644         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 645         struct pca953x_chip *chip = gpiochip_get_data(gc);
 646
 647         if (on)
 648                 atomic_inc(&chip->wakeup_path);
 649         else
 650                 atomic_dec(&chip->wakeup_path);
 651
 652         return irq_set_irq_wake(chip->client->irq, on);
 653 }
 654
 655 static void pca953x_irq_bus_lock(struct irq_data *d)
 656 {
 657         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 658         struct pca953x_chip *chip = gpiochip_get_data(gc);
 659
 660         mutex_lock(&chip->irq_lock);
 661 }
 662
 663 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 664 {
 665         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 666         struct pca953x_chip *chip = gpiochip_get_data(gc);
 667         DECLARE_BITMAP(irq_mask, MAX_LINE);
 668         DECLARE_BITMAP(reg_direction, MAX_LINE);
 669         int level;
 670
 671         if (chip->driver_data & PCA_PCAL) {
 672                 /* Enable latch on interrupt-enabled inputs */
 673                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
 674
 675                 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio);
 676
 677                 /* Unmask enabled interrupts */
 678                 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);
 679         }
 680
 681         /* Switch direction to input if needed */
 682         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 683
 684         bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
 685         bitmap_complement(reg_direction, reg_direction, gc->ngpio);
 686         bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);
 687
 688         /* Look for any newly setup interrupt */
 689         for_each_set_bit(level, irq_mask, gc->ngpio)
 690                 pca953x_gpio_direction_input(&chip->gpio_chip, level);
 691
 692         mutex_unlock(&chip->irq_lock);
 693 }
 694
 695 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
 696 {
 697         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 698         struct pca953x_chip *chip = gpiochip_get_data(gc);
 699         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 700
 701         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
 702                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
 703                         d->irq, type);
 704                 return -EINVAL;
 705         }
 706
 707         assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING);
 708         assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING);
 709
 710         return 0;
 711 }
 712
 713 static void pca953x_irq_shutdown(struct irq_data *d)
 714 {
 715         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 716         struct pca953x_chip *chip = gpiochip_get_data(gc);
 717         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 718
 719         clear_bit(hwirq, chip->irq_trig_raise);
 720         clear_bit(hwirq, chip->irq_trig_fall);
 721 }
 722
 723 static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending)
 724 {
 725         struct gpio_chip *gc = &chip->gpio_chip;
 726         DECLARE_BITMAP(reg_direction, MAX_LINE);
 727         DECLARE_BITMAP(old_stat, MAX_LINE);
 728         DECLARE_BITMAP(cur_stat, MAX_LINE);
 729         DECLARE_BITMAP(new_stat, MAX_LINE);
 730         DECLARE_BITMAP(trigger, MAX_LINE);
 731         int ret;
 732
 733         if (chip->driver_data & PCA_PCAL) {
 734                 /* Read the current interrupt status from the device */
 735                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
 736                 if (ret)
 737                         return false;
 738
 739                 /* Check latched inputs and clear interrupt status */
 740                 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 741                 if (ret)
 742                         return false;
 743
 744                 /* Apply filter for rising/falling edge selection */
 745                 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio);
 746
 747                 bitmap_and(pending, new_stat, trigger, gc->ngpio);
 748
 749                 return !bitmap_empty(pending, gc->ngpio);
 750         }
 751
 752         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 753         if (ret)
 754                 return false;
 755
 756         /* Remove output pins from the equation */
 757         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 758
 759         bitmap_copy(old_stat, chip->irq_stat, gc->ngpio);
 760
 761         bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio);
 762         bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio);
 763         bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio);
 764
 765         if (bitmap_empty(trigger, gc->ngpio))
 766                 return false;
 767
 768         bitmap_copy(chip->irq_stat, new_stat, gc->ngpio);
 769
 770         bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio);
 771         bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio);
 772         bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio);
 773         bitmap_and(pending, new_stat, trigger, gc->ngpio);
 774
 775         return !bitmap_empty(pending, gc->ngpio);
 776 }
 777
 778 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 779 {
 780         struct pca953x_chip *chip = devid;
 781         struct gpio_chip *gc = &chip->gpio_chip;
 782         DECLARE_BITMAP(pending, MAX_LINE);
 783         int level;
 784         bool ret;
 785
 786         bitmap_zero(pending, MAX_LINE);
 787
 788         mutex_lock(&chip->i2c_lock);
 789         ret = pca953x_irq_pending(chip, pending);
 790         mutex_unlock(&chip->i2c_lock);
 791
 792         if (ret) {
 793                 ret = 0;
 794
 795                 for_each_set_bit(level, pending, gc->ngpio) {
 796                         int nested_irq = irq_find_mapping(gc->irq.domain, level);
 797
 798                         if (unlikely(nested_irq <= 0)) {
 799                                 dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level);
 800                                 continue;
 801                         }
 802
 803                         handle_nested_irq(nested_irq);
 804                         ret = 1;
 805                 }
 806         }
 807
 808         return IRQ_RETVAL(ret);
 809 }
 810
 811 static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base)
 812 {
 813         struct i2c_client *client = chip->client;
 814         struct irq_chip *irq_chip = &chip->irq_chip;
 815         DECLARE_BITMAP(reg_direction, MAX_LINE);
 816         DECLARE_BITMAP(irq_stat, MAX_LINE);
 817         struct gpio_irq_chip *girq;
 818         int ret;
 819
 820         if (dmi_first_match(pca953x_dmi_acpi_irq_info)) {
 821                 ret = pca953x_acpi_get_irq(&client->dev);
 822                 if (ret > 0)
 823                         client->irq = ret;
 824         }
 825
 826         if (!client->irq)
 827                 return 0;
 828
 829         if (irq_base == -1)
 830                 return 0;
 831
 832         if (!(chip->driver_data & PCA_INT))
 833                 return 0;
 834
 835         ret = pca953x_read_regs(chip, chip->regs->input, irq_stat);
 836         if (ret)
 837                 return ret;
 838
 839         /*
 840          * There is no way to know which GPIO line generated the
 841          * interrupt.  We have to rely on the previous read for
 842          * this purpose.
 843          */
 844         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 845         bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio);
 846         mutex_init(&chip->irq_lock);
 847
 848         irq_chip->name = dev_name(&client->dev);
 849         irq_chip->irq_mask = pca953x_irq_mask;
 850         irq_chip->irq_unmask = pca953x_irq_unmask;
 851         irq_chip->irq_set_wake = pca953x_irq_set_wake;
 852         irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
 853         irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
 854         irq_chip->irq_set_type = pca953x_irq_set_type;
 855         irq_chip->irq_shutdown = pca953x_irq_shutdown;
 856
 857         girq = &chip->gpio_chip.irq;
 858         girq->chip = irq_chip;
 859         /* This will let us handle the parent IRQ in the driver */
 860         girq->parent_handler = NULL;
 861         girq->num_parents = 0;
 862         girq->parents = NULL;
 863         girq->default_type = IRQ_TYPE_NONE;
 864         girq->handler = handle_simple_irq;
 865         girq->threaded = true;
 866         girq->first = irq_base; /* FIXME: get rid of this */
 867
 868         ret = devm_request_threaded_irq(&client->dev, client->irq,
 869                                         NULL, pca953x_irq_handler,
 870                                         IRQF_ONESHOT | IRQF_SHARED,
 871                                         dev_name(&client->dev), chip);
 872         if (ret) {
 873                 dev_err(&client->dev, "failed to request irq %d\n",
 874                         client->irq);
 875                 return ret;
 876         }
 877
 878         return 0;
 879 }
 880
 881 #else /* CONFIG_GPIO_PCA953X_IRQ */
 882 static int pca953x_irq_setup(struct pca953x_chip *chip,
 883                              int irq_base)
 884 {
 885         struct i2c_client *client = chip->client;
 886
 887         if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
 888                 dev_warn(&client->dev, "interrupt support not compiled in\n");
 889
 890         return 0;
 891 }
 892 #endif
 893
 894 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
 895 {
 896         DECLARE_BITMAP(val, MAX_LINE);
 897         int ret;
 898
 899         ret = regcache_sync_region(chip->regmap, chip->regs->output,
 900                                    chip->regs->output + NBANK(chip));
 901         if (ret)
 902                 goto out;
 903
 904         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
 905                                    chip->regs->direction + NBANK(chip));
 906         if (ret)
 907                 goto out;
 908
 909         /* set platform specific polarity inversion */
 910         if (invert)
 911                 bitmap_fill(val, MAX_LINE);
 912         else
 913                 bitmap_zero(val, MAX_LINE);
 914
 915         ret = pca953x_write_regs(chip, chip->regs->invert, val);
 916 out:
 917         return ret;
 918 }
 919
 920 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
 921 {
 922         DECLARE_BITMAP(val, MAX_LINE);
 923         unsigned int i;
 924         int ret;
 925
 926         ret = device_pca95xx_init(chip, invert);
 927         if (ret)
 928                 goto out;
 929
 930         /* To enable register 6, 7 to control pull up and pull down */
 931         for (i = 0; i < NBANK(chip); i++)
 932                 bitmap_set_value8(val, 0x02, i * BANK_SZ);
 933
 934         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
 935         if (ret)
 936                 goto out;
 937
 938         return 0;
 939 out:
 940         return ret;
 941 }
 942
 943 static int pca953x_probe(struct i2c_client *client,
 944                          const struct i2c_device_id *i2c_id)
 945 {
 946         struct pca953x_platform_data *pdata;
 947         struct pca953x_chip *chip;
 948         int irq_base = 0;
 949         int ret;
 950         u32 invert = 0;
 951         struct regulator *reg;
 952         const struct regmap_config *regmap_config;
 953
 954         chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
 955         if (chip == NULL)
 956                 return -ENOMEM;
 957
 958         pdata = dev_get_platdata(&client->dev);
 959         if (pdata) {
 960                 irq_base = pdata->irq_base;
 961                 chip->gpio_start = pdata->gpio_base;
 962                 invert = pdata->invert;
 963                 chip->names = pdata->names;
 964         } else {
 965                 struct gpio_desc *reset_gpio;
 966
 967                 chip->gpio_start = -1;
 968                 irq_base = 0;
 969
 970                 /*
 971                  * See if we need to de-assert a reset pin.
 972                  *
 973                  * There is no known ACPI-enabled platforms that are
 974                  * using "reset" GPIO. Otherwise any of those platform
 975                  * must use _DSD method with corresponding property.
 976                  */
 977                 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
 978                                                      GPIOD_OUT_LOW);
 979                 if (IS_ERR(reset_gpio))
 980                         return PTR_ERR(reset_gpio);
 981         }
 982
 983         chip->client = client;
 984
 985         reg = devm_regulator_get(&client->dev, "vcc");
 986         if (IS_ERR(reg))
 987                 return dev_err_probe(&client->dev, PTR_ERR(reg), "reg get err\n");
 988
 989         ret = regulator_enable(reg);
 990         if (ret) {
 991                 dev_err(&client->dev, "reg en err: %d\n", ret);
 992                 return ret;
 993         }
 994         chip->regulator = reg;
 995
 996         if (i2c_id) {
 997                 chip->driver_data = i2c_id->driver_data;
 998         } else {
 999                 const void *match;
1000
1001                 match = device_get_match_data(&client->dev);
1002                 if (!match) {
1003                         ret = -ENODEV;
1004                         goto err_exit;
1005                 }
1006
1007                 chip->driver_data = (uintptr_t)match;
1008         }
1009
1010         i2c_set_clientdata(client, chip);
1011
1012         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
1013
1014         if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) {
1015                 dev_info(&client->dev, "using AI\n");
1016                 regmap_config = &pca953x_ai_i2c_regmap;
1017         } else {
1018                 dev_info(&client->dev, "using no AI\n");
1019                 regmap_config = &pca953x_i2c_regmap;
1020         }
1021
1022         chip->regmap = devm_regmap_init_i2c(client, regmap_config);
1023         if (IS_ERR(chip->regmap)) {
1024                 ret = PTR_ERR(chip->regmap);
1025                 goto err_exit;
1026         }
1027
1028         regcache_mark_dirty(chip->regmap);
1029
1030         mutex_init(&chip->i2c_lock);
1031         /*
1032          * In case we have an i2c-mux controlled by a GPIO provided by an
1033          * expander using the same driver higher on the device tree, read the
1034          * i2c adapter nesting depth and use the retrieved value as lockdep
1035          * subclass for chip->i2c_lock.
1036          *
1037          * REVISIT: This solution is not complete. It protects us from lockdep
1038          * false positives when the expander controlling the i2c-mux is on
1039          * a different level on the device tree, but not when it's on the same
1040          * level on a different branch (in which case the subclass number
1041          * would be the same).
1042          *
1043          * TODO: Once a correct solution is developed, a similar fix should be
1044          * applied to all other i2c-controlled GPIO expanders (and potentially
1045          * regmap-i2c).
1046          */
1047         lockdep_set_subclass(&chip->i2c_lock,
1048                              i2c_adapter_depth(client->adapter));
1049
1050         /* initialize cached registers from their original values.
1051          * we can't share this chip with another i2c master.
1052          */
1053
1054         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
1055                 chip->regs = &pca953x_regs;
1056                 ret = device_pca95xx_init(chip, invert);
1057         } else {
1058                 chip->regs = &pca957x_regs;
1059                 ret = device_pca957x_init(chip, invert);
1060         }
1061         if (ret)
1062                 goto err_exit;
1063
1064         ret = pca953x_irq_setup(chip, irq_base);
1065         if (ret)
1066                 goto err_exit;
1067
1068         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1069         if (ret)
1070                 goto err_exit;
1071
1072         if (pdata && pdata->setup) {
1073                 ret = pdata->setup(client, chip->gpio_chip.base,
1074                                    chip->gpio_chip.ngpio, pdata->context);
1075                 if (ret < 0)
1076                         dev_warn(&client->dev, "setup failed, %d\n", ret);
1077         }
1078
1079         return 0;
1080
1081 err_exit:
1082         regulator_disable(chip->regulator);
1083         return ret;
1084 }
1085
1086 static int pca953x_remove(struct i2c_client *client)
1087 {
1088         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1089         struct pca953x_chip *chip = i2c_get_clientdata(client);
1090         int ret;
1091
1092         if (pdata && pdata->teardown) {
1093                 ret = pdata->teardown(client, chip->gpio_chip.base,
1094                                       chip->gpio_chip.ngpio, pdata->context);
1095                 if (ret < 0)
1096                         dev_err(&client->dev, "teardown failed, %d\n", ret);
1097         } else {
1098                 ret = 0;
1099         }
1100
1101         regulator_disable(chip->regulator);
1102
1103         return ret;
1104 }
1105
1106 #ifdef CONFIG_PM_SLEEP
1107 static int pca953x_regcache_sync(struct device *dev)
1108 {
1109         struct pca953x_chip *chip = dev_get_drvdata(dev);
1110         int ret;
1111
1112         /*
1113          * The ordering between direction and output is important,
1114          * sync these registers first and only then sync the rest.
1115          */
1116         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1117                                    chip->regs->direction + NBANK(chip));
1118         if (ret) {
1119                 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1120                 return ret;
1121         }
1122
1123         ret = regcache_sync_region(chip->regmap, chip->regs->output,
1124                                    chip->regs->output + NBANK(chip));
1125         if (ret) {
1126                 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1127                 return ret;
1128         }
1129
1130 #ifdef CONFIG_GPIO_PCA953X_IRQ
1131         if (chip->driver_data & PCA_PCAL) {
1132                 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1133                                            PCAL953X_IN_LATCH + NBANK(chip));
1134                 if (ret) {
1135                         dev_err(dev, "Failed to sync INT latch registers: %d\n",
1136                                 ret);
1137                         return ret;
1138                 }
1139
1140                 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1141                                            PCAL953X_INT_MASK + NBANK(chip));
1142                 if (ret) {
1143                         dev_err(dev, "Failed to sync INT mask registers: %d\n",
1144                                 ret);
1145                         return ret;
1146                 }
1147         }
1148 #endif
1149
1150         return 0;
1151 }
1152
1153 static int pca953x_suspend(struct device *dev)
1154 {
1155         struct pca953x_chip *chip = dev_get_drvdata(dev);
1156
1157         regcache_cache_only(chip->regmap, true);
1158
1159         if (atomic_read(&chip->wakeup_path))
1160                 device_set_wakeup_path(dev);
1161         else
1162                 regulator_disable(chip->regulator);
1163
1164         return 0;
1165 }
1166
1167 static int pca953x_resume(struct device *dev)
1168 {
1169         struct pca953x_chip *chip = dev_get_drvdata(dev);
1170         int ret;
1171
1172         if (!atomic_read(&chip->wakeup_path)) {
1173                 ret = regulator_enable(chip->regulator);
1174                 if (ret) {
1175                         dev_err(dev, "Failed to enable regulator: %d\n", ret);
1176                         return 0;
1177                 }
1178         }
1179
1180         regcache_cache_only(chip->regmap, false);
1181         regcache_mark_dirty(chip->regmap);
1182         ret = pca953x_regcache_sync(dev);
1183         if (ret)
1184                 return ret;
1185
1186         ret = regcache_sync(chip->regmap);
1187         if (ret) {
1188                 dev_err(dev, "Failed to restore register map: %d\n", ret);
1189                 return ret;
1190         }
1191
1192         return 0;
1193 }
1194 #endif
1195
1196 /* convenience to stop overlong match-table lines */
1197 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1198 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1199
1200 static const struct of_device_id pca953x_dt_ids[] = {
1201         { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1202         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1203         { .compatible = "nxp,pca9506", .data = OF_953X(40, PCA_INT), },
1204         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1205         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1206         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1207         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1208         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1209         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1210         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1211         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1212         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1213         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1214         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1215         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1216         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1217
1218         { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1219         { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1220         { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), },
1221         { .compatible = "nxp,pcal9554b", .data = OF_953X( 8, PCA_LATCH_INT), },
1222         { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1223
1224         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1225         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1226         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1227         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1228         { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1229
1230         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1231         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1232         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1233         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1234         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1235         { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1236
1237         { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1238         { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1239         { .compatible = "onnn,pca9655", .data = OF_953X(16, PCA_INT), },
1240
1241         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1242         { }
1243 };
1244
1245 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1246
1247 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1248
1249 static struct i2c_driver pca953x_driver = {
1250         .driver = {
1251                 .name   = "pca953x",
1252                 .pm     = &pca953x_pm_ops,
1253                 .of_match_table = pca953x_dt_ids,
1254                 .acpi_match_table = pca953x_acpi_ids,
1255         },
1256         .probe          = pca953x_probe,
1257         .remove         = pca953x_remove,
1258         .id_table       = pca953x_id,
1259 };
1260
1261 static int __init pca953x_init(void)
1262 {
1263         return i2c_add_driver(&pca953x_driver);
1264 }
1265 /* register after i2c postcore initcall and before
1266  * subsys initcalls that may rely on these GPIOs
1267  */
1268 subsys_initcall(pca953x_init);
1269
1270 static void __exit pca953x_exit(void)
1271 {
1272         i2c_del_driver(&pca953x_driver);
1273 }
1274 module_exit(pca953x_exit);
1275
1276 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1277 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1278 MODULE_LICENSE("GPL");