drivers/gpio/gpio-pca953x.c

   1 /*
   2  *  PCA953x 4/8/16/24/40 bit I/O ports
   3  *
   4  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
   5  *  Copyright (C) 2007 Marvell International Ltd.
   6  *
   7  *  Derived from drivers/i2c/chips/pca9539.c
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License as published by
  11  *  the Free Software Foundation; version 2 of the License.
  12  */
  13
  14 #include <linux/acpi.h>
  15 #include <linux/gpio.h>
  16 #include <linux/gpio/consumer.h>
  17 #include <linux/i2c.h>
  18 #include <linux/init.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/module.h>
  21 #include <linux/of_platform.h>
  22 #include <linux/platform_data/pca953x.h>
  23 #include <linux/regulator/consumer.h>
  24 #include <linux/slab.h>
  25
  26 #include <asm/unaligned.h>
  27
  28 #define PCA953X_INPUT           0x00
  29 #define PCA953X_OUTPUT          0x01
  30 #define PCA953X_INVERT          0x02
  31 #define PCA953X_DIRECTION       0x03
  32
  33 #define REG_ADDR_AI             0x80
  34
  35 #define PCA957X_IN              0x00
  36 #define PCA957X_INVRT           0x01
  37 #define PCA957X_BKEN            0x02
  38 #define PCA957X_PUPD            0x03
  39 #define PCA957X_CFG             0x04
  40 #define PCA957X_OUT             0x05
  41 #define PCA957X_MSK             0x06
  42 #define PCA957X_INTS            0x07
  43
  44 #define PCAL953X_OUT_STRENGTH   0x20
  45 #define PCAL953X_IN_LATCH       0x22
  46 #define PCAL953X_PULL_EN        0x23
  47 #define PCAL953X_PULL_SEL       0x24
  48 #define PCAL953X_INT_MASK       0x25
  49 #define PCAL953X_INT_STAT       0x26
  50 #define PCAL953X_OUT_CONF       0x27
  51
  52 #define PCAL6524_INT_EDGE       0x28
  53 #define PCAL6524_INT_CLR        0x2a
  54 #define PCAL6524_IN_STATUS      0x2b
  55 #define PCAL6524_OUT_INDCONF    0x2c
  56 #define PCAL6524_DEBOUNCE       0x2d
  57
  58 #define PCA_GPIO_MASK           0x00FF
  59 #define PCA_INT                 0x0100
  60 #define PCA_PCAL                0x0200
  61 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
  62 #define PCA953X_TYPE            0x1000
  63 #define PCA957X_TYPE            0x2000
  64 #define PCA_TYPE_MASK           0xF000
  65
  66 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
  67
  68 static const struct i2c_device_id pca953x_id[] = {
  69         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
  70         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
  71         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
  72         { "pca9536", 4  | PCA953X_TYPE, },
  73         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
  74         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
  75         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
  76         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
  77         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
  78         { "pca9556", 8  | PCA953X_TYPE, },
  79         { "pca9557", 8  | PCA953X_TYPE, },
  80         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
  81         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
  82         { "pca9698", 40 | PCA953X_TYPE, },
  83
  84         { "pcal6524", 24 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
  85         { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
  86
  87         { "max7310", 8  | PCA953X_TYPE, },
  88         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
  89         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
  90         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
  91         { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
  92         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
  93         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
  94         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
  95         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
  96         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
  97         { "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
  98         { "xra1202", 8  | PCA953X_TYPE },
  99         { }
 100 };
 101 MODULE_DEVICE_TABLE(i2c, pca953x_id);
 102
 103 static const struct acpi_device_id pca953x_acpi_ids[] = {
 104         { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
 105         { }
 106 };
 107 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
 108
 109 #define MAX_BANK 5
 110 #define BANK_SZ 8
 111
 112 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
 113
 114 struct pca953x_reg_config {
 115         int direction;
 116         int output;
 117         int input;
 118 };
 119
 120 static const struct pca953x_reg_config pca953x_regs = {
 121         .direction = PCA953X_DIRECTION,
 122         .output = PCA953X_OUTPUT,
 123         .input = PCA953X_INPUT,
 124 };
 125
 126 static const struct pca953x_reg_config pca957x_regs = {
 127         .direction = PCA957X_CFG,
 128         .output = PCA957X_OUT,
 129         .input = PCA957X_IN,
 130 };
 131
 132 struct pca953x_chip {
 133         unsigned gpio_start;
 134         u8 reg_output[MAX_BANK];
 135         u8 reg_direction[MAX_BANK];
 136         struct mutex i2c_lock;
 137
 138 #ifdef CONFIG_GPIO_PCA953X_IRQ
 139         struct mutex irq_lock;
 140         u8 irq_mask[MAX_BANK];
 141         u8 irq_stat[MAX_BANK];
 142         u8 irq_trig_raise[MAX_BANK];
 143         u8 irq_trig_fall[MAX_BANK];
 144 #endif
 145
 146         struct i2c_client *client;
 147         struct gpio_chip gpio_chip;
 148         const char *const *names;
 149         unsigned long driver_data;
 150         struct regulator *regulator;
 151
 152         const struct pca953x_reg_config *regs;
 153
 154         int (*write_regs)(struct pca953x_chip *, int, u8 *);
 155         int (*read_regs)(struct pca953x_chip *, int, u8 *);
 156 };
 157
 158 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
 159                                 int off)
 160 {
 161         int ret;
 162         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 163         int offset = off / BANK_SZ;
 164
 165         ret = i2c_smbus_read_byte_data(chip->client,
 166                                 (reg << bank_shift) + offset);
 167         *val = ret;
 168
 169         if (ret < 0) {
 170                 dev_err(&chip->client->dev, "failed reading register\n");
 171                 return ret;
 172         }
 173
 174         return 0;
 175 }
 176
 177 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
 178                                 int off)
 179 {
 180         int ret;
 181         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 182         int offset = off / BANK_SZ;
 183
 184         ret = i2c_smbus_write_byte_data(chip->client,
 185                                         (reg << bank_shift) + offset, val);
 186
 187         if (ret < 0) {
 188                 dev_err(&chip->client->dev, "failed writing register\n");
 189                 return ret;
 190         }
 191
 192         return 0;
 193 }
 194
 195 static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
 196 {
 197         return i2c_smbus_write_byte_data(chip->client, reg, *val);
 198 }
 199
 200 static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
 201 {
 202         u16 word = get_unaligned((u16 *)val);
 203
 204         return i2c_smbus_write_word_data(chip->client, reg << 1, word);
 205 }
 206
 207 static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
 208 {
 209         int ret;
 210
 211         ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]);
 212         if (ret < 0)
 213                 return ret;
 214
 215         return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]);
 216 }
 217
 218 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
 219 {
 220         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 221
 222         return i2c_smbus_write_i2c_block_data(chip->client,
 223                                               (reg << bank_shift) | REG_ADDR_AI,
 224                                               NBANK(chip), val);
 225 }
 226
 227 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
 228 {
 229         int ret = 0;
 230
 231         ret = chip->write_regs(chip, reg, val);
 232         if (ret < 0) {
 233                 dev_err(&chip->client->dev, "failed writing register\n");
 234                 return ret;
 235         }
 236
 237         return 0;
 238 }
 239
 240 static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
 241 {
 242         int ret;
 243
 244         ret = i2c_smbus_read_byte_data(chip->client, reg);
 245         *val = ret;
 246
 247         return ret;
 248 }
 249
 250 static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
 251 {
 252         int ret;
 253
 254         ret = i2c_smbus_read_word_data(chip->client, reg << 1);
 255         put_unaligned(ret, (u16 *)val);
 256
 257         return ret;
 258 }
 259
 260 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
 261 {
 262         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 263
 264         return i2c_smbus_read_i2c_block_data(chip->client,
 265                                              (reg << bank_shift) | REG_ADDR_AI,
 266                                              NBANK(chip), val);
 267 }
 268
 269 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
 270 {
 271         int ret;
 272
 273         ret = chip->read_regs(chip, reg, val);
 274         if (ret < 0) {
 275                 dev_err(&chip->client->dev, "failed reading register\n");
 276                 return ret;
 277         }
 278
 279         return 0;
 280 }
 281
 282 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
 283 {
 284         struct pca953x_chip *chip = gpiochip_get_data(gc);
 285         u8 reg_val;
 286         int ret;
 287
 288         mutex_lock(&chip->i2c_lock);
 289         reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
 290
 291         ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
 292         if (ret)
 293                 goto exit;
 294
 295         chip->reg_direction[off / BANK_SZ] = reg_val;
 296 exit:
 297         mutex_unlock(&chip->i2c_lock);
 298         return ret;
 299 }
 300
 301 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
 302                 unsigned off, int val)
 303 {
 304         struct pca953x_chip *chip = gpiochip_get_data(gc);
 305         u8 reg_val;
 306         int ret;
 307
 308         mutex_lock(&chip->i2c_lock);
 309         /* set output level */
 310         if (val)
 311                 reg_val = chip->reg_output[off / BANK_SZ]
 312                         | (1u << (off % BANK_SZ));
 313         else
 314                 reg_val = chip->reg_output[off / BANK_SZ]
 315                         & ~(1u << (off % BANK_SZ));
 316
 317         ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
 318         if (ret)
 319                 goto exit;
 320
 321         chip->reg_output[off / BANK_SZ] = reg_val;
 322
 323         /* then direction */
 324         reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
 325         ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
 326         if (ret)
 327                 goto exit;
 328
 329         chip->reg_direction[off / BANK_SZ] = reg_val;
 330 exit:
 331         mutex_unlock(&chip->i2c_lock);
 332         return ret;
 333 }
 334
 335 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
 336 {
 337         struct pca953x_chip *chip = gpiochip_get_data(gc);
 338         u32 reg_val;
 339         int ret;
 340
 341         mutex_lock(&chip->i2c_lock);
 342         ret = pca953x_read_single(chip, chip->regs->input, &reg_val, off);
 343         mutex_unlock(&chip->i2c_lock);
 344         if (ret < 0) {
 345                 /* NOTE:  diagnostic already emitted; that's all we should
 346                  * do unless gpio_*_value_cansleep() calls become different
 347                  * from their nonsleeping siblings (and report faults).
 348                  */
 349                 return 0;
 350         }
 351
 352         return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
 353 }
 354
 355 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
 356 {
 357         struct pca953x_chip *chip = gpiochip_get_data(gc);
 358         u8 reg_val;
 359         int ret;
 360
 361         mutex_lock(&chip->i2c_lock);
 362         if (val)
 363                 reg_val = chip->reg_output[off / BANK_SZ]
 364                         | (1u << (off % BANK_SZ));
 365         else
 366                 reg_val = chip->reg_output[off / BANK_SZ]
 367                         & ~(1u << (off % BANK_SZ));
 368
 369         ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
 370         if (ret)
 371                 goto exit;
 372
 373         chip->reg_output[off / BANK_SZ] = reg_val;
 374 exit:
 375         mutex_unlock(&chip->i2c_lock);
 376 }
 377
 378 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
 379 {
 380         struct pca953x_chip *chip = gpiochip_get_data(gc);
 381         u32 reg_val;
 382         int ret;
 383
 384         mutex_lock(&chip->i2c_lock);
 385         ret = pca953x_read_single(chip, chip->regs->direction, &reg_val, off);
 386         mutex_unlock(&chip->i2c_lock);
 387         if (ret < 0)
 388                 return ret;
 389
 390         return !!(reg_val & (1u << (off % BANK_SZ)));
 391 }
 392
 393 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
 394                                       unsigned long *mask, unsigned long *bits)
 395 {
 396         struct pca953x_chip *chip = gpiochip_get_data(gc);
 397         unsigned int bank_mask, bank_val;
 398         int bank_shift, bank;
 399         u8 reg_val[MAX_BANK];
 400         int ret;
 401
 402         bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 403
 404         mutex_lock(&chip->i2c_lock);
 405         memcpy(reg_val, chip->reg_output, NBANK(chip));
 406         for (bank = 0; bank < NBANK(chip); bank++) {
 407                 bank_mask = mask[bank / sizeof(*mask)] >>
 408                            ((bank % sizeof(*mask)) * 8);
 409                 if (bank_mask) {
 410                         bank_val = bits[bank / sizeof(*bits)] >>
 411                                   ((bank % sizeof(*bits)) * 8);
 412                         bank_val &= bank_mask;
 413                         reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
 414                 }
 415         }
 416
 417         ret = i2c_smbus_write_i2c_block_data(chip->client,
 418                                              chip->regs->output << bank_shift,
 419                                              NBANK(chip), reg_val);
 420         if (ret)
 421                 goto exit;
 422
 423         memcpy(chip->reg_output, reg_val, NBANK(chip));
 424 exit:
 425         mutex_unlock(&chip->i2c_lock);
 426 }
 427
 428 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
 429 {
 430         struct gpio_chip *gc;
 431
 432         gc = &chip->gpio_chip;
 433
 434         gc->direction_input  = pca953x_gpio_direction_input;
 435         gc->direction_output = pca953x_gpio_direction_output;
 436         gc->get = pca953x_gpio_get_value;
 437         gc->set = pca953x_gpio_set_value;
 438         gc->get_direction = pca953x_gpio_get_direction;
 439         gc->set_multiple = pca953x_gpio_set_multiple;
 440         gc->can_sleep = true;
 441
 442         gc->base = chip->gpio_start;
 443         gc->ngpio = gpios;
 444         gc->label = chip->client->name;
 445         gc->parent = &chip->client->dev;
 446         gc->owner = THIS_MODULE;
 447         gc->names = chip->names;
 448 }
 449
 450 #ifdef CONFIG_GPIO_PCA953X_IRQ
 451 static void pca953x_irq_mask(struct irq_data *d)
 452 {
 453         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 454         struct pca953x_chip *chip = gpiochip_get_data(gc);
 455
 456         chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
 457 }
 458
 459 static void pca953x_irq_unmask(struct irq_data *d)
 460 {
 461         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 462         struct pca953x_chip *chip = gpiochip_get_data(gc);
 463
 464         chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
 465 }
 466
 467 static void pca953x_irq_bus_lock(struct irq_data *d)
 468 {
 469         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 470         struct pca953x_chip *chip = gpiochip_get_data(gc);
 471
 472         mutex_lock(&chip->irq_lock);
 473 }
 474
 475 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 476 {
 477         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 478         struct pca953x_chip *chip = gpiochip_get_data(gc);
 479         u8 new_irqs;
 480         int level, i;
 481         u8 invert_irq_mask[MAX_BANK];
 482
 483         if (chip->driver_data & PCA_PCAL) {
 484                 /* Enable latch on interrupt-enabled inputs */
 485                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
 486
 487                 for (i = 0; i < NBANK(chip); i++)
 488                         invert_irq_mask[i] = ~chip->irq_mask[i];
 489
 490                 /* Unmask enabled interrupts */
 491                 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
 492         }
 493
 494         /* Look for any newly setup interrupt */
 495         for (i = 0; i < NBANK(chip); i++) {
 496                 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
 497                 new_irqs &= ~chip->reg_direction[i];
 498
 499                 while (new_irqs) {
 500                         level = __ffs(new_irqs);
 501                         pca953x_gpio_direction_input(&chip->gpio_chip,
 502                                                         level + (BANK_SZ * i));
 503                         new_irqs &= ~(1 << level);
 504                 }
 505         }
 506
 507         mutex_unlock(&chip->irq_lock);
 508 }
 509
 510 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
 511 {
 512         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 513         struct pca953x_chip *chip = gpiochip_get_data(gc);
 514         int bank_nb = d->hwirq / BANK_SZ;
 515         u8 mask = 1 << (d->hwirq % BANK_SZ);
 516
 517         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
 518                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
 519                         d->irq, type);
 520                 return -EINVAL;
 521         }
 522
 523         if (type & IRQ_TYPE_EDGE_FALLING)
 524                 chip->irq_trig_fall[bank_nb] |= mask;
 525         else
 526                 chip->irq_trig_fall[bank_nb] &= ~mask;
 527
 528         if (type & IRQ_TYPE_EDGE_RISING)
 529                 chip->irq_trig_raise[bank_nb] |= mask;
 530         else
 531                 chip->irq_trig_raise[bank_nb] &= ~mask;
 532
 533         return 0;
 534 }
 535
 536 static void pca953x_irq_shutdown(struct irq_data *d)
 537 {
 538         struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
 539         u8 mask = 1 << (d->hwirq % BANK_SZ);
 540
 541         chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
 542         chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
 543 }
 544
 545 static struct irq_chip pca953x_irq_chip = {
 546         .name                   = "pca953x",
 547         .irq_mask               = pca953x_irq_mask,
 548         .irq_unmask             = pca953x_irq_unmask,
 549         .irq_bus_lock           = pca953x_irq_bus_lock,
 550         .irq_bus_sync_unlock    = pca953x_irq_bus_sync_unlock,
 551         .irq_set_type           = pca953x_irq_set_type,
 552         .irq_shutdown           = pca953x_irq_shutdown,
 553 };
 554
 555 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
 556 {
 557         u8 cur_stat[MAX_BANK];
 558         u8 old_stat[MAX_BANK];
 559         bool pending_seen = false;
 560         bool trigger_seen = false;
 561         u8 trigger[MAX_BANK];
 562         int ret, i;
 563
 564         if (chip->driver_data & PCA_PCAL) {
 565                 /* Read the current interrupt status from the device */
 566                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
 567                 if (ret)
 568                         return false;
 569
 570                 /* Check latched inputs and clear interrupt status */
 571                 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
 572                 if (ret)
 573                         return false;
 574
 575                 for (i = 0; i < NBANK(chip); i++) {
 576                         /* Apply filter for rising/falling edge selection */
 577                         pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
 578                                 (cur_stat[i] & chip->irq_trig_raise[i]);
 579                         pending[i] &= trigger[i];
 580                         if (pending[i])
 581                                 pending_seen = true;
 582                 }
 583
 584                 return pending_seen;
 585         }
 586
 587         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 588         if (ret)
 589                 return false;
 590
 591         /* Remove output pins from the equation */
 592         for (i = 0; i < NBANK(chip); i++)
 593                 cur_stat[i] &= chip->reg_direction[i];
 594
 595         memcpy(old_stat, chip->irq_stat, NBANK(chip));
 596
 597         for (i = 0; i < NBANK(chip); i++) {
 598                 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
 599                 if (trigger[i])
 600                         trigger_seen = true;
 601         }
 602
 603         if (!trigger_seen)
 604                 return false;
 605
 606         memcpy(chip->irq_stat, cur_stat, NBANK(chip));
 607
 608         for (i = 0; i < NBANK(chip); i++) {
 609                 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
 610                         (cur_stat[i] & chip->irq_trig_raise[i]);
 611                 pending[i] &= trigger[i];
 612                 if (pending[i])
 613                         pending_seen = true;
 614         }
 615
 616         return pending_seen;
 617 }
 618
 619 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 620 {
 621         struct pca953x_chip *chip = devid;
 622         u8 pending[MAX_BANK];
 623         u8 level;
 624         unsigned nhandled = 0;
 625         int i;
 626
 627         if (!pca953x_irq_pending(chip, pending))
 628                 return IRQ_NONE;
 629
 630         for (i = 0; i < NBANK(chip); i++) {
 631                 while (pending[i]) {
 632                         level = __ffs(pending[i]);
 633                         handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
 634                                                         level + (BANK_SZ * i)));
 635                         pending[i] &= ~(1 << level);
 636                         nhandled++;
 637                 }
 638         }
 639
 640         return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
 641 }
 642
 643 static int pca953x_irq_setup(struct pca953x_chip *chip,
 644                              int irq_base)
 645 {
 646         struct i2c_client *client = chip->client;
 647         int ret, i;
 648
 649         if (client->irq && irq_base != -1
 650                         && (chip->driver_data & PCA_INT)) {
 651                 ret = pca953x_read_regs(chip,
 652                                         chip->regs->input, chip->irq_stat);
 653                 if (ret)
 654                         return ret;
 655
 656                 /*
 657                  * There is no way to know which GPIO line generated the
 658                  * interrupt.  We have to rely on the previous read for
 659                  * this purpose.
 660                  */
 661                 for (i = 0; i < NBANK(chip); i++)
 662                         chip->irq_stat[i] &= chip->reg_direction[i];
 663                 mutex_init(&chip->irq_lock);
 664
 665                 ret = devm_request_threaded_irq(&client->dev,
 666                                         client->irq,
 667                                            NULL,
 668                                            pca953x_irq_handler,
 669                                            IRQF_TRIGGER_LOW | IRQF_ONESHOT |
 670                                                    IRQF_SHARED,
 671                                            dev_name(&client->dev), chip);
 672                 if (ret) {
 673                         dev_err(&client->dev, "failed to request irq %d\n",
 674                                 client->irq);
 675                         return ret;
 676                 }
 677
 678                 ret =  gpiochip_irqchip_add_nested(&chip->gpio_chip,
 679                                                    &pca953x_irq_chip,
 680                                                    irq_base,
 681                                                    handle_simple_irq,
 682                                                    IRQ_TYPE_NONE);
 683                 if (ret) {
 684                         dev_err(&client->dev,
 685                                 "could not connect irqchip to gpiochip\n");
 686                         return ret;
 687                 }
 688
 689                 gpiochip_set_nested_irqchip(&chip->gpio_chip,
 690                                             &pca953x_irq_chip,
 691                                             client->irq);
 692         }
 693
 694         return 0;
 695 }
 696
 697 #else /* CONFIG_GPIO_PCA953X_IRQ */
 698 static int pca953x_irq_setup(struct pca953x_chip *chip,
 699                              int irq_base)
 700 {
 701         struct i2c_client *client = chip->client;
 702
 703         if (irq_base != -1 && (chip->driver_data & PCA_INT))
 704                 dev_warn(&client->dev, "interrupt support not compiled in\n");
 705
 706         return 0;
 707 }
 708 #endif
 709
 710 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
 711 {
 712         int ret;
 713         u8 val[MAX_BANK];
 714
 715         chip->regs = &pca953x_regs;
 716
 717         ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
 718         if (ret)
 719                 goto out;
 720
 721         ret = pca953x_read_regs(chip, chip->regs->direction,
 722                                 chip->reg_direction);
 723         if (ret)
 724                 goto out;
 725
 726         /* set platform specific polarity inversion */
 727         if (invert)
 728                 memset(val, 0xFF, NBANK(chip));
 729         else
 730                 memset(val, 0, NBANK(chip));
 731
 732         ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
 733 out:
 734         return ret;
 735 }
 736
 737 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
 738 {
 739         int ret;
 740         u8 val[MAX_BANK];
 741
 742         chip->regs = &pca957x_regs;
 743
 744         ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
 745         if (ret)
 746                 goto out;
 747         ret = pca953x_read_regs(chip, chip->regs->direction,
 748                                 chip->reg_direction);
 749         if (ret)
 750                 goto out;
 751
 752         /* set platform specific polarity inversion */
 753         if (invert)
 754                 memset(val, 0xFF, NBANK(chip));
 755         else
 756                 memset(val, 0, NBANK(chip));
 757         ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
 758         if (ret)
 759                 goto out;
 760
 761         /* To enable register 6, 7 to control pull up and pull down */
 762         memset(val, 0x02, NBANK(chip));
 763         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
 764         if (ret)
 765                 goto out;
 766
 767         return 0;
 768 out:
 769         return ret;
 770 }
 771
 772 static const struct of_device_id pca953x_dt_ids[];
 773
 774 static int pca953x_probe(struct i2c_client *client,
 775                                    const struct i2c_device_id *i2c_id)
 776 {
 777         struct pca953x_platform_data *pdata;
 778         struct pca953x_chip *chip;
 779         int irq_base = 0;
 780         int ret;
 781         u32 invert = 0;
 782         struct regulator *reg;
 783
 784         chip = devm_kzalloc(&client->dev,
 785                         sizeof(struct pca953x_chip), GFP_KERNEL);
 786         if (chip == NULL)
 787                 return -ENOMEM;
 788
 789         pdata = dev_get_platdata(&client->dev);
 790         if (pdata) {
 791                 irq_base = pdata->irq_base;
 792                 chip->gpio_start = pdata->gpio_base;
 793                 invert = pdata->invert;
 794                 chip->names = pdata->names;
 795         } else {
 796                 struct gpio_desc *reset_gpio;
 797
 798                 chip->gpio_start = -1;
 799                 irq_base = 0;
 800
 801                 /*
 802                  * See if we need to de-assert a reset pin.
 803                  *
 804                  * There is no known ACPI-enabled platforms that are
 805                  * using "reset" GPIO. Otherwise any of those platform
 806                  * must use _DSD method with corresponding property.
 807                  */
 808                 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
 809                                                      GPIOD_OUT_LOW);
 810                 if (IS_ERR(reset_gpio))
 811                         return PTR_ERR(reset_gpio);
 812         }
 813
 814         chip->client = client;
 815
 816         reg = devm_regulator_get(&client->dev, "vcc");
 817         if (IS_ERR(reg)) {
 818                 ret = PTR_ERR(reg);
 819                 if (ret != -EPROBE_DEFER)
 820                         dev_err(&client->dev, "reg get err: %d\n", ret);
 821                 return ret;
 822         }
 823         ret = regulator_enable(reg);
 824         if (ret) {
 825                 dev_err(&client->dev, "reg en err: %d\n", ret);
 826                 return ret;
 827         }
 828         chip->regulator = reg;
 829
 830         if (i2c_id) {
 831                 chip->driver_data = i2c_id->driver_data;
 832         } else {
 833                 const struct acpi_device_id *acpi_id;
 834                 struct device *dev = &client->dev;
 835
 836                 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
 837                 if (!chip->driver_data) {
 838                         acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
 839                         if (!acpi_id) {
 840                                 ret = -ENODEV;
 841                                 goto err_exit;
 842                         }
 843
 844                         chip->driver_data = acpi_id->driver_data;
 845                 }
 846         }
 847
 848         mutex_init(&chip->i2c_lock);
 849         /*
 850          * In case we have an i2c-mux controlled by a GPIO provided by an
 851          * expander using the same driver higher on the device tree, read the
 852          * i2c adapter nesting depth and use the retrieved value as lockdep
 853          * subclass for chip->i2c_lock.
 854          *
 855          * REVISIT: This solution is not complete. It protects us from lockdep
 856          * false positives when the expander controlling the i2c-mux is on
 857          * a different level on the device tree, but not when it's on the same
 858          * level on a different branch (in which case the subclass number
 859          * would be the same).
 860          *
 861          * TODO: Once a correct solution is developed, a similar fix should be
 862          * applied to all other i2c-controlled GPIO expanders (and potentially
 863          * regmap-i2c).
 864          */
 865         lockdep_set_subclass(&chip->i2c_lock,
 866                              i2c_adapter_depth(client->adapter));
 867
 868         /* initialize cached registers from their original values.
 869          * we can't share this chip with another i2c master.
 870          */
 871         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
 872
 873         if (chip->gpio_chip.ngpio <= 8) {
 874                 chip->write_regs = pca953x_write_regs_8;
 875                 chip->read_regs = pca953x_read_regs_8;
 876         } else if (chip->gpio_chip.ngpio >= 24) {
 877                 chip->write_regs = pca953x_write_regs_24;
 878                 chip->read_regs = pca953x_read_regs_24;
 879         } else {
 880                 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
 881                         chip->write_regs = pca953x_write_regs_16;
 882                 else
 883                         chip->write_regs = pca957x_write_regs_16;
 884                 chip->read_regs = pca953x_read_regs_16;
 885         }
 886
 887         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
 888                 ret = device_pca953x_init(chip, invert);
 889         else
 890                 ret = device_pca957x_init(chip, invert);
 891         if (ret)
 892                 goto err_exit;
 893
 894         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
 895         if (ret)
 896                 goto err_exit;
 897
 898         ret = pca953x_irq_setup(chip, irq_base);
 899         if (ret)
 900                 goto err_exit;
 901
 902         if (pdata && pdata->setup) {
 903                 ret = pdata->setup(client, chip->gpio_chip.base,
 904                                 chip->gpio_chip.ngpio, pdata->context);
 905                 if (ret < 0)
 906                         dev_warn(&client->dev, "setup failed, %d\n", ret);
 907         }
 908
 909         i2c_set_clientdata(client, chip);
 910         return 0;
 911
 912 err_exit:
 913         regulator_disable(chip->regulator);
 914         return ret;
 915 }
 916
 917 static int pca953x_remove(struct i2c_client *client)
 918 {
 919         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
 920         struct pca953x_chip *chip = i2c_get_clientdata(client);
 921         int ret;
 922
 923         if (pdata && pdata->teardown) {
 924                 ret = pdata->teardown(client, chip->gpio_chip.base,
 925                                 chip->gpio_chip.ngpio, pdata->context);
 926                 if (ret < 0)
 927                         dev_err(&client->dev, "%s failed, %d\n",
 928                                         "teardown", ret);
 929         } else {
 930                 ret = 0;
 931         }
 932
 933         regulator_disable(chip->regulator);
 934
 935         return ret;
 936 }
 937
 938 /* convenience to stop overlong match-table lines */
 939 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
 940 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
 941
 942 static const struct of_device_id pca953x_dt_ids[] = {
 943         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
 944         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
 945         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
 946         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
 947         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
 948         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
 949         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
 950         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
 951         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
 952         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
 953         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
 954         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
 955         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
 956         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
 957
 958         { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
 959         { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
 960
 961         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
 962         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
 963         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
 964         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
 965         { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
 966
 967         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
 968         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
 969         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
 970         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
 971         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
 972
 973         { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
 974
 975         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
 976         { }
 977 };
 978
 979 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
 980
 981 static struct i2c_driver pca953x_driver = {
 982         .driver = {
 983                 .name   = "pca953x",
 984                 .of_match_table = pca953x_dt_ids,
 985                 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
 986         },
 987         .probe          = pca953x_probe,
 988         .remove         = pca953x_remove,
 989         .id_table       = pca953x_id,
 990 };
 991
 992 static int __init pca953x_init(void)
 993 {
 994         return i2c_add_driver(&pca953x_driver);
 995 }
 996 /* register after i2c postcore initcall and before
 997  * subsys initcalls that may rely on these GPIOs
 998  */
 999 subsys_initcall(pca953x_init);
1000
1001 static void __exit pca953x_exit(void)
1002 {
1003         i2c_del_driver(&pca953x_driver);
1004 }
1005 module_exit(pca953x_exit);
1006
1007 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1008 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1009 MODULE_LICENSE("GPL");