2 * PCA953x 4/8/16/24/40 bit I/O ports
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
7 * Derived from drivers/i2c/chips/pca9539.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
14 #include <linux/acpi.h>
15 #include <linux/gpio.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_data/pca953x.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
26 #include <asm/unaligned.h>
28 #define PCA953X_INPUT 0x00
29 #define PCA953X_OUTPUT 0x01
30 #define PCA953X_INVERT 0x02
31 #define PCA953X_DIRECTION 0x03
33 #define REG_ADDR_AI 0x80
35 #define PCA957X_IN 0x00
36 #define PCA957X_INVRT 0x01
37 #define PCA957X_BKEN 0x02
38 #define PCA957X_PUPD 0x03
39 #define PCA957X_CFG 0x04
40 #define PCA957X_OUT 0x05
41 #define PCA957X_MSK 0x06
42 #define PCA957X_INTS 0x07
44 #define PCAL953X_OUT_STRENGTH 0x20
45 #define PCAL953X_IN_LATCH 0x22
46 #define PCAL953X_PULL_EN 0x23
47 #define PCAL953X_PULL_SEL 0x24
48 #define PCAL953X_INT_MASK 0x25
49 #define PCAL953X_INT_STAT 0x26
50 #define PCAL953X_OUT_CONF 0x27
52 #define PCAL6524_INT_EDGE 0x28
53 #define PCAL6524_INT_CLR 0x2a
54 #define PCAL6524_IN_STATUS 0x2b
55 #define PCAL6524_OUT_INDCONF 0x2c
56 #define PCAL6524_DEBOUNCE 0x2d
58 #define PCA_GPIO_MASK 0x00FF
60 #define PCAL_GPIO_MASK 0x1f
61 #define PCAL_PINCTRL_MASK 0xe0
63 #define PCA_INT 0x0100
64 #define PCA_PCAL 0x0200
65 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
66 #define PCA953X_TYPE 0x1000
67 #define PCA957X_TYPE 0x2000
68 #define PCA_TYPE_MASK 0xF000
70 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
72 static const struct i2c_device_id pca953x_id[] = {
73 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
74 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
75 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
76 { "pca9536", 4 | PCA953X_TYPE, },
77 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
78 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
79 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
80 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
81 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
82 { "pca9556", 8 | PCA953X_TYPE, },
83 { "pca9557", 8 | PCA953X_TYPE, },
84 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
85 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
86 { "pca9698", 40 | PCA953X_TYPE, },
88 { "pcal6524", 24 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
89 { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
91 { "max7310", 8 | PCA953X_TYPE, },
92 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
93 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
94 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
95 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
96 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
97 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
98 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
99 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
100 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
101 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
102 { "xra1202", 8 | PCA953X_TYPE },
105 MODULE_DEVICE_TABLE(i2c, pca953x_id);
107 static const struct acpi_device_id pca953x_acpi_ids[] = {
108 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
111 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
116 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
118 struct pca953x_reg_config {
124 static const struct pca953x_reg_config pca953x_regs = {
125 .direction = PCA953X_DIRECTION,
126 .output = PCA953X_OUTPUT,
127 .input = PCA953X_INPUT,
130 static const struct pca953x_reg_config pca957x_regs = {
131 .direction = PCA957X_CFG,
132 .output = PCA957X_OUT,
136 struct pca953x_chip {
138 u8 reg_output[MAX_BANK];
139 u8 reg_direction[MAX_BANK];
140 struct mutex i2c_lock;
142 #ifdef CONFIG_GPIO_PCA953X_IRQ
143 struct mutex irq_lock;
144 u8 irq_mask[MAX_BANK];
145 u8 irq_stat[MAX_BANK];
146 u8 irq_trig_raise[MAX_BANK];
147 u8 irq_trig_fall[MAX_BANK];
150 struct i2c_client *client;
151 struct gpio_chip gpio_chip;
152 const char *const *names;
153 unsigned long driver_data;
154 struct regulator *regulator;
156 const struct pca953x_reg_config *regs;
158 int (*write_regs)(struct pca953x_chip *, int, u8 *);
159 int (*read_regs)(struct pca953x_chip *, int, u8 *);
162 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
166 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
167 int offset = off / BANK_SZ;
169 ret = i2c_smbus_read_byte_data(chip->client,
170 (reg << bank_shift) + offset);
174 dev_err(&chip->client->dev, "failed reading register\n");
181 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
185 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
186 int offset = off / BANK_SZ;
188 ret = i2c_smbus_write_byte_data(chip->client,
189 (reg << bank_shift) + offset, val);
192 dev_err(&chip->client->dev, "failed writing register\n");
199 static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
201 return i2c_smbus_write_byte_data(chip->client, reg, *val);
204 static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
206 u16 word = get_unaligned((u16 *)val);
208 return i2c_smbus_write_word_data(chip->client, reg << 1, word);
211 static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
215 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]);
219 return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]);
222 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
224 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
226 return i2c_smbus_write_i2c_block_data(chip->client,
227 (reg << bank_shift) | REG_ADDR_AI,
231 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
235 ret = chip->write_regs(chip, reg, val);
237 dev_err(&chip->client->dev, "failed writing register\n");
244 static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
248 ret = i2c_smbus_read_byte_data(chip->client, reg);
254 static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
258 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
259 put_unaligned(ret, (u16 *)val);
264 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
266 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
268 return i2c_smbus_read_i2c_block_data(chip->client,
269 (reg << bank_shift) | REG_ADDR_AI,
273 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
277 ret = chip->read_regs(chip, reg, val);
279 dev_err(&chip->client->dev, "failed reading register\n");
286 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
288 struct pca953x_chip *chip = gpiochip_get_data(gc);
292 mutex_lock(&chip->i2c_lock);
293 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
295 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
299 chip->reg_direction[off / BANK_SZ] = reg_val;
301 mutex_unlock(&chip->i2c_lock);
305 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
306 unsigned off, int val)
308 struct pca953x_chip *chip = gpiochip_get_data(gc);
312 mutex_lock(&chip->i2c_lock);
313 /* set output level */
315 reg_val = chip->reg_output[off / BANK_SZ]
316 | (1u << (off % BANK_SZ));
318 reg_val = chip->reg_output[off / BANK_SZ]
319 & ~(1u << (off % BANK_SZ));
321 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
325 chip->reg_output[off / BANK_SZ] = reg_val;
328 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
329 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
333 chip->reg_direction[off / BANK_SZ] = reg_val;
335 mutex_unlock(&chip->i2c_lock);
339 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
341 struct pca953x_chip *chip = gpiochip_get_data(gc);
345 mutex_lock(&chip->i2c_lock);
346 ret = pca953x_read_single(chip, chip->regs->input, ®_val, off);
347 mutex_unlock(&chip->i2c_lock);
349 /* NOTE: diagnostic already emitted; that's all we should
350 * do unless gpio_*_value_cansleep() calls become different
351 * from their nonsleeping siblings (and report faults).
356 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
359 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
361 struct pca953x_chip *chip = gpiochip_get_data(gc);
365 mutex_lock(&chip->i2c_lock);
367 reg_val = chip->reg_output[off / BANK_SZ]
368 | (1u << (off % BANK_SZ));
370 reg_val = chip->reg_output[off / BANK_SZ]
371 & ~(1u << (off % BANK_SZ));
373 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
377 chip->reg_output[off / BANK_SZ] = reg_val;
379 mutex_unlock(&chip->i2c_lock);
382 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
384 struct pca953x_chip *chip = gpiochip_get_data(gc);
388 mutex_lock(&chip->i2c_lock);
389 ret = pca953x_read_single(chip, chip->regs->direction, ®_val, off);
390 mutex_unlock(&chip->i2c_lock);
394 return !!(reg_val & (1u << (off % BANK_SZ)));
397 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
398 unsigned long *mask, unsigned long *bits)
400 struct pca953x_chip *chip = gpiochip_get_data(gc);
401 unsigned int bank_mask, bank_val;
402 int bank_shift, bank;
403 u8 reg_val[MAX_BANK];
406 bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
408 mutex_lock(&chip->i2c_lock);
409 memcpy(reg_val, chip->reg_output, NBANK(chip));
410 for (bank = 0; bank < NBANK(chip); bank++) {
411 bank_mask = mask[bank / sizeof(*mask)] >>
412 ((bank % sizeof(*mask)) * 8);
414 bank_val = bits[bank / sizeof(*bits)] >>
415 ((bank % sizeof(*bits)) * 8);
416 bank_val &= bank_mask;
417 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
421 ret = i2c_smbus_write_i2c_block_data(chip->client,
422 chip->regs->output << bank_shift,
423 NBANK(chip), reg_val);
427 memcpy(chip->reg_output, reg_val, NBANK(chip));
429 mutex_unlock(&chip->i2c_lock);
432 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
434 struct gpio_chip *gc;
436 gc = &chip->gpio_chip;
438 gc->direction_input = pca953x_gpio_direction_input;
439 gc->direction_output = pca953x_gpio_direction_output;
440 gc->get = pca953x_gpio_get_value;
441 gc->set = pca953x_gpio_set_value;
442 gc->get_direction = pca953x_gpio_get_direction;
443 gc->set_multiple = pca953x_gpio_set_multiple;
444 gc->can_sleep = true;
446 gc->base = chip->gpio_start;
448 gc->label = chip->client->name;
449 gc->parent = &chip->client->dev;
450 gc->owner = THIS_MODULE;
451 gc->names = chip->names;
454 #ifdef CONFIG_GPIO_PCA953X_IRQ
455 static void pca953x_irq_mask(struct irq_data *d)
457 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
458 struct pca953x_chip *chip = gpiochip_get_data(gc);
460 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
463 static void pca953x_irq_unmask(struct irq_data *d)
465 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
466 struct pca953x_chip *chip = gpiochip_get_data(gc);
468 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
471 static void pca953x_irq_bus_lock(struct irq_data *d)
473 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
474 struct pca953x_chip *chip = gpiochip_get_data(gc);
476 mutex_lock(&chip->irq_lock);
479 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
481 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
482 struct pca953x_chip *chip = gpiochip_get_data(gc);
485 u8 invert_irq_mask[MAX_BANK];
487 if (chip->driver_data & PCA_PCAL) {
488 /* Enable latch on interrupt-enabled inputs */
489 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
491 for (i = 0; i < NBANK(chip); i++)
492 invert_irq_mask[i] = ~chip->irq_mask[i];
494 /* Unmask enabled interrupts */
495 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
498 /* Look for any newly setup interrupt */
499 for (i = 0; i < NBANK(chip); i++) {
500 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
501 new_irqs &= ~chip->reg_direction[i];
504 level = __ffs(new_irqs);
505 pca953x_gpio_direction_input(&chip->gpio_chip,
506 level + (BANK_SZ * i));
507 new_irqs &= ~(1 << level);
511 mutex_unlock(&chip->irq_lock);
514 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
516 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
517 struct pca953x_chip *chip = gpiochip_get_data(gc);
518 int bank_nb = d->hwirq / BANK_SZ;
519 u8 mask = 1 << (d->hwirq % BANK_SZ);
521 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
522 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
527 if (type & IRQ_TYPE_EDGE_FALLING)
528 chip->irq_trig_fall[bank_nb] |= mask;
530 chip->irq_trig_fall[bank_nb] &= ~mask;
532 if (type & IRQ_TYPE_EDGE_RISING)
533 chip->irq_trig_raise[bank_nb] |= mask;
535 chip->irq_trig_raise[bank_nb] &= ~mask;
540 static void pca953x_irq_shutdown(struct irq_data *d)
542 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
543 u8 mask = 1 << (d->hwirq % BANK_SZ);
545 chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
546 chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
549 static struct irq_chip pca953x_irq_chip = {
551 .irq_mask = pca953x_irq_mask,
552 .irq_unmask = pca953x_irq_unmask,
553 .irq_bus_lock = pca953x_irq_bus_lock,
554 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
555 .irq_set_type = pca953x_irq_set_type,
556 .irq_shutdown = pca953x_irq_shutdown,
559 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
561 u8 cur_stat[MAX_BANK];
562 u8 old_stat[MAX_BANK];
563 bool pending_seen = false;
564 bool trigger_seen = false;
565 u8 trigger[MAX_BANK];
568 if (chip->driver_data & PCA_PCAL) {
569 /* Read the current interrupt status from the device */
570 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
574 /* Check latched inputs and clear interrupt status */
575 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
579 for (i = 0; i < NBANK(chip); i++) {
580 /* Apply filter for rising/falling edge selection */
581 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
582 (cur_stat[i] & chip->irq_trig_raise[i]);
583 pending[i] &= trigger[i];
591 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
595 /* Remove output pins from the equation */
596 for (i = 0; i < NBANK(chip); i++)
597 cur_stat[i] &= chip->reg_direction[i];
599 memcpy(old_stat, chip->irq_stat, NBANK(chip));
601 for (i = 0; i < NBANK(chip); i++) {
602 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
610 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
612 for (i = 0; i < NBANK(chip); i++) {
613 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
614 (cur_stat[i] & chip->irq_trig_raise[i]);
615 pending[i] &= trigger[i];
623 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
625 struct pca953x_chip *chip = devid;
626 u8 pending[MAX_BANK];
628 unsigned nhandled = 0;
631 if (!pca953x_irq_pending(chip, pending))
634 for (i = 0; i < NBANK(chip); i++) {
636 level = __ffs(pending[i]);
637 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
638 level + (BANK_SZ * i)));
639 pending[i] &= ~(1 << level);
644 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
647 static int pca953x_irq_setup(struct pca953x_chip *chip,
650 struct i2c_client *client = chip->client;
653 if (client->irq && irq_base != -1
654 && (chip->driver_data & PCA_INT)) {
655 ret = pca953x_read_regs(chip,
656 chip->regs->input, chip->irq_stat);
661 * There is no way to know which GPIO line generated the
662 * interrupt. We have to rely on the previous read for
665 for (i = 0; i < NBANK(chip); i++)
666 chip->irq_stat[i] &= chip->reg_direction[i];
667 mutex_init(&chip->irq_lock);
669 ret = devm_request_threaded_irq(&client->dev,
673 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
675 dev_name(&client->dev), chip);
677 dev_err(&client->dev, "failed to request irq %d\n",
682 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip,
688 dev_err(&client->dev,
689 "could not connect irqchip to gpiochip\n");
693 gpiochip_set_nested_irqchip(&chip->gpio_chip,
701 #else /* CONFIG_GPIO_PCA953X_IRQ */
702 static int pca953x_irq_setup(struct pca953x_chip *chip,
705 struct i2c_client *client = chip->client;
707 if (irq_base != -1 && (chip->driver_data & PCA_INT))
708 dev_warn(&client->dev, "interrupt support not compiled in\n");
714 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
719 chip->regs = &pca953x_regs;
721 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
725 ret = pca953x_read_regs(chip, chip->regs->direction,
726 chip->reg_direction);
730 /* set platform specific polarity inversion */
732 memset(val, 0xFF, NBANK(chip));
734 memset(val, 0, NBANK(chip));
736 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
741 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
746 chip->regs = &pca957x_regs;
748 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
751 ret = pca953x_read_regs(chip, chip->regs->direction,
752 chip->reg_direction);
756 /* set platform specific polarity inversion */
758 memset(val, 0xFF, NBANK(chip));
760 memset(val, 0, NBANK(chip));
761 ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
765 /* To enable register 6, 7 to control pull up and pull down */
766 memset(val, 0x02, NBANK(chip));
767 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
776 static const struct of_device_id pca953x_dt_ids[];
778 static int pca953x_probe(struct i2c_client *client,
779 const struct i2c_device_id *i2c_id)
781 struct pca953x_platform_data *pdata;
782 struct pca953x_chip *chip;
786 struct regulator *reg;
788 chip = devm_kzalloc(&client->dev,
789 sizeof(struct pca953x_chip), GFP_KERNEL);
793 pdata = dev_get_platdata(&client->dev);
795 irq_base = pdata->irq_base;
796 chip->gpio_start = pdata->gpio_base;
797 invert = pdata->invert;
798 chip->names = pdata->names;
800 struct gpio_desc *reset_gpio;
802 chip->gpio_start = -1;
806 * See if we need to de-assert a reset pin.
808 * There is no known ACPI-enabled platforms that are
809 * using "reset" GPIO. Otherwise any of those platform
810 * must use _DSD method with corresponding property.
812 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
814 if (IS_ERR(reset_gpio))
815 return PTR_ERR(reset_gpio);
818 chip->client = client;
820 reg = devm_regulator_get(&client->dev, "vcc");
823 if (ret != -EPROBE_DEFER)
824 dev_err(&client->dev, "reg get err: %d\n", ret);
827 ret = regulator_enable(reg);
829 dev_err(&client->dev, "reg en err: %d\n", ret);
832 chip->regulator = reg;
835 chip->driver_data = i2c_id->driver_data;
837 const struct acpi_device_id *acpi_id;
838 struct device *dev = &client->dev;
840 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
841 if (!chip->driver_data) {
842 acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
848 chip->driver_data = acpi_id->driver_data;
852 mutex_init(&chip->i2c_lock);
854 * In case we have an i2c-mux controlled by a GPIO provided by an
855 * expander using the same driver higher on the device tree, read the
856 * i2c adapter nesting depth and use the retrieved value as lockdep
857 * subclass for chip->i2c_lock.
859 * REVISIT: This solution is not complete. It protects us from lockdep
860 * false positives when the expander controlling the i2c-mux is on
861 * a different level on the device tree, but not when it's on the same
862 * level on a different branch (in which case the subclass number
863 * would be the same).
865 * TODO: Once a correct solution is developed, a similar fix should be
866 * applied to all other i2c-controlled GPIO expanders (and potentially
869 lockdep_set_subclass(&chip->i2c_lock,
870 i2c_adapter_depth(client->adapter));
872 /* initialize cached registers from their original values.
873 * we can't share this chip with another i2c master.
875 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
877 if (chip->gpio_chip.ngpio <= 8) {
878 chip->write_regs = pca953x_write_regs_8;
879 chip->read_regs = pca953x_read_regs_8;
880 } else if (chip->gpio_chip.ngpio >= 24) {
881 chip->write_regs = pca953x_write_regs_24;
882 chip->read_regs = pca953x_read_regs_24;
884 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
885 chip->write_regs = pca953x_write_regs_16;
887 chip->write_regs = pca957x_write_regs_16;
888 chip->read_regs = pca953x_read_regs_16;
891 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
892 ret = device_pca953x_init(chip, invert);
894 ret = device_pca957x_init(chip, invert);
898 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
902 ret = pca953x_irq_setup(chip, irq_base);
906 if (pdata && pdata->setup) {
907 ret = pdata->setup(client, chip->gpio_chip.base,
908 chip->gpio_chip.ngpio, pdata->context);
910 dev_warn(&client->dev, "setup failed, %d\n", ret);
913 i2c_set_clientdata(client, chip);
917 regulator_disable(chip->regulator);
921 static int pca953x_remove(struct i2c_client *client)
923 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
924 struct pca953x_chip *chip = i2c_get_clientdata(client);
927 if (pdata && pdata->teardown) {
928 ret = pdata->teardown(client, chip->gpio_chip.base,
929 chip->gpio_chip.ngpio, pdata->context);
931 dev_err(&client->dev, "%s failed, %d\n",
937 regulator_disable(chip->regulator);
942 /* convenience to stop overlong match-table lines */
943 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
944 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
946 static const struct of_device_id pca953x_dt_ids[] = {
947 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
948 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
949 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
950 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
951 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
952 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
953 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
954 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
955 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
956 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
957 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
958 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
959 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
960 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
962 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
963 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
965 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
966 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
967 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
968 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
969 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
971 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
972 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
973 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
974 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
975 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
977 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
979 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
983 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
985 static struct i2c_driver pca953x_driver = {
988 .of_match_table = pca953x_dt_ids,
989 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
991 .probe = pca953x_probe,
992 .remove = pca953x_remove,
993 .id_table = pca953x_id,
996 static int __init pca953x_init(void)
998 return i2c_add_driver(&pca953x_driver);
1000 /* register after i2c postcore initcall and before
1001 * subsys initcalls that may rely on these GPIOs
1003 subsys_initcall(pca953x_init);
1005 static void __exit pca953x_exit(void)
1007 i2c_del_driver(&pca953x_driver);
1009 module_exit(pca953x_exit);
1011 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1012 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1013 MODULE_LICENSE("GPL");