gpio: pca953x: define masks for addressing common and extended registers
[platform/kernel/linux-rpi.git] / drivers / gpio / gpio-pca953x.c
1 /*
2  *  PCA953x 4/8/16/24/40 bit I/O ports
3  *
4  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5  *  Copyright (C) 2007 Marvell International Ltd.
6  *
7  *  Derived from drivers/i2c/chips/pca9539.c
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; version 2 of the License.
12  */
13
14 #include <linux/acpi.h>
15 #include <linux/gpio.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_data/pca953x.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
25
26 #include <asm/unaligned.h>
27
28 #define PCA953X_INPUT           0x00
29 #define PCA953X_OUTPUT          0x01
30 #define PCA953X_INVERT          0x02
31 #define PCA953X_DIRECTION       0x03
32
33 #define REG_ADDR_AI             0x80
34
35 #define PCA957X_IN              0x00
36 #define PCA957X_INVRT           0x01
37 #define PCA957X_BKEN            0x02
38 #define PCA957X_PUPD            0x03
39 #define PCA957X_CFG             0x04
40 #define PCA957X_OUT             0x05
41 #define PCA957X_MSK             0x06
42 #define PCA957X_INTS            0x07
43
44 #define PCAL953X_OUT_STRENGTH   0x20
45 #define PCAL953X_IN_LATCH       0x22
46 #define PCAL953X_PULL_EN        0x23
47 #define PCAL953X_PULL_SEL       0x24
48 #define PCAL953X_INT_MASK       0x25
49 #define PCAL953X_INT_STAT       0x26
50 #define PCAL953X_OUT_CONF       0x27
51
52 #define PCAL6524_INT_EDGE       0x28
53 #define PCAL6524_INT_CLR        0x2a
54 #define PCAL6524_IN_STATUS      0x2b
55 #define PCAL6524_OUT_INDCONF    0x2c
56 #define PCAL6524_DEBOUNCE       0x2d
57
58 #define PCA_GPIO_MASK           0x00FF
59
60 #define PCAL_GPIO_MASK          0x1f
61 #define PCAL_PINCTRL_MASK       0xe0
62
63 #define PCA_INT                 0x0100
64 #define PCA_PCAL                0x0200
65 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
66 #define PCA953X_TYPE            0x1000
67 #define PCA957X_TYPE            0x2000
68 #define PCA_TYPE_MASK           0xF000
69
70 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
71
72 static const struct i2c_device_id pca953x_id[] = {
73         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
74         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
75         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
76         { "pca9536", 4  | PCA953X_TYPE, },
77         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
78         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
79         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
80         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
81         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
82         { "pca9556", 8  | PCA953X_TYPE, },
83         { "pca9557", 8  | PCA953X_TYPE, },
84         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
85         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
86         { "pca9698", 40 | PCA953X_TYPE, },
87
88         { "pcal6524", 24 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
89         { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
90
91         { "max7310", 8  | PCA953X_TYPE, },
92         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
93         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
94         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
95         { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
96         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
97         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
98         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
99         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
100         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
101         { "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
102         { "xra1202", 8  | PCA953X_TYPE },
103         { }
104 };
105 MODULE_DEVICE_TABLE(i2c, pca953x_id);
106
107 static const struct acpi_device_id pca953x_acpi_ids[] = {
108         { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
109         { }
110 };
111 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
112
113 #define MAX_BANK 5
114 #define BANK_SZ 8
115
116 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
117
118 struct pca953x_reg_config {
119         int direction;
120         int output;
121         int input;
122 };
123
124 static const struct pca953x_reg_config pca953x_regs = {
125         .direction = PCA953X_DIRECTION,
126         .output = PCA953X_OUTPUT,
127         .input = PCA953X_INPUT,
128 };
129
130 static const struct pca953x_reg_config pca957x_regs = {
131         .direction = PCA957X_CFG,
132         .output = PCA957X_OUT,
133         .input = PCA957X_IN,
134 };
135
136 struct pca953x_chip {
137         unsigned gpio_start;
138         u8 reg_output[MAX_BANK];
139         u8 reg_direction[MAX_BANK];
140         struct mutex i2c_lock;
141
142 #ifdef CONFIG_GPIO_PCA953X_IRQ
143         struct mutex irq_lock;
144         u8 irq_mask[MAX_BANK];
145         u8 irq_stat[MAX_BANK];
146         u8 irq_trig_raise[MAX_BANK];
147         u8 irq_trig_fall[MAX_BANK];
148 #endif
149
150         struct i2c_client *client;
151         struct gpio_chip gpio_chip;
152         const char *const *names;
153         unsigned long driver_data;
154         struct regulator *regulator;
155
156         const struct pca953x_reg_config *regs;
157
158         int (*write_regs)(struct pca953x_chip *, int, u8 *);
159         int (*read_regs)(struct pca953x_chip *, int, u8 *);
160 };
161
162 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
163                                 int off)
164 {
165         int ret;
166         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
167         int offset = off / BANK_SZ;
168
169         ret = i2c_smbus_read_byte_data(chip->client,
170                                 (reg << bank_shift) + offset);
171         *val = ret;
172
173         if (ret < 0) {
174                 dev_err(&chip->client->dev, "failed reading register\n");
175                 return ret;
176         }
177
178         return 0;
179 }
180
181 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
182                                 int off)
183 {
184         int ret;
185         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
186         int offset = off / BANK_SZ;
187
188         ret = i2c_smbus_write_byte_data(chip->client,
189                                         (reg << bank_shift) + offset, val);
190
191         if (ret < 0) {
192                 dev_err(&chip->client->dev, "failed writing register\n");
193                 return ret;
194         }
195
196         return 0;
197 }
198
199 static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
200 {
201         return i2c_smbus_write_byte_data(chip->client, reg, *val);
202 }
203
204 static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
205 {
206         u16 word = get_unaligned((u16 *)val);
207
208         return i2c_smbus_write_word_data(chip->client, reg << 1, word);
209 }
210
211 static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
212 {
213         int ret;
214
215         ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]);
216         if (ret < 0)
217                 return ret;
218
219         return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]);
220 }
221
222 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
223 {
224         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
225
226         return i2c_smbus_write_i2c_block_data(chip->client,
227                                               (reg << bank_shift) | REG_ADDR_AI,
228                                               NBANK(chip), val);
229 }
230
231 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
232 {
233         int ret = 0;
234
235         ret = chip->write_regs(chip, reg, val);
236         if (ret < 0) {
237                 dev_err(&chip->client->dev, "failed writing register\n");
238                 return ret;
239         }
240
241         return 0;
242 }
243
244 static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
245 {
246         int ret;
247
248         ret = i2c_smbus_read_byte_data(chip->client, reg);
249         *val = ret;
250
251         return ret;
252 }
253
254 static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
255 {
256         int ret;
257
258         ret = i2c_smbus_read_word_data(chip->client, reg << 1);
259         put_unaligned(ret, (u16 *)val);
260
261         return ret;
262 }
263
264 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
265 {
266         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
267
268         return i2c_smbus_read_i2c_block_data(chip->client,
269                                              (reg << bank_shift) | REG_ADDR_AI,
270                                              NBANK(chip), val);
271 }
272
273 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
274 {
275         int ret;
276
277         ret = chip->read_regs(chip, reg, val);
278         if (ret < 0) {
279                 dev_err(&chip->client->dev, "failed reading register\n");
280                 return ret;
281         }
282
283         return 0;
284 }
285
286 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
287 {
288         struct pca953x_chip *chip = gpiochip_get_data(gc);
289         u8 reg_val;
290         int ret;
291
292         mutex_lock(&chip->i2c_lock);
293         reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
294
295         ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
296         if (ret)
297                 goto exit;
298
299         chip->reg_direction[off / BANK_SZ] = reg_val;
300 exit:
301         mutex_unlock(&chip->i2c_lock);
302         return ret;
303 }
304
305 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
306                 unsigned off, int val)
307 {
308         struct pca953x_chip *chip = gpiochip_get_data(gc);
309         u8 reg_val;
310         int ret;
311
312         mutex_lock(&chip->i2c_lock);
313         /* set output level */
314         if (val)
315                 reg_val = chip->reg_output[off / BANK_SZ]
316                         | (1u << (off % BANK_SZ));
317         else
318                 reg_val = chip->reg_output[off / BANK_SZ]
319                         & ~(1u << (off % BANK_SZ));
320
321         ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
322         if (ret)
323                 goto exit;
324
325         chip->reg_output[off / BANK_SZ] = reg_val;
326
327         /* then direction */
328         reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
329         ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
330         if (ret)
331                 goto exit;
332
333         chip->reg_direction[off / BANK_SZ] = reg_val;
334 exit:
335         mutex_unlock(&chip->i2c_lock);
336         return ret;
337 }
338
339 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
340 {
341         struct pca953x_chip *chip = gpiochip_get_data(gc);
342         u32 reg_val;
343         int ret;
344
345         mutex_lock(&chip->i2c_lock);
346         ret = pca953x_read_single(chip, chip->regs->input, &reg_val, off);
347         mutex_unlock(&chip->i2c_lock);
348         if (ret < 0) {
349                 /* NOTE:  diagnostic already emitted; that's all we should
350                  * do unless gpio_*_value_cansleep() calls become different
351                  * from their nonsleeping siblings (and report faults).
352                  */
353                 return 0;
354         }
355
356         return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
357 }
358
359 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
360 {
361         struct pca953x_chip *chip = gpiochip_get_data(gc);
362         u8 reg_val;
363         int ret;
364
365         mutex_lock(&chip->i2c_lock);
366         if (val)
367                 reg_val = chip->reg_output[off / BANK_SZ]
368                         | (1u << (off % BANK_SZ));
369         else
370                 reg_val = chip->reg_output[off / BANK_SZ]
371                         & ~(1u << (off % BANK_SZ));
372
373         ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
374         if (ret)
375                 goto exit;
376
377         chip->reg_output[off / BANK_SZ] = reg_val;
378 exit:
379         mutex_unlock(&chip->i2c_lock);
380 }
381
382 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
383 {
384         struct pca953x_chip *chip = gpiochip_get_data(gc);
385         u32 reg_val;
386         int ret;
387
388         mutex_lock(&chip->i2c_lock);
389         ret = pca953x_read_single(chip, chip->regs->direction, &reg_val, off);
390         mutex_unlock(&chip->i2c_lock);
391         if (ret < 0)
392                 return ret;
393
394         return !!(reg_val & (1u << (off % BANK_SZ)));
395 }
396
397 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
398                                       unsigned long *mask, unsigned long *bits)
399 {
400         struct pca953x_chip *chip = gpiochip_get_data(gc);
401         unsigned int bank_mask, bank_val;
402         int bank_shift, bank;
403         u8 reg_val[MAX_BANK];
404         int ret;
405
406         bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
407
408         mutex_lock(&chip->i2c_lock);
409         memcpy(reg_val, chip->reg_output, NBANK(chip));
410         for (bank = 0; bank < NBANK(chip); bank++) {
411                 bank_mask = mask[bank / sizeof(*mask)] >>
412                            ((bank % sizeof(*mask)) * 8);
413                 if (bank_mask) {
414                         bank_val = bits[bank / sizeof(*bits)] >>
415                                   ((bank % sizeof(*bits)) * 8);
416                         bank_val &= bank_mask;
417                         reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
418                 }
419         }
420
421         ret = i2c_smbus_write_i2c_block_data(chip->client,
422                                              chip->regs->output << bank_shift,
423                                              NBANK(chip), reg_val);
424         if (ret)
425                 goto exit;
426
427         memcpy(chip->reg_output, reg_val, NBANK(chip));
428 exit:
429         mutex_unlock(&chip->i2c_lock);
430 }
431
432 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
433 {
434         struct gpio_chip *gc;
435
436         gc = &chip->gpio_chip;
437
438         gc->direction_input  = pca953x_gpio_direction_input;
439         gc->direction_output = pca953x_gpio_direction_output;
440         gc->get = pca953x_gpio_get_value;
441         gc->set = pca953x_gpio_set_value;
442         gc->get_direction = pca953x_gpio_get_direction;
443         gc->set_multiple = pca953x_gpio_set_multiple;
444         gc->can_sleep = true;
445
446         gc->base = chip->gpio_start;
447         gc->ngpio = gpios;
448         gc->label = chip->client->name;
449         gc->parent = &chip->client->dev;
450         gc->owner = THIS_MODULE;
451         gc->names = chip->names;
452 }
453
454 #ifdef CONFIG_GPIO_PCA953X_IRQ
455 static void pca953x_irq_mask(struct irq_data *d)
456 {
457         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
458         struct pca953x_chip *chip = gpiochip_get_data(gc);
459
460         chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
461 }
462
463 static void pca953x_irq_unmask(struct irq_data *d)
464 {
465         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
466         struct pca953x_chip *chip = gpiochip_get_data(gc);
467
468         chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
469 }
470
471 static void pca953x_irq_bus_lock(struct irq_data *d)
472 {
473         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
474         struct pca953x_chip *chip = gpiochip_get_data(gc);
475
476         mutex_lock(&chip->irq_lock);
477 }
478
479 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
480 {
481         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
482         struct pca953x_chip *chip = gpiochip_get_data(gc);
483         u8 new_irqs;
484         int level, i;
485         u8 invert_irq_mask[MAX_BANK];
486
487         if (chip->driver_data & PCA_PCAL) {
488                 /* Enable latch on interrupt-enabled inputs */
489                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
490
491                 for (i = 0; i < NBANK(chip); i++)
492                         invert_irq_mask[i] = ~chip->irq_mask[i];
493
494                 /* Unmask enabled interrupts */
495                 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
496         }
497
498         /* Look for any newly setup interrupt */
499         for (i = 0; i < NBANK(chip); i++) {
500                 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
501                 new_irqs &= ~chip->reg_direction[i];
502
503                 while (new_irqs) {
504                         level = __ffs(new_irqs);
505                         pca953x_gpio_direction_input(&chip->gpio_chip,
506                                                         level + (BANK_SZ * i));
507                         new_irqs &= ~(1 << level);
508                 }
509         }
510
511         mutex_unlock(&chip->irq_lock);
512 }
513
514 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
515 {
516         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
517         struct pca953x_chip *chip = gpiochip_get_data(gc);
518         int bank_nb = d->hwirq / BANK_SZ;
519         u8 mask = 1 << (d->hwirq % BANK_SZ);
520
521         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
522                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
523                         d->irq, type);
524                 return -EINVAL;
525         }
526
527         if (type & IRQ_TYPE_EDGE_FALLING)
528                 chip->irq_trig_fall[bank_nb] |= mask;
529         else
530                 chip->irq_trig_fall[bank_nb] &= ~mask;
531
532         if (type & IRQ_TYPE_EDGE_RISING)
533                 chip->irq_trig_raise[bank_nb] |= mask;
534         else
535                 chip->irq_trig_raise[bank_nb] &= ~mask;
536
537         return 0;
538 }
539
540 static void pca953x_irq_shutdown(struct irq_data *d)
541 {
542         struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
543         u8 mask = 1 << (d->hwirq % BANK_SZ);
544
545         chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
546         chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
547 }
548
549 static struct irq_chip pca953x_irq_chip = {
550         .name                   = "pca953x",
551         .irq_mask               = pca953x_irq_mask,
552         .irq_unmask             = pca953x_irq_unmask,
553         .irq_bus_lock           = pca953x_irq_bus_lock,
554         .irq_bus_sync_unlock    = pca953x_irq_bus_sync_unlock,
555         .irq_set_type           = pca953x_irq_set_type,
556         .irq_shutdown           = pca953x_irq_shutdown,
557 };
558
559 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
560 {
561         u8 cur_stat[MAX_BANK];
562         u8 old_stat[MAX_BANK];
563         bool pending_seen = false;
564         bool trigger_seen = false;
565         u8 trigger[MAX_BANK];
566         int ret, i;
567
568         if (chip->driver_data & PCA_PCAL) {
569                 /* Read the current interrupt status from the device */
570                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
571                 if (ret)
572                         return false;
573
574                 /* Check latched inputs and clear interrupt status */
575                 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
576                 if (ret)
577                         return false;
578
579                 for (i = 0; i < NBANK(chip); i++) {
580                         /* Apply filter for rising/falling edge selection */
581                         pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
582                                 (cur_stat[i] & chip->irq_trig_raise[i]);
583                         pending[i] &= trigger[i];
584                         if (pending[i])
585                                 pending_seen = true;
586                 }
587
588                 return pending_seen;
589         }
590
591         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
592         if (ret)
593                 return false;
594
595         /* Remove output pins from the equation */
596         for (i = 0; i < NBANK(chip); i++)
597                 cur_stat[i] &= chip->reg_direction[i];
598
599         memcpy(old_stat, chip->irq_stat, NBANK(chip));
600
601         for (i = 0; i < NBANK(chip); i++) {
602                 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
603                 if (trigger[i])
604                         trigger_seen = true;
605         }
606
607         if (!trigger_seen)
608                 return false;
609
610         memcpy(chip->irq_stat, cur_stat, NBANK(chip));
611
612         for (i = 0; i < NBANK(chip); i++) {
613                 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
614                         (cur_stat[i] & chip->irq_trig_raise[i]);
615                 pending[i] &= trigger[i];
616                 if (pending[i])
617                         pending_seen = true;
618         }
619
620         return pending_seen;
621 }
622
623 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
624 {
625         struct pca953x_chip *chip = devid;
626         u8 pending[MAX_BANK];
627         u8 level;
628         unsigned nhandled = 0;
629         int i;
630
631         if (!pca953x_irq_pending(chip, pending))
632                 return IRQ_NONE;
633
634         for (i = 0; i < NBANK(chip); i++) {
635                 while (pending[i]) {
636                         level = __ffs(pending[i]);
637                         handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
638                                                         level + (BANK_SZ * i)));
639                         pending[i] &= ~(1 << level);
640                         nhandled++;
641                 }
642         }
643
644         return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
645 }
646
647 static int pca953x_irq_setup(struct pca953x_chip *chip,
648                              int irq_base)
649 {
650         struct i2c_client *client = chip->client;
651         int ret, i;
652
653         if (client->irq && irq_base != -1
654                         && (chip->driver_data & PCA_INT)) {
655                 ret = pca953x_read_regs(chip,
656                                         chip->regs->input, chip->irq_stat);
657                 if (ret)
658                         return ret;
659
660                 /*
661                  * There is no way to know which GPIO line generated the
662                  * interrupt.  We have to rely on the previous read for
663                  * this purpose.
664                  */
665                 for (i = 0; i < NBANK(chip); i++)
666                         chip->irq_stat[i] &= chip->reg_direction[i];
667                 mutex_init(&chip->irq_lock);
668
669                 ret = devm_request_threaded_irq(&client->dev,
670                                         client->irq,
671                                            NULL,
672                                            pca953x_irq_handler,
673                                            IRQF_TRIGGER_LOW | IRQF_ONESHOT |
674                                                    IRQF_SHARED,
675                                            dev_name(&client->dev), chip);
676                 if (ret) {
677                         dev_err(&client->dev, "failed to request irq %d\n",
678                                 client->irq);
679                         return ret;
680                 }
681
682                 ret =  gpiochip_irqchip_add_nested(&chip->gpio_chip,
683                                                    &pca953x_irq_chip,
684                                                    irq_base,
685                                                    handle_simple_irq,
686                                                    IRQ_TYPE_NONE);
687                 if (ret) {
688                         dev_err(&client->dev,
689                                 "could not connect irqchip to gpiochip\n");
690                         return ret;
691                 }
692
693                 gpiochip_set_nested_irqchip(&chip->gpio_chip,
694                                             &pca953x_irq_chip,
695                                             client->irq);
696         }
697
698         return 0;
699 }
700
701 #else /* CONFIG_GPIO_PCA953X_IRQ */
702 static int pca953x_irq_setup(struct pca953x_chip *chip,
703                              int irq_base)
704 {
705         struct i2c_client *client = chip->client;
706
707         if (irq_base != -1 && (chip->driver_data & PCA_INT))
708                 dev_warn(&client->dev, "interrupt support not compiled in\n");
709
710         return 0;
711 }
712 #endif
713
714 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
715 {
716         int ret;
717         u8 val[MAX_BANK];
718
719         chip->regs = &pca953x_regs;
720
721         ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
722         if (ret)
723                 goto out;
724
725         ret = pca953x_read_regs(chip, chip->regs->direction,
726                                 chip->reg_direction);
727         if (ret)
728                 goto out;
729
730         /* set platform specific polarity inversion */
731         if (invert)
732                 memset(val, 0xFF, NBANK(chip));
733         else
734                 memset(val, 0, NBANK(chip));
735
736         ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
737 out:
738         return ret;
739 }
740
741 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
742 {
743         int ret;
744         u8 val[MAX_BANK];
745
746         chip->regs = &pca957x_regs;
747
748         ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
749         if (ret)
750                 goto out;
751         ret = pca953x_read_regs(chip, chip->regs->direction,
752                                 chip->reg_direction);
753         if (ret)
754                 goto out;
755
756         /* set platform specific polarity inversion */
757         if (invert)
758                 memset(val, 0xFF, NBANK(chip));
759         else
760                 memset(val, 0, NBANK(chip));
761         ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
762         if (ret)
763                 goto out;
764
765         /* To enable register 6, 7 to control pull up and pull down */
766         memset(val, 0x02, NBANK(chip));
767         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
768         if (ret)
769                 goto out;
770
771         return 0;
772 out:
773         return ret;
774 }
775
776 static const struct of_device_id pca953x_dt_ids[];
777
778 static int pca953x_probe(struct i2c_client *client,
779                                    const struct i2c_device_id *i2c_id)
780 {
781         struct pca953x_platform_data *pdata;
782         struct pca953x_chip *chip;
783         int irq_base = 0;
784         int ret;
785         u32 invert = 0;
786         struct regulator *reg;
787
788         chip = devm_kzalloc(&client->dev,
789                         sizeof(struct pca953x_chip), GFP_KERNEL);
790         if (chip == NULL)
791                 return -ENOMEM;
792
793         pdata = dev_get_platdata(&client->dev);
794         if (pdata) {
795                 irq_base = pdata->irq_base;
796                 chip->gpio_start = pdata->gpio_base;
797                 invert = pdata->invert;
798                 chip->names = pdata->names;
799         } else {
800                 struct gpio_desc *reset_gpio;
801
802                 chip->gpio_start = -1;
803                 irq_base = 0;
804
805                 /*
806                  * See if we need to de-assert a reset pin.
807                  *
808                  * There is no known ACPI-enabled platforms that are
809                  * using "reset" GPIO. Otherwise any of those platform
810                  * must use _DSD method with corresponding property.
811                  */
812                 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
813                                                      GPIOD_OUT_LOW);
814                 if (IS_ERR(reset_gpio))
815                         return PTR_ERR(reset_gpio);
816         }
817
818         chip->client = client;
819
820         reg = devm_regulator_get(&client->dev, "vcc");
821         if (IS_ERR(reg)) {
822                 ret = PTR_ERR(reg);
823                 if (ret != -EPROBE_DEFER)
824                         dev_err(&client->dev, "reg get err: %d\n", ret);
825                 return ret;
826         }
827         ret = regulator_enable(reg);
828         if (ret) {
829                 dev_err(&client->dev, "reg en err: %d\n", ret);
830                 return ret;
831         }
832         chip->regulator = reg;
833
834         if (i2c_id) {
835                 chip->driver_data = i2c_id->driver_data;
836         } else {
837                 const struct acpi_device_id *acpi_id;
838                 struct device *dev = &client->dev;
839
840                 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
841                 if (!chip->driver_data) {
842                         acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
843                         if (!acpi_id) {
844                                 ret = -ENODEV;
845                                 goto err_exit;
846                         }
847
848                         chip->driver_data = acpi_id->driver_data;
849                 }
850         }
851
852         mutex_init(&chip->i2c_lock);
853         /*
854          * In case we have an i2c-mux controlled by a GPIO provided by an
855          * expander using the same driver higher on the device tree, read the
856          * i2c adapter nesting depth and use the retrieved value as lockdep
857          * subclass for chip->i2c_lock.
858          *
859          * REVISIT: This solution is not complete. It protects us from lockdep
860          * false positives when the expander controlling the i2c-mux is on
861          * a different level on the device tree, but not when it's on the same
862          * level on a different branch (in which case the subclass number
863          * would be the same).
864          *
865          * TODO: Once a correct solution is developed, a similar fix should be
866          * applied to all other i2c-controlled GPIO expanders (and potentially
867          * regmap-i2c).
868          */
869         lockdep_set_subclass(&chip->i2c_lock,
870                              i2c_adapter_depth(client->adapter));
871
872         /* initialize cached registers from their original values.
873          * we can't share this chip with another i2c master.
874          */
875         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
876
877         if (chip->gpio_chip.ngpio <= 8) {
878                 chip->write_regs = pca953x_write_regs_8;
879                 chip->read_regs = pca953x_read_regs_8;
880         } else if (chip->gpio_chip.ngpio >= 24) {
881                 chip->write_regs = pca953x_write_regs_24;
882                 chip->read_regs = pca953x_read_regs_24;
883         } else {
884                 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
885                         chip->write_regs = pca953x_write_regs_16;
886                 else
887                         chip->write_regs = pca957x_write_regs_16;
888                 chip->read_regs = pca953x_read_regs_16;
889         }
890
891         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
892                 ret = device_pca953x_init(chip, invert);
893         else
894                 ret = device_pca957x_init(chip, invert);
895         if (ret)
896                 goto err_exit;
897
898         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
899         if (ret)
900                 goto err_exit;
901
902         ret = pca953x_irq_setup(chip, irq_base);
903         if (ret)
904                 goto err_exit;
905
906         if (pdata && pdata->setup) {
907                 ret = pdata->setup(client, chip->gpio_chip.base,
908                                 chip->gpio_chip.ngpio, pdata->context);
909                 if (ret < 0)
910                         dev_warn(&client->dev, "setup failed, %d\n", ret);
911         }
912
913         i2c_set_clientdata(client, chip);
914         return 0;
915
916 err_exit:
917         regulator_disable(chip->regulator);
918         return ret;
919 }
920
921 static int pca953x_remove(struct i2c_client *client)
922 {
923         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
924         struct pca953x_chip *chip = i2c_get_clientdata(client);
925         int ret;
926
927         if (pdata && pdata->teardown) {
928                 ret = pdata->teardown(client, chip->gpio_chip.base,
929                                 chip->gpio_chip.ngpio, pdata->context);
930                 if (ret < 0)
931                         dev_err(&client->dev, "%s failed, %d\n",
932                                         "teardown", ret);
933         } else {
934                 ret = 0;
935         }
936
937         regulator_disable(chip->regulator);
938
939         return ret;
940 }
941
942 /* convenience to stop overlong match-table lines */
943 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
944 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
945
946 static const struct of_device_id pca953x_dt_ids[] = {
947         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
948         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
949         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
950         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
951         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
952         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
953         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
954         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
955         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
956         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
957         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
958         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
959         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
960         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
961
962         { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
963         { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
964
965         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
966         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
967         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
968         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
969         { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
970
971         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
972         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
973         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
974         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
975         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
976
977         { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
978
979         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
980         { }
981 };
982
983 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
984
985 static struct i2c_driver pca953x_driver = {
986         .driver = {
987                 .name   = "pca953x",
988                 .of_match_table = pca953x_dt_ids,
989                 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
990         },
991         .probe          = pca953x_probe,
992         .remove         = pca953x_remove,
993         .id_table       = pca953x_id,
994 };
995
996 static int __init pca953x_init(void)
997 {
998         return i2c_add_driver(&pca953x_driver);
999 }
1000 /* register after i2c postcore initcall and before
1001  * subsys initcalls that may rely on these GPIOs
1002  */
1003 subsys_initcall(pca953x_init);
1004
1005 static void __exit pca953x_exit(void)
1006 {
1007         i2c_del_driver(&pca953x_driver);
1008 }
1009 module_exit(pca953x_exit);
1010
1011 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1012 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1013 MODULE_LICENSE("GPL");