2 # GPIO infrastructure and drivers
8 bool "Enable Driver Model for GPIO drivers"
11 Enable driver model for GPIO access. The standard GPIO
12 interface (gpio_get_value(), etc.) is then implemented by
13 the GPIO uclass. Drivers provide methods to query the
14 particular GPIOs that they provide. The uclass interface
15 is defined in include/asm-generic/gpio.h.
18 bool "Altera PIO driver"
21 Select this to enable PIO for Altera devices. Please find
22 details on the "Embedded Peripherals IP User Guide" of Altera.
25 bool "BCM6345 GPIO driver"
26 depends on DM_GPIO && ARCH_BMIPS
28 This driver supports the GPIO banks on BCM6345 SoCs.
31 bool "DWAPB GPIO driver"
32 depends on DM && DM_GPIO
35 Support for the Designware APB GPIO driver.
38 bool "AT91 PIO GPIO driver"
42 Say yes here to select AT91 PIO GPIO driver. AT91 PIO
43 controller manages up to 32 fully programmable input/output
44 lines. Each I/O line may be dedicated as a general-purpose
45 I/O or be assigned to a function of an embedded peripheral.
46 The assignment to a function of an embedded peripheral is
47 the responsibility of AT91 Pinctrl driver. This driver is
48 responsible for the general-purpose I/O.
51 bool "ATMEL PIO4 driver"
55 Say yes here to support the Atmel PIO4 driver.
56 The PIO4 is new version of Atmel PIO controller, which manages
57 up to 128 fully programmable input/output lines. Each I/O line
58 may be dedicated as a general purpose I/O or be assigned to
59 a function of an embedded peripheral.
61 config INTEL_BROADWELL_GPIO
62 bool "Intel Broadwell GPIO driver"
65 This driver supports Broadwell U devices which have an expanded
66 GPIO feature set. The difference is large enough to merit a separate
67 driver from the common Intel ICH6 driver. It supports a total of
68 95 GPIOs which can be configured from the device tree.
70 config INTEL_ICH6_GPIO
71 bool "Intel ICH6 compatible legacy GPIO driver"
74 Say yes here to select Intel ICH6 compatible legacy GPIO driver.
77 bool "i.MX7ULP RGPIO2P driver"
81 This driver supports i.MX7ULP Rapid GPIO2P controller.
84 bool "HSDK CREG GPIO griver"
88 This driver supports CREG GPIOs on Synopsys HSDK SOC.
91 bool "LPC32XX GPIO driver"
95 Support for the LPC32XX GPIO driver.
98 bool "Qualcomm GPIO driver"
102 Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
103 This controller have single bank (default name "soc"), every
104 gpio has it's own set of registers.
105 Only simple GPIO operations are supported (get/set, change of
106 direction and checking pin function).
112 bool "TI OMAP GPIO driver"
113 depends on ARCH_OMAP2PLUS
116 Support GPIO controllers on the TI OMAP3/4/5 and related (such as
117 AM335x/AM43xx/AM57xx/DRA7xx/etc) families of SoCs.
120 bool "Enable the pca953x command"
122 Deprecated: This should be converted to driver model.
124 This command provides access to a pca953x GPIO device using the
125 legacy GPIO interface. Several subcommands are provided which mirror
126 the standard 'gpio' command. It should use that instead.
129 bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
130 depends on DM_GPIO && PMIC_PM8916
132 Support for GPIO pins and power/reset buttons found on
133 Qualcomm PM8916 PMIC.
134 Default name for GPIO bank is "pm8916".
135 Power and reset buttons are placed in "pm8916_key" bank and
136 have gpio numbers 0 and 1 respectively.
139 bool "PCF8575 I2C GPIO Expander driver"
140 depends on DM_GPIO && DM_I2C
142 Support for PCF8575 I2C 16-bit GPIO expander. Most of these
143 chips are from NXP and TI.
146 bool "Renesas RCar GPIO driver"
147 depends on DM_GPIO && ARCH_RMOBILE
149 This driver supports the GPIO banks on Renesas RCar SoCs.
152 bool "Rockchip GPIO driver"
155 Support GPIO access on Rockchip SoCs. The GPIOs are arranged into
156 a number of banks (different for each SoC type) each with 32 GPIOs.
157 The GPIOs for a device are defined in the device tree with one node
161 bool "Enable sandbox GPIO driver"
162 depends on SANDBOX && DM && DM_GPIO
164 This driver supports some simulated GPIOs which can be adjusted
165 using 'back door' functions like sandbox_gpio_set_value(). Then the
166 GPIOs can be inspected through the normal get_get_value()
167 interface. The purpose of this is to allow GPIOs to be used as
168 normal in sandbox, perhaps with test code actually driving the
169 behaviour of those GPIOs.
171 config SANDBOX_GPIO_COUNT
172 int "Number of sandbox GPIOs"
173 depends on SANDBOX_GPIO
176 The sandbox driver can support any number of GPIOs. Generally these
177 are specified using the device tree. But you can also have a number
178 of 'anonymous' GPIOs that do not belong to any device or bank.
179 Select a suitable value depending on your needs.
182 bool "tca642x - Command to access tca642x state"
184 DEPRECATED - This needs conversion to driver model
186 This provides a way to looking at the pin state of this device.
187 This mirrors the 'gpio' command and that should be used in preference
191 bool "Tegra20..210 GPIO driver"
194 Support for the GPIO controller contained in NVIDIA Tegra20 through
198 bool "Tegra186 GPIO driver"
201 Support for the GPIO controller contained in NVIDIA Tegra186. This
202 covers both the "main" and "AON" controller instances, even though
203 they have slightly different register layout.
207 depends on ARCH_UNIPHIER
209 Say yes here to support UniPhier GPIOs.
212 bool "Vybrid GPIO driver"
216 Say yes here to support Vybrid vf610 GPIOs.
219 bool "Microchip PIC32 GPIO driver"
220 depends on DM_GPIO && MACH_PIC32
223 Say yes here to support Microchip PIC32 GPIOs.
226 bool "ST STM32 GPIO driver"
227 depends on DM_GPIO && STM32
230 Device model driver support for STM32 GPIO controller. It should be
231 usable on many stm32 families like stm32f4 & stm32H7.
235 bool "Marvell MVEBU GPIO driver"
236 depends on DM_GPIO && ARCH_MVEBU
239 Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs.
242 bool "Zynq GPIO driver"
243 depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP)
246 Supports GPIO access on Zynq SoC.
249 bool "74x164 serial-in/parallel-out 8-bits shift register"
252 Driver for 74x164 compatible serial-in/parallel-out 8-outputs
253 shift registers, such as 74lv165, 74hc595.
254 This driver can be used to provide access to more gpio outputs.
257 bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports"
260 Say yes here to provide access to several register-oriented
261 SMBus I/O expanders, made mostly by NXP or TI. Compatible
264 4 bits: pca9536, pca9537
266 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554,
267 pca9556, pca9557, pca9574, tca6408, xra1202
269 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575,
274 40 bits: pca9505, pca9698
276 Now, max 24 bits chips and PCA953X compatible chips are
280 bool "Freescale MPC8XXX GPIO driver"
283 This driver supports the built-in GPIO controller of MPC8XXX CPUs.
284 Each GPIO bank is identified by its own entry in the device tree,
287 gpio-controller@fc00 {
289 compatible = "fsl,pq3-gpio";
293 By default, each bank is assumed to have 32 GPIOs, but the ngpios
294 setting is honored, so the number of GPIOs for each bank is
295 configurable to match the actual GPIO count of the SoC (e.g. the
296 32/32/23 banks of the P1022 SoC).
298 Aside from the standard functions of input/output mode, and output
299 value setting, the open-drain feature, which can configure individual
300 GPIOs to work as open-drain outputs, is supported.