1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/device.h>
5 #include <linux/errno.h>
7 #include <linux/fsi-sbefifo.h>
10 #include <linux/kernel.h>
11 #include <linux/list.h>
12 #include <linux/miscdevice.h>
13 #include <linux/module.h>
14 #include <linux/mutex.h>
15 #include <linux/fsi-occ.h>
17 #include <linux/of_device.h>
18 #include <linux/platform_device.h>
19 #include <linux/sched.h>
20 #include <linux/slab.h>
21 #include <linux/uaccess.h>
22 #include <asm/unaligned.h>
24 #define OCC_SRAM_BYTES 4096
25 #define OCC_CMD_DATA_BYTES 4090
26 #define OCC_RESP_DATA_BYTES 4089
28 #define OCC_P9_SRAM_CMD_ADDR 0xFFFBE000
29 #define OCC_P9_SRAM_RSP_ADDR 0xFFFBF000
31 #define OCC_P10_SRAM_CMD_ADDR 0xFFFFD000
32 #define OCC_P10_SRAM_RSP_ADDR 0xFFFFE000
34 #define OCC_P10_SRAM_MODE 0x58 /* Normal mode, OCB channel 2 */
37 * Assume we don't have much FFDC, if we do we'll overflow and
38 * fail the command. This needs to be big enough for simple
41 #define OCC_SBE_STATUS_WORDS 32
43 #define OCC_TIMEOUT_MS 1000
44 #define OCC_CMD_IN_PRG_WAIT_MS 50
46 enum versions { occ_p9, occ_p10 };
50 struct device *sbefifo;
53 enum versions version;
54 struct miscdevice mdev;
55 struct mutex occ_lock;
58 #define to_occ(x) container_of((x), struct occ, mdev)
65 u8 data[OCC_RESP_DATA_BYTES + 2]; /* two bytes checksum */
76 #define to_client(x) container_of((x), struct occ_client, xfr)
78 static DEFINE_IDA(occ_ida);
80 static int occ_open(struct inode *inode, struct file *file)
82 struct occ_client *client = kzalloc(sizeof(*client), GFP_KERNEL);
83 struct miscdevice *mdev = file->private_data;
84 struct occ *occ = to_occ(mdev);
89 client->buffer = (u8 *)__get_free_page(GFP_KERNEL);
90 if (!client->buffer) {
96 mutex_init(&client->lock);
97 file->private_data = client;
99 /* We allocate a 1-page buffer, make sure it all fits */
100 BUILD_BUG_ON((OCC_CMD_DATA_BYTES + 3) > PAGE_SIZE);
101 BUILD_BUG_ON((OCC_RESP_DATA_BYTES + 7) > PAGE_SIZE);
106 static ssize_t occ_read(struct file *file, char __user *buf, size_t len,
109 struct occ_client *client = file->private_data;
115 if (len > OCC_SRAM_BYTES)
118 mutex_lock(&client->lock);
120 /* This should not be possible ... */
121 if (WARN_ON_ONCE(client->read_offset > client->data_size)) {
126 /* Grab how much data we have to read */
127 rc = min(len, client->data_size - client->read_offset);
128 if (copy_to_user(buf, client->buffer + client->read_offset, rc))
131 client->read_offset += rc;
134 mutex_unlock(&client->lock);
139 static ssize_t occ_write(struct file *file, const char __user *buf,
140 size_t len, loff_t *offset)
142 struct occ_client *client = file->private_data;
143 size_t rlen, data_length;
151 if (len > (OCC_CMD_DATA_BYTES + 3) || len < 3)
154 mutex_lock(&client->lock);
156 /* Construct the command */
157 cmd = client->buffer;
159 /* Sequence number (we could increment and compare with response) */
163 * Copy the user command (assume user data follows the occ command
165 * byte 0: command type
166 * bytes 1-2: data length (msb first)
169 if (copy_from_user(&cmd[1], buf, len)) {
174 /* Extract data length */
175 data_length = (cmd[2] << 8) + cmd[3];
176 if (data_length > OCC_CMD_DATA_BYTES) {
181 /* Calculate checksum */
182 for (i = 0; i < data_length + 4; ++i)
185 cmd[data_length + 4] = checksum >> 8;
186 cmd[data_length + 5] = checksum & 0xFF;
190 rc = fsi_occ_submit(client->occ->dev, cmd, data_length + 6, cmd,
195 /* Set read tracking data */
196 client->data_size = rlen;
197 client->read_offset = 0;
203 mutex_unlock(&client->lock);
208 static int occ_release(struct inode *inode, struct file *file)
210 struct occ_client *client = file->private_data;
212 free_page((unsigned long)client->buffer);
218 static const struct file_operations occ_fops = {
219 .owner = THIS_MODULE,
223 .release = occ_release,
226 static int occ_verify_checksum(struct occ_response *resp, u16 data_length)
228 /* Fetch the two bytes after the data for the checksum. */
229 u16 checksum_resp = get_unaligned_be16(&resp->data[data_length]);
233 checksum = resp->seq_no;
234 checksum += resp->cmd_type;
235 checksum += resp->return_status;
236 checksum += (data_length >> 8) + (data_length & 0xFF);
238 for (i = 0; i < data_length; ++i)
239 checksum += resp->data[i];
241 if (checksum != checksum_resp)
247 static int occ_getsram(struct occ *occ, u32 offset, void *data, ssize_t len)
249 u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
250 size_t cmd_len, resp_len, resp_data_len;
251 __be32 *resp, cmd[6];
255 * Magic sequence to do SBE getsram command. SBE will fetch data from
256 * specified SRAM address.
258 switch (occ->version) {
262 cmd[2] = cpu_to_be32(1); /* Normal mode */
263 cmd[3] = cpu_to_be32(OCC_P9_SRAM_RSP_ADDR + offset);
268 cmd[2] = cpu_to_be32(OCC_P10_SRAM_MODE);
270 cmd[4] = cpu_to_be32(OCC_P10_SRAM_RSP_ADDR + offset);
274 cmd[0] = cpu_to_be32(cmd_len);
275 cmd[1] = cpu_to_be32(SBEFIFO_CMD_GET_OCC_SRAM);
276 cmd[4 + idx] = cpu_to_be32(data_len);
278 resp_len = (data_len >> 2) + OCC_SBE_STATUS_WORDS;
279 resp = kzalloc(resp_len << 2, GFP_KERNEL);
283 rc = sbefifo_submit(occ->sbefifo, cmd, cmd_len, resp, &resp_len);
287 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_GET_OCC_SRAM,
288 resp, resp_len, &resp_len);
292 resp_data_len = be32_to_cpu(resp[resp_len - 1]);
293 if (resp_data_len != data_len) {
294 dev_err(occ->dev, "SRAM read expected %d bytes got %zd\n",
295 data_len, resp_data_len);
298 memcpy(data, resp, len);
302 /* Convert positive SBEI status */
304 dev_err(occ->dev, "SRAM read returned failure status: %08x\n",
313 static int occ_putsram(struct occ *occ, const void *data, ssize_t len)
315 size_t cmd_len, buf_len, resp_len, resp_data_len;
316 u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
320 cmd_len = (occ->version == occ_p10) ? 6 : 5;
323 * We use the same buffer for command and response, make
324 * sure it's big enough
326 resp_len = OCC_SBE_STATUS_WORDS;
327 cmd_len += data_len >> 2;
328 buf_len = max(cmd_len, resp_len);
329 buf = kzalloc(buf_len << 2, GFP_KERNEL);
334 * Magic sequence to do SBE putsram command. SBE will transfer
335 * data to specified SRAM address.
337 buf[0] = cpu_to_be32(cmd_len);
338 buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
340 switch (occ->version) {
343 buf[2] = cpu_to_be32(1); /* Normal mode */
344 buf[3] = cpu_to_be32(OCC_P9_SRAM_CMD_ADDR);
348 buf[2] = cpu_to_be32(OCC_P10_SRAM_MODE);
350 buf[4] = cpu_to_be32(OCC_P10_SRAM_CMD_ADDR);
354 buf[4 + idx] = cpu_to_be32(data_len);
355 memcpy(&buf[5 + idx], data, len);
357 rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len);
361 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
362 buf, resp_len, &resp_len);
367 dev_err(occ->dev, "SRAM write response length invalid: %zd\n",
371 resp_data_len = be32_to_cpu(buf[0]);
372 if (resp_data_len != data_len) {
374 "SRAM write expected %d bytes got %zd\n",
375 data_len, resp_data_len);
381 /* Convert positive SBEI status */
383 dev_err(occ->dev, "SRAM write returned failure status: %08x\n",
392 static int occ_trigger_attn(struct occ *occ)
394 __be32 buf[OCC_SBE_STATUS_WORDS];
395 size_t cmd_len, resp_len, resp_data_len;
398 BUILD_BUG_ON(OCC_SBE_STATUS_WORDS < 8);
399 resp_len = OCC_SBE_STATUS_WORDS;
401 switch (occ->version) {
405 buf[2] = cpu_to_be32(3); /* Circular mode */
411 buf[2] = cpu_to_be32(0xd0); /* Circular mode, OCB Channel 1 */
417 buf[0] = cpu_to_be32(cmd_len); /* Chip-op length in words */
418 buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
419 buf[4 + idx] = cpu_to_be32(8); /* Data length in bytes */
420 buf[5 + idx] = cpu_to_be32(0x20010000); /* Trigger OCC attention */
423 rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len);
427 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
428 buf, resp_len, &resp_len);
433 dev_err(occ->dev, "SRAM attn response length invalid: %zd\n",
437 resp_data_len = be32_to_cpu(buf[0]);
438 if (resp_data_len != 8) {
440 "SRAM attn expected 8 bytes got %zd\n",
447 /* Convert positive SBEI status */
449 dev_err(occ->dev, "SRAM attn returned failure status: %08x\n",
457 int fsi_occ_submit(struct device *dev, const void *request, size_t req_len,
458 void *response, size_t *resp_len)
460 const unsigned long timeout = msecs_to_jiffies(OCC_TIMEOUT_MS);
461 const unsigned long wait_time =
462 msecs_to_jiffies(OCC_CMD_IN_PRG_WAIT_MS);
463 struct occ *occ = dev_get_drvdata(dev);
464 struct occ_response *resp = response;
466 u16 resp_data_length;
474 dev_dbg(dev, "Bad resplen %zd\n", *resp_len);
478 mutex_lock(&occ->occ_lock);
480 /* Extract the seq_no from the command (first byte) */
481 seq_no = *(const u8 *)request;
482 rc = occ_putsram(occ, request, req_len);
486 rc = occ_trigger_attn(occ);
490 /* Read occ response header */
493 rc = occ_getsram(occ, 0, resp, 8);
497 if (resp->return_status == OCC_RESP_CMD_IN_PRG ||
498 resp->seq_no != seq_no) {
501 if (time_after(jiffies, start + timeout)) {
502 dev_err(occ->dev, "resp timeout status=%02x "
503 "resp seq_no=%d our seq_no=%d\n",
504 resp->return_status, resp->seq_no,
509 set_current_state(TASK_UNINTERRUPTIBLE);
510 schedule_timeout(wait_time);
514 /* Extract size of response data */
515 resp_data_length = get_unaligned_be16(&resp->data_length);
517 /* Message size is data length + 5 bytes header + 2 bytes checksum */
518 if ((resp_data_length + 7) > *resp_len) {
523 dev_dbg(dev, "resp_status=%02x resp_data_len=%d\n",
524 resp->return_status, resp_data_length);
527 if (resp_data_length > 1) {
528 /* already got 3 bytes resp, also need 2 bytes checksum */
529 rc = occ_getsram(occ, 8, &resp->data[3], resp_data_length - 1);
534 *resp_len = resp_data_length + 7;
535 rc = occ_verify_checksum(resp, resp_data_length);
538 mutex_unlock(&occ->occ_lock);
542 EXPORT_SYMBOL_GPL(fsi_occ_submit);
544 static int occ_unregister_child(struct device *dev, void *data)
546 struct platform_device *hwmon_dev = to_platform_device(dev);
548 platform_device_unregister(hwmon_dev);
553 static int occ_probe(struct platform_device *pdev)
558 struct platform_device *hwmon_dev;
559 struct device *dev = &pdev->dev;
560 struct platform_device_info hwmon_dev_info = {
565 occ = devm_kzalloc(dev, sizeof(*occ), GFP_KERNEL);
569 occ->version = (uintptr_t)of_device_get_match_data(dev);
571 occ->sbefifo = dev->parent;
572 mutex_init(&occ->occ_lock);
575 rc = of_property_read_u32(dev->of_node, "reg", ®);
577 /* make sure we don't have a duplicate from dts */
578 occ->idx = ida_simple_get(&occ_ida, reg, reg + 1,
581 occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX,
584 occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX,
588 occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX, GFP_KERNEL);
591 platform_set_drvdata(pdev, occ);
593 snprintf(occ->name, sizeof(occ->name), "occ%d", occ->idx);
594 occ->mdev.fops = &occ_fops;
595 occ->mdev.minor = MISC_DYNAMIC_MINOR;
596 occ->mdev.name = occ->name;
597 occ->mdev.parent = dev;
599 rc = misc_register(&occ->mdev);
601 dev_err(dev, "failed to register miscdevice: %d\n", rc);
602 ida_simple_remove(&occ_ida, occ->idx);
606 hwmon_dev_info.id = occ->idx;
607 hwmon_dev = platform_device_register_full(&hwmon_dev_info);
608 if (IS_ERR(hwmon_dev))
609 dev_warn(dev, "failed to create hwmon device\n");
614 static int occ_remove(struct platform_device *pdev)
616 struct occ *occ = platform_get_drvdata(pdev);
618 misc_deregister(&occ->mdev);
620 device_for_each_child(&pdev->dev, NULL, occ_unregister_child);
622 ida_simple_remove(&occ_ida, occ->idx);
627 static const struct of_device_id occ_match[] = {
629 .compatible = "ibm,p9-occ",
630 .data = (void *)occ_p9
633 .compatible = "ibm,p10-occ",
634 .data = (void *)occ_p10
639 static struct platform_driver occ_driver = {
642 .of_match_table = occ_match,
645 .remove = occ_remove,
648 static int occ_init(void)
650 return platform_driver_register(&occ_driver);
653 static void occ_exit(void)
655 platform_driver_unregister(&occ_driver);
657 ida_destroy(&occ_ida);
660 module_init(occ_init);
661 module_exit(occ_exit);
663 MODULE_AUTHOR("Eddie James <eajames@linux.ibm.com>");
664 MODULE_DESCRIPTION("BMC P9 OCC driver");
665 MODULE_LICENSE("GPL");