1 // SPDX-License-Identifier: GPL-2.0+
4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
7 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
9 * ispVM functions adapted from Lattice's ispmVMEmbedded code:
10 * Copyright 2009 Lattice Semiconductor Corp.
18 static lattice_board_specific_func *pfns;
19 static const char *fpga_image;
20 static unsigned long read_bytes;
21 static unsigned long bufsize;
22 static unsigned short expectedCRC;
25 * External variables and functions declared in ivm_core.c module.
27 extern unsigned short g_usCalculatedCRC;
28 extern unsigned short g_usDataType;
29 extern unsigned char *g_pucIntelBuffer;
30 extern unsigned char *g_pucHeapMemory;
31 extern unsigned short g_iHeapCounter;
32 extern unsigned short g_iHEAPSize;
33 extern unsigned short g_usIntelDataIndex;
34 extern unsigned short g_usIntelBufferSize;
35 extern char *const g_szSupportedVersions[];
41 * Users must implement a delay to observe a_usTimeDelay, where
42 * bit 15 of the a_usTimeDelay defines the unit.
46 * a_usTimeDelay = 0x0001 = 1 microsecond delay.
47 * a_usTimeDelay = 0x8001 = 1 millisecond delay.
49 * This subroutine is called upon to provide a delay from 1 millisecond to a few
50 * hundreds milliseconds each time.
51 * It is understood that due to a_usTimeDelay is defined as unsigned short, a 16
52 * bits integer, this function is restricted to produce a delay to 64000
53 * micro-seconds or 32000 milli-second maximum. The VME file will never pass on
54 * to this function a delay time > those maximum number. If it needs more than
55 * those maximum, the VME file will launch the delay function several times to
56 * realize a larger delay time cummulatively.
57 * It is perfectly alright to provide a longer delay than required. It is not
58 * acceptable if the delay is shorter.
60 void ispVMDelay(unsigned short delay)
63 delay = (delay & ~0x8000) * 1000;
67 void writePort(unsigned char a_ucPins, unsigned char a_ucValue)
69 a_ucValue = a_ucValue ? 1 : 0;
73 pfns->jtag_set_tdi(a_ucValue);
76 pfns->jtag_set_tck(a_ucValue);
79 pfns->jtag_set_tms(a_ucValue);
82 printf("%s: requested unknown pin\n", __func__);
86 unsigned char readPort(void)
88 return pfns->jtag_get_tdo();
93 writePort(g_ucPinTCK, 0x01);
94 writePort(g_ucPinTCK, 0x00);
97 void calibration(void)
99 /* Apply 2 pulses to TCK. */
100 writePort(g_ucPinTCK, 0x00);
101 writePort(g_ucPinTCK, 0x01);
102 writePort(g_ucPinTCK, 0x00);
103 writePort(g_ucPinTCK, 0x01);
104 writePort(g_ucPinTCK, 0x00);
108 /* Apply 2 pulses to TCK. */
109 writePort(g_ucPinTCK, 0x01);
110 writePort(g_ucPinTCK, 0x00);
111 writePort(g_ucPinTCK, 0x01);
112 writePort(g_ucPinTCK, 0x00);
118 * Returns a byte to the caller. The returned byte depends on the
119 * g_usDataType register. If the HEAP_IN bit is set, then the byte
120 * is returned from the HEAP. If the LHEAP_IN bit is set, then
121 * the byte is returned from the intelligent buffer. Otherwise,
122 * the byte is returned directly from the VME file.
124 unsigned char GetByte(void)
126 unsigned char ucData;
127 unsigned int block_size = 4 * 1024;
129 if (g_usDataType & HEAP_IN) {
132 * Get data from repeat buffer.
135 if (g_iHeapCounter > g_iHEAPSize) {
144 ucData = g_pucHeapMemory[g_iHeapCounter++];
145 } else if (g_usDataType & LHEAP_IN) {
148 * Get data from intel buffer.
151 if (g_usIntelDataIndex >= g_usIntelBufferSize) {
155 ucData = g_pucIntelBuffer[g_usIntelDataIndex++];
157 if (read_bytes == bufsize) {
160 ucData = *fpga_image++;
163 if (!(read_bytes % block_size)) {
164 printf("Downloading FPGA %ld/%ld completed\r",
169 if (expectedCRC != 0) {
170 ispVMCalculateCRC32(ucData);
177 signed char ispVM(void)
179 char szFileVersion[9] = { 0 };
180 signed char cRetCode = 0;
181 signed char cIndex = 0;
182 signed char cVersionIndex = 0;
183 unsigned char ucReadByte = 0;
186 g_pucHeapMemory = NULL;
189 g_usIntelDataIndex = 0;
190 g_usIntelBufferSize = 0;
191 g_usCalculatedCRC = 0;
193 ucReadByte = GetByte();
194 switch (ucReadByte) {
196 crc = (unsigned char)GetByte();
201 for (cIndex = 0; cIndex < 8; cIndex++)
202 szFileVersion[cIndex] = GetByte();
206 szFileVersion[0] = (signed char) ucReadByte;
207 for (cIndex = 1; cIndex < 8; cIndex++)
208 szFileVersion[cIndex] = GetByte();
215 * Compare the VME file version against the supported version.
219 for (cVersionIndex = 0; g_szSupportedVersions[cVersionIndex] != 0;
221 for (cIndex = 0; cIndex < 8; cIndex++) {
222 if (szFileVersion[cIndex] !=
223 g_szSupportedVersions[cVersionIndex][cIndex]) {
224 cRetCode = VME_VERSION_FAILURE;
236 return VME_VERSION_FAILURE;
239 printf("VME file checked: starting downloading to FPGA\n");
243 cRetCode = ispVMCode();
249 if (cRetCode == 0 && expectedCRC != 0 &&
250 (expectedCRC != g_usCalculatedCRC)) {
251 printf("Expected CRC: 0x%.4X\n", expectedCRC);
252 printf("Calculated CRC: 0x%.4X\n", g_usCalculatedCRC);
253 return VME_CRC_FAILURE;
258 static int lattice_validate(Lattice_desc *desc, const char *fn)
263 if ((desc->family > min_lattice_type) &&
264 (desc->family < max_lattice_type)) {
265 if ((desc->iface > min_lattice_iface_type) &&
266 (desc->iface < max_lattice_iface_type)) {
270 printf("%s: NULL part size\n", fn);
273 printf("%s: Invalid Interface type, %d\n",
277 printf("%s: Invalid family type, %d\n",
281 printf("%s: NULL descriptor!\n", fn);
287 int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize)
289 int ret_val = FPGA_FAIL;
291 if (!lattice_validate(desc, (char *)__func__)) {
292 printf("%s: Invalid device descriptor\n", __func__);
294 pfns = desc->iface_fns;
296 switch (desc->family) {
301 debug("%s: Launching the Lattice ISPVME Loader:"
302 " addr %p size 0x%lx...\n",
303 __func__, fpga_image, bufsize);
306 printf("%s: error %d downloading FPGA image\n",
309 puts("FPGA downloaded successfully\n");
312 printf("%s: Unsupported family type, %d\n",
313 __func__, desc->family);
320 int lattice_dump(Lattice_desc *desc, const void *buf, size_t bsize)
322 puts("Dump not supported for Lattice FPGA\n");
328 int lattice_info(Lattice_desc *desc)
330 int ret_val = FPGA_FAIL;
332 if (lattice_validate(desc, (char *)__func__)) {
333 printf("Family: \t");
334 switch (desc->family) {
338 /* Add new family types here */
340 printf("Unknown family type, %d\n", desc->family);
343 puts("Interface type:\t");
344 switch (desc->iface) {
345 case lattice_jtag_mode:
348 /* Add new interface types here */
350 printf("Unsupported interface type, %d\n", desc->iface);
353 printf("Device Size: \t%d bytes\n",
356 if (desc->iface_fns) {
357 printf("Device Function Table @ 0x%p\n",
359 switch (desc->family) {
362 /* Add new family types here */
367 puts("No Device Function Table.\n");
371 printf("Model: \t%s\n", desc->desc);
373 ret_val = FPGA_SUCCESS;
375 printf("%s: Invalid device descriptor\n", __func__);