1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx Zynq MPSoC Firmware layer
5 * Copyright (C) 2014-2022 Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
8 * Davorin Mista <davorin.mista@aggios.com>
9 * Jolly Shah <jollys@xilinx.com>
10 * Rajan Vaja <rajanv@xilinx.com>
13 #include <linux/arm-smccc.h>
14 #include <linux/compiler.h>
15 #include <linux/device.h>
16 #include <linux/init.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
20 #include <linux/of_platform.h>
21 #include <linux/slab.h>
22 #include <linux/uaccess.h>
23 #include <linux/hashtable.h>
25 #include <linux/firmware/xlnx-zynqmp.h>
26 #include <linux/firmware/xlnx-event-manager.h>
27 #include "zynqmp-debug.h"
29 /* Max HashMap Order for PM API feature check (1<<7 = 128) */
30 #define PM_API_FEATURE_CHECK_MAX_ORDER 7
32 /* CRL registers and bitfields */
33 #define CRL_APB_BASE 0xFF5E0000U
34 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */
35 #define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U))
36 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */
37 #define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU
39 /* IOCTL/QUERY feature payload size */
40 #define FEATURE_PAYLOAD_SIZE 2
42 /* Firmware feature check version mask */
43 #define FIRMWARE_VERSION_MASK GENMASK(15, 0)
45 static bool feature_check_enabled;
46 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
47 static u32 ioctl_features[FEATURE_PAYLOAD_SIZE];
48 static u32 query_features[FEATURE_PAYLOAD_SIZE];
50 static struct platform_device *em_dev;
53 * struct zynqmp_devinfo - Structure for Zynqmp device instance
54 * @dev: Device Pointer
55 * @feature_conf_id: Feature conf id
57 struct zynqmp_devinfo {
63 * struct pm_api_feature_data - PM API Feature data
64 * @pm_api_id: PM API Id, used as key to index into hashmap
65 * @feature_status: status of PM API feature: valid, invalid
66 * @hentry: hlist_node that hooks this entry into hashtable
68 struct pm_api_feature_data {
71 struct hlist_node hentry;
74 static const struct mfd_cell firmware_devs[] = {
76 .name = "zynqmp_power_controller",
81 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes
82 * @ret_status: PMUFW return code
84 * Return: corresponding Linux error code
86 static int zynqmp_pm_ret_code(u32 ret_status)
90 case XST_PM_DOUBLE_REQ:
92 case XST_PM_NO_FEATURE:
94 case XST_PM_NO_ACCESS:
96 case XST_PM_ABORT_SUSPEND:
98 case XST_PM_MULT_USER:
100 case XST_PM_INTERNAL:
101 case XST_PM_CONFLICT:
102 case XST_PM_INVALID_NODE:
108 static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2,
115 * PM function call wrapper
116 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
118 static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail;
121 * do_fw_call_smc() - Call system-level platform management layer (SMC)
122 * @arg0: Argument 0 to SMC call
123 * @arg1: Argument 1 to SMC call
124 * @arg2: Argument 2 to SMC call
125 * @ret_payload: Returned value array
127 * Invoke platform management function via SMC call (no hypervisor present).
129 * Return: Returns status, either success or error+reason
131 static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
134 struct arm_smccc_res res;
136 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
139 ret_payload[0] = lower_32_bits(res.a0);
140 ret_payload[1] = upper_32_bits(res.a0);
141 ret_payload[2] = lower_32_bits(res.a1);
142 ret_payload[3] = upper_32_bits(res.a1);
145 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
149 * do_fw_call_hvc() - Call system-level platform management layer (HVC)
150 * @arg0: Argument 0 to HVC call
151 * @arg1: Argument 1 to HVC call
152 * @arg2: Argument 2 to HVC call
153 * @ret_payload: Returned value array
155 * Invoke platform management function via HVC
156 * HVC-based for communication through hypervisor
157 * (no direct communication with ATF).
159 * Return: Returns status, either success or error+reason
161 static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2,
164 struct arm_smccc_res res;
166 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
169 ret_payload[0] = lower_32_bits(res.a0);
170 ret_payload[1] = upper_32_bits(res.a0);
171 ret_payload[2] = lower_32_bits(res.a1);
172 ret_payload[3] = upper_32_bits(res.a1);
175 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
178 static int __do_feature_check_call(const u32 api_id, u32 *ret_payload)
183 smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
186 ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
190 ret = ret_payload[1];
195 static int do_feature_check_call(const u32 api_id)
198 u32 ret_payload[PAYLOAD_ARG_CNT];
199 struct pm_api_feature_data *feature_data;
201 /* Check for existing entry in hash table for given api */
202 hash_for_each_possible(pm_api_features_map, feature_data, hentry,
204 if (feature_data->pm_api_id == api_id)
205 return feature_data->feature_status;
208 /* Add new entry if not present */
209 feature_data = kmalloc(sizeof(*feature_data), GFP_KERNEL);
213 feature_data->pm_api_id = api_id;
214 ret = __do_feature_check_call(api_id, ret_payload);
216 feature_data->feature_status = ret;
217 hash_add(pm_api_features_map, &feature_data->hentry, api_id);
219 if (api_id == PM_IOCTL)
220 /* Store supported IOCTL IDs mask */
221 memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
222 else if (api_id == PM_QUERY_DATA)
223 /* Store supported QUERY IDs mask */
224 memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
228 EXPORT_SYMBOL_GPL(zynqmp_pm_feature);
231 * zynqmp_pm_feature() - Check whether given feature is supported or not and
232 * store supported IOCTL/QUERY ID mask
233 * @api_id: API ID to check
235 * Return: Returns status, either success or error+reason
237 int zynqmp_pm_feature(const u32 api_id)
241 if (!feature_check_enabled)
244 ret = do_feature_check_call(api_id);
250 * zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function
251 * is supported or not
252 * @api_id: PM_IOCTL or PM_QUERY_DATA
253 * @id: IOCTL or QUERY function IDs
255 * Return: Returns status, either success or error+reason
257 int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id)
262 /* Input arguments validation */
263 if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA))
266 /* Check feature check API version */
267 ret = do_feature_check_call(PM_FEATURE_CHECK);
271 /* Check if feature check version 2 is supported or not */
272 if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) {
274 * Call feature check for IOCTL/QUERY API to get IOCTL ID or
275 * QUERY ID feature status.
277 ret = do_feature_check_call(api_id);
281 bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features;
283 if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U)
291 EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported);
294 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
295 * caller function depending on the configuration
296 * @pm_api_id: Requested PM-API call
297 * @arg0: Argument 0 to requested PM-API call
298 * @arg1: Argument 1 to requested PM-API call
299 * @arg2: Argument 2 to requested PM-API call
300 * @arg3: Argument 3 to requested PM-API call
301 * @ret_payload: Returned value array
303 * Invoke platform management function for SMC or HVC call, depending on
305 * Following SMC Calling Convention (SMCCC) for SMC64:
306 * Pm Function Identifier,
307 * PM_SIP_SVC + PM_API_ID =
308 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
309 * ((SMC_64) << FUNCID_CC_SHIFT)
310 * ((SIP_START) << FUNCID_OEN_SHIFT)
311 * ((PM_API_ID) & FUNCID_NUM_MASK))
313 * PM_SIP_SVC - Registered ZynqMP SIP Service Call.
314 * PM_API_ID - Platform Management API ID.
316 * Return: Returns status, either success or error+reason
318 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
319 u32 arg2, u32 arg3, u32 *ret_payload)
322 * Added SIP service call Function Identifier
323 * Make sure to stay in x0 register
328 /* Check if feature is supported or not */
329 ret = zynqmp_pm_feature(pm_api_id);
333 smc_arg[0] = PM_SIP_SVC | pm_api_id;
334 smc_arg[1] = ((u64)arg1 << 32) | arg0;
335 smc_arg[2] = ((u64)arg3 << 32) | arg2;
337 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload);
340 static u32 pm_api_version;
341 static u32 pm_tz_version;
343 int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
347 ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset, 0, 0,
352 /* try old implementation as fallback strategy if above fails */
353 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_REGISTER_SGI, sgi_num,
358 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware
359 * @version: Returned version value
361 * Return: Returns status, either success or error+reason
363 int zynqmp_pm_get_api_version(u32 *version)
365 u32 ret_payload[PAYLOAD_ARG_CNT];
371 /* Check is PM API version already verified */
372 if (pm_api_version > 0) {
373 *version = pm_api_version;
376 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload);
377 *version = ret_payload[1];
381 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
384 * zynqmp_pm_get_chipid - Get silicon ID registers
385 * @idcode: IDCODE register
386 * @version: version register
388 * Return: Returns the status of the operation and the idcode and version
389 * registers in @idcode and @version.
391 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
393 u32 ret_payload[PAYLOAD_ARG_CNT];
396 if (!idcode || !version)
399 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
400 *idcode = ret_payload[1];
401 *version = ret_payload[2];
405 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
408 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
409 * @version: Returned version value
411 * Return: Returns status, either success or error+reason
413 static int zynqmp_pm_get_trustzone_version(u32 *version)
415 u32 ret_payload[PAYLOAD_ARG_CNT];
421 /* Check is PM trustzone version already verified */
422 if (pm_tz_version > 0) {
423 *version = pm_tz_version;
426 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0,
428 *version = ret_payload[1];
434 * get_set_conduit_method() - Choose SMC or HVC based communication
435 * @np: Pointer to the device_node structure
437 * Use SMC or HVC-based functions to communicate with EL2/EL3.
439 * Return: Returns 0 on success or error code
441 static int get_set_conduit_method(struct device_node *np)
445 if (of_property_read_string(np, "method", &method)) {
446 pr_warn("%s missing \"method\" property\n", __func__);
450 if (!strcmp("hvc", method)) {
451 do_fw_call = do_fw_call_hvc;
452 } else if (!strcmp("smc", method)) {
453 do_fw_call = do_fw_call_smc;
455 pr_warn("%s Invalid \"method\" property: %s\n",
464 * zynqmp_pm_query_data() - Get query data from firmware
465 * @qdata: Variable to the zynqmp_pm_query_data structure
466 * @out: Returned output value
468 * Return: Returns status, either success or error+reason
470 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
474 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1,
475 qdata.arg2, qdata.arg3, out);
478 * For clock name query, all bytes in SMC response are clock name
479 * characters and return code is always success. For invalid clocks,
480 * clock name bytes would be zeros.
482 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
484 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
487 * zynqmp_pm_clock_enable() - Enable the clock for given id
488 * @clock_id: ID of the clock to be enabled
490 * This function is used by master to enable the clock
491 * including peripherals and PLL clocks.
493 * Return: Returns status, either success or error+reason
495 int zynqmp_pm_clock_enable(u32 clock_id)
497 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL);
499 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
502 * zynqmp_pm_clock_disable() - Disable the clock for given id
503 * @clock_id: ID of the clock to be disable
505 * This function is used by master to disable the clock
506 * including peripherals and PLL clocks.
508 * Return: Returns status, either success or error+reason
510 int zynqmp_pm_clock_disable(u32 clock_id)
512 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL);
514 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
517 * zynqmp_pm_clock_getstate() - Get the clock state for given id
518 * @clock_id: ID of the clock to be queried
519 * @state: 1/0 (Enabled/Disabled)
521 * This function is used by master to get the state of clock
522 * including peripherals and PLL clocks.
524 * Return: Returns status, either success or error+reason
526 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
528 u32 ret_payload[PAYLOAD_ARG_CNT];
531 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0,
533 *state = ret_payload[1];
537 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
540 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id
541 * @clock_id: ID of the clock
542 * @divider: divider value
544 * This function is used by master to set divider for any clock
545 * to achieve desired rate.
547 * Return: Returns status, either success or error+reason
549 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
551 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider,
554 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
557 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id
558 * @clock_id: ID of the clock
559 * @divider: divider value
561 * This function is used by master to get divider values
564 * Return: Returns status, either success or error+reason
566 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
568 u32 ret_payload[PAYLOAD_ARG_CNT];
571 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0,
573 *divider = ret_payload[1];
577 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
580 * zynqmp_pm_clock_setrate() - Set the clock rate for given id
581 * @clock_id: ID of the clock
582 * @rate: rate value in hz
584 * This function is used by master to set rate for any clock.
586 * Return: Returns status, either success or error+reason
588 int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
590 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id,
595 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate);
598 * zynqmp_pm_clock_getrate() - Get the clock rate for given id
599 * @clock_id: ID of the clock
600 * @rate: rate value in hz
602 * This function is used by master to get rate
605 * Return: Returns status, either success or error+reason
607 int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
609 u32 ret_payload[PAYLOAD_ARG_CNT];
612 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0,
614 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1];
618 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);
621 * zynqmp_pm_clock_setparent() - Set the clock parent for given id
622 * @clock_id: ID of the clock
623 * @parent_id: parent id
625 * This function is used by master to set parent for any clock.
627 * Return: Returns status, either success or error+reason
629 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
631 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id,
632 parent_id, 0, 0, NULL);
634 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
637 * zynqmp_pm_clock_getparent() - Get the clock parent for given id
638 * @clock_id: ID of the clock
639 * @parent_id: parent id
641 * This function is used by master to get parent index
644 * Return: Returns status, either success or error+reason
646 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
648 u32 ret_payload[PAYLOAD_ARG_CNT];
651 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0,
653 *parent_id = ret_payload[1];
657 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
660 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode
662 * @clk_id: PLL clock ID
663 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT)
665 * This function sets PLL mode
667 * Return: Returns status, either success or error+reason
669 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
671 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE,
674 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
677 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode
679 * @clk_id: PLL clock ID
682 * This function return current PLL mode
684 * Return: Returns status, either success or error+reason
686 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
688 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE,
691 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
694 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data
696 * @clk_id: PLL clock ID
697 * @data: fraction data
699 * This function sets fraction data.
700 * It is valid for fraction mode only.
702 * Return: Returns status, either success or error+reason
704 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
706 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA,
709 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
712 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data
714 * @clk_id: PLL clock ID
715 * @data: fraction data
717 * This function returns fraction data value.
719 * Return: Returns status, either success or error+reason
721 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
723 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA,
726 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
729 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device
731 * @node_id: Node ID of the device
732 * @type: Type of tap delay to set (input/output)
733 * @value: Value to set fot the tap delay
735 * This function sets input/output tap delay for the SD device.
737 * Return: Returns status, either success or error+reason
739 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
741 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY,
744 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
747 * zynqmp_pm_sd_dll_reset() - Reset DLL logic
749 * @node_id: Node ID of the device
752 * This function resets DLL logic for the SD device.
754 * Return: Returns status, either success or error+reason
756 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
758 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET,
761 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
764 * zynqmp_pm_ospi_mux_select() - OSPI Mux selection
766 * @dev_id: Device Id of the OSPI device.
767 * @select: OSPI Mux select value.
769 * This function select the OSPI Mux.
771 * Return: Returns status, either success or error+reason
773 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select)
775 return zynqmp_pm_invoke_fn(PM_IOCTL, dev_id, IOCTL_OSPI_MUX_SELECT,
778 EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select);
781 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs)
782 * @index: GGS register index
783 * @value: Register value to be written
785 * This function writes value to GGS register.
787 * Return: Returns status, either success or error+reason
789 int zynqmp_pm_write_ggs(u32 index, u32 value)
791 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS,
794 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
797 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs)
798 * @index: GGS register index
799 * @value: Register value to be written
801 * This function returns GGS register value.
803 * Return: Returns status, either success or error+reason
805 int zynqmp_pm_read_ggs(u32 index, u32 *value)
807 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS,
810 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
813 * zynqmp_pm_write_pggs() - PM API for writing persistent global general
815 * @index: PGGS register index
816 * @value: Register value to be written
818 * This function writes value to PGGS register.
820 * Return: Returns status, either success or error+reason
822 int zynqmp_pm_write_pggs(u32 index, u32 value)
824 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value,
827 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
830 * zynqmp_pm_read_pggs() - PM API for reading persistent global general
832 * @index: PGGS register index
833 * @value: Register value to be written
835 * This function returns PGGS register value.
837 * Return: Returns status, either success or error+reason
839 int zynqmp_pm_read_pggs(u32 index, u32 *value)
841 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0,
844 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
846 int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)
848 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_TAPDELAY_BYPASS,
851 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass);
854 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
855 * @value: Status value to be written
857 * This function sets healthy bit value to indicate boot health status
860 * Return: Returns status, either success or error+reason
862 int zynqmp_pm_set_boot_health_status(u32 value)
864 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS,
869 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
870 * @reset: Reset to be configured
871 * @assert_flag: Flag stating should reset be asserted (1) or
874 * Return: Returns status, either success or error+reason
876 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
877 const enum zynqmp_pm_reset_action assert_flag)
879 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag,
882 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
885 * zynqmp_pm_reset_get_status - Get status of the reset
886 * @reset: Reset whose status should be returned
887 * @status: Returned status
889 * Return: Returns status, either success or error+reason
891 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)
893 u32 ret_payload[PAYLOAD_ARG_CNT];
899 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0,
901 *status = ret_payload[1];
905 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
908 * zynqmp_pm_fpga_load - Perform the fpga load
909 * @address: Address to write to
910 * @size: pl bitstream size
911 * @flags: Bitstream type
912 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
913 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration
915 * This function provides access to pmufw. To transfer
916 * the required bitstream into PL.
918 * Return: Returns status, either success or error+reason
920 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
922 return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
923 upper_32_bits(address), size, flags, NULL);
925 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
928 * zynqmp_pm_fpga_get_status - Read value from PCAP status register
929 * @value: Value to read
931 * This function provides access to the pmufw to get the PCAP
934 * Return: Returns status, either success or error+reason
936 int zynqmp_pm_fpga_get_status(u32 *value)
938 u32 ret_payload[PAYLOAD_ARG_CNT];
944 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
945 *value = ret_payload[1];
949 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
952 * zynqmp_pm_pinctrl_request - Request Pin from firmware
953 * @pin: Pin number to request
955 * This function requests pin from firmware.
957 * Return: Returns status, either success or error+reason.
959 int zynqmp_pm_pinctrl_request(const u32 pin)
961 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL);
963 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
966 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released
967 * @pin: Pin number to release
969 * This function release pin from firmware.
971 * Return: Returns status, either success or error+reason.
973 int zynqmp_pm_pinctrl_release(const u32 pin)
975 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL);
977 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release);
980 * zynqmp_pm_pinctrl_get_function - Read function id set for the given pin
982 * @id: Buffer to store function ID
984 * This function provides the function currently set for the given pin.
986 * Return: Returns status, either success or error+reason
988 int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id)
990 u32 ret_payload[PAYLOAD_ARG_CNT];
996 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0,
998 *id = ret_payload[1];
1002 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function);
1005 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin
1007 * @id: Function ID to set
1009 * This function sets requested function for the given pin.
1011 * Return: Returns status, either success or error+reason.
1013 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
1015 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id,
1018 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function);
1021 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin
1023 * @param: Parameter to get
1024 * @value: Buffer to store parameter value
1026 * This function gets requested configuration parameter for the given pin.
1028 * Return: Returns status, either success or error+reason.
1030 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
1033 u32 ret_payload[PAYLOAD_ARG_CNT];
1039 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param,
1041 *value = ret_payload[1];
1045 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config);
1048 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin
1050 * @param: Parameter to set
1051 * @value: Parameter value to set
1053 * This function sets requested configuration parameter for the given pin.
1055 * Return: Returns status, either success or error+reason.
1057 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
1060 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin,
1061 param, value, 0, NULL);
1063 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config);
1066 * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status
1067 * @ps_mode: Returned output value of ps_mode
1069 * This API function is to be used for notify the power management controller
1070 * to read bootpin status.
1072 * Return: status, either success or error+reason
1074 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode)
1077 u32 ret_payload[PAYLOAD_ARG_CNT];
1079 ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, CRL_APB_BOOT_PIN_CTRL, 0,
1082 *ps_mode = ret_payload[1];
1086 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read);
1089 * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin
1090 * @ps_mode: Value to be written to the bootpin ctrl register
1092 * This API function is to be used for notify the power management controller
1093 * to configure bootpin.
1095 * Return: Returns status, either success or error+reason
1097 int zynqmp_pm_bootmode_write(u32 ps_mode)
1099 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, CRL_APB_BOOT_PIN_CTRL,
1100 CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0, NULL);
1102 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write);
1105 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller
1106 * master has initialized its own power management
1108 * Return: Returns status, either success or error+reason
1110 * This API function is to be used for notify the power management controller
1111 * about the completed power management initialization.
1113 int zynqmp_pm_init_finalize(void)
1115 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL);
1117 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
1120 * zynqmp_pm_set_suspend_mode() - Set system suspend mode
1121 * @mode: Mode to set for system suspend
1123 * This API function is used to set mode of system suspend.
1125 * Return: Returns status, either success or error+reason
1127 int zynqmp_pm_set_suspend_mode(u32 mode)
1129 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL);
1131 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
1134 * zynqmp_pm_request_node() - Request a node with specific capabilities
1135 * @node: Node ID of the slave
1136 * @capabilities: Requested capabilities of the slave
1137 * @qos: Quality of service (not supported)
1138 * @ack: Flag to specify whether acknowledge is requested
1140 * This function is used by master to request particular node from firmware.
1141 * Every master must request node before using it.
1143 * Return: Returns status, either success or error+reason
1145 int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
1146 const u32 qos, const enum zynqmp_pm_request_ack ack)
1148 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities,
1151 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
1154 * zynqmp_pm_release_node() - Release a node
1155 * @node: Node ID of the slave
1157 * This function is used by master to inform firmware that master
1158 * has released node. Once released, master must not use that node
1159 * without re-request.
1161 * Return: Returns status, either success or error+reason
1163 int zynqmp_pm_release_node(const u32 node)
1165 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL);
1167 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
1170 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves
1171 * @node: Node ID of the slave
1172 * @capabilities: Requested capabilities of the slave
1173 * @qos: Quality of service (not supported)
1174 * @ack: Flag to specify whether acknowledge is requested
1176 * This API function is to be used for slaves a PU already has requested
1177 * to change its capabilities.
1179 * Return: Returns status, either success or error+reason
1181 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
1183 const enum zynqmp_pm_request_ack ack)
1185 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
1188 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
1191 * zynqmp_pm_load_pdi - Load and process PDI
1192 * @src: Source device where PDI is located
1193 * @address: PDI src address
1195 * This function provides support to load PDI from linux
1197 * Return: Returns status, either success or error+reason
1199 int zynqmp_pm_load_pdi(const u32 src, const u64 address)
1201 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src,
1202 lower_32_bits(address),
1203 upper_32_bits(address), 0, NULL);
1205 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
1208 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using
1210 * @address: Address of the AesParams structure.
1211 * @out: Returned output value
1213 * Return: Returns status, either success or error code.
1215 int zynqmp_pm_aes_engine(const u64 address, u32 *out)
1217 u32 ret_payload[PAYLOAD_ARG_CNT];
1223 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
1224 lower_32_bits(address),
1226 *out = ret_payload[1];
1230 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
1233 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash
1234 * @address: Address of the data/ Address of output buffer where
1235 * hash should be stored.
1236 * @size: Size of the data.
1238 * BIT(0) - for initializing csudma driver and SHA3(Here address
1239 * and size inputs can be NULL).
1240 * BIT(1) - to call Sha3_Update API which can be called multiple
1241 * times when data is not contiguous.
1242 * BIT(2) - to get final hash of the whole updated data.
1243 * Hash will be overwritten at provided address with
1246 * Return: Returns status, either success or error code.
1248 int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)
1250 u32 lower_addr = lower_32_bits(address);
1251 u32 upper_addr = upper_32_bits(address);
1253 return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr,
1256 EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);
1259 * zynqmp_pm_register_notifier() - PM API for register a subsystem
1260 * to be notified about specific
1262 * @node: Node ID to which the event is related.
1263 * @event: Event Mask of Error events for which wants to get notified.
1264 * @wake: Wake subsystem upon capturing the event if value 1
1265 * @enable: Enable the registration for value 1, disable for value 0
1267 * This function is used to register/un-register for particular node-event
1268 * combination in firmware.
1270 * Return: Returns status, either success or error+reason
1273 int zynqmp_pm_register_notifier(const u32 node, const u32 event,
1274 const u32 wake, const u32 enable)
1276 return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, node, event,
1277 wake, enable, NULL);
1279 EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier);
1282 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
1283 * @type: Shutdown or restart? 0 for shutdown, 1 for restart
1284 * @subtype: Specifies which system should be restarted or shut down
1286 * Return: Returns status, either success or error+reason
1288 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
1290 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype,
1295 * zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config
1296 * @id: The config ID of the feature to be configured
1297 * @value: The config value of the feature to be configured
1299 * Return: Returns 0 on success or error value on failure.
1301 int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value)
1303 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_FEATURE_CONFIG,
1308 * zynqmp_pm_get_feature_config - PM call to get value of configured feature
1309 * @id: The config id of the feature to be queried
1310 * @payload: Returned value array
1312 * Return: Returns 0 on success or error value on failure.
1314 int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
1317 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_FEATURE_CONFIG,
1322 * zynqmp_pm_set_sd_config - PM call to set value of SD config registers
1324 * @config: The config type of SD registers
1325 * @value: Value to be set
1327 * Return: Returns 0 on success or error value on failure.
1329 int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
1331 return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_SD_CONFIG,
1332 config, value, NULL);
1334 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config);
1337 * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers
1338 * @node: GEM node ID
1339 * @config: The config type of GEM registers
1340 * @value: Value to be set
1342 * Return: Returns 0 on success or error value on failure.
1344 int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
1347 return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG,
1348 config, value, NULL);
1350 EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config);
1353 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
1354 * @subtype: Shutdown subtype
1355 * @name: Matching string for scope argument
1357 * This struct encapsulates mapping between shutdown scope ID and string.
1359 struct zynqmp_pm_shutdown_scope {
1360 const enum zynqmp_pm_shutdown_subtype subtype;
1364 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
1365 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
1366 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
1367 .name = "subsystem",
1369 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
1370 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
1373 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
1374 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
1379 static struct zynqmp_pm_shutdown_scope *selected_scope =
1380 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
1383 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid
1384 * @scope_string: Shutdown scope string
1386 * Return: Return pointer to matching shutdown scope struct from
1387 * array of available options in system if string is valid,
1388 * otherwise returns NULL.
1390 static struct zynqmp_pm_shutdown_scope*
1391 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
1395 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
1396 if (sysfs_streq(scope_string, shutdown_scopes[count].name))
1397 return &shutdown_scopes[count];
1402 static ssize_t shutdown_scope_show(struct device *device,
1403 struct device_attribute *attr,
1408 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
1409 if (&shutdown_scopes[i] == selected_scope) {
1411 strcat(buf, shutdown_scopes[i].name);
1414 strcat(buf, shutdown_scopes[i].name);
1423 static ssize_t shutdown_scope_store(struct device *device,
1424 struct device_attribute *attr,
1425 const char *buf, size_t count)
1428 struct zynqmp_pm_shutdown_scope *scope;
1430 scope = zynqmp_pm_is_shutdown_scope_valid(buf);
1434 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
1437 pr_err("unable to set shutdown scope %s\n", buf);
1441 selected_scope = scope;
1446 static DEVICE_ATTR_RW(shutdown_scope);
1448 static ssize_t health_status_store(struct device *device,
1449 struct device_attribute *attr,
1450 const char *buf, size_t count)
1455 ret = kstrtouint(buf, 10, &value);
1459 ret = zynqmp_pm_set_boot_health_status(value);
1461 dev_err(device, "unable to set healthy bit value to %u\n",
1469 static DEVICE_ATTR_WO(health_status);
1471 static ssize_t ggs_show(struct device *device,
1472 struct device_attribute *attr,
1477 u32 ret_payload[PAYLOAD_ARG_CNT];
1479 ret = zynqmp_pm_read_ggs(reg, ret_payload);
1483 return sprintf(buf, "0x%x\n", ret_payload[1]);
1486 static ssize_t ggs_store(struct device *device,
1487 struct device_attribute *attr,
1488 const char *buf, size_t count,
1494 if (reg >= GSS_NUM_REGS)
1497 ret = kstrtol(buf, 16, &value);
1503 ret = zynqmp_pm_write_ggs(reg, value);
1510 /* GGS register show functions */
1511 #define GGS0_SHOW(N) \
1512 ssize_t ggs##N##_show(struct device *device, \
1513 struct device_attribute *attr, \
1516 return ggs_show(device, attr, buf, N); \
1519 static GGS0_SHOW(0);
1520 static GGS0_SHOW(1);
1521 static GGS0_SHOW(2);
1522 static GGS0_SHOW(3);
1524 /* GGS register store function */
1525 #define GGS0_STORE(N) \
1526 ssize_t ggs##N##_store(struct device *device, \
1527 struct device_attribute *attr, \
1531 return ggs_store(device, attr, buf, count, N); \
1534 static GGS0_STORE(0);
1535 static GGS0_STORE(1);
1536 static GGS0_STORE(2);
1537 static GGS0_STORE(3);
1539 static ssize_t pggs_show(struct device *device,
1540 struct device_attribute *attr,
1545 u32 ret_payload[PAYLOAD_ARG_CNT];
1547 ret = zynqmp_pm_read_pggs(reg, ret_payload);
1551 return sprintf(buf, "0x%x\n", ret_payload[1]);
1554 static ssize_t pggs_store(struct device *device,
1555 struct device_attribute *attr,
1556 const char *buf, size_t count,
1562 if (reg >= GSS_NUM_REGS)
1565 ret = kstrtol(buf, 16, &value);
1571 ret = zynqmp_pm_write_pggs(reg, value);
1579 #define PGGS0_SHOW(N) \
1580 ssize_t pggs##N##_show(struct device *device, \
1581 struct device_attribute *attr, \
1584 return pggs_show(device, attr, buf, N); \
1587 #define PGGS0_STORE(N) \
1588 ssize_t pggs##N##_store(struct device *device, \
1589 struct device_attribute *attr, \
1593 return pggs_store(device, attr, buf, count, N); \
1596 /* PGGS register show functions */
1597 static PGGS0_SHOW(0);
1598 static PGGS0_SHOW(1);
1599 static PGGS0_SHOW(2);
1600 static PGGS0_SHOW(3);
1602 /* PGGS register store functions */
1603 static PGGS0_STORE(0);
1604 static PGGS0_STORE(1);
1605 static PGGS0_STORE(2);
1606 static PGGS0_STORE(3);
1608 /* GGS register attributes */
1609 static DEVICE_ATTR_RW(ggs0);
1610 static DEVICE_ATTR_RW(ggs1);
1611 static DEVICE_ATTR_RW(ggs2);
1612 static DEVICE_ATTR_RW(ggs3);
1614 /* PGGS register attributes */
1615 static DEVICE_ATTR_RW(pggs0);
1616 static DEVICE_ATTR_RW(pggs1);
1617 static DEVICE_ATTR_RW(pggs2);
1618 static DEVICE_ATTR_RW(pggs3);
1620 static ssize_t feature_config_id_show(struct device *device,
1621 struct device_attribute *attr,
1624 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1626 return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id);
1629 static ssize_t feature_config_id_store(struct device *device,
1630 struct device_attribute *attr,
1631 const char *buf, size_t count)
1635 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1640 ret = kstrtou32(buf, 10, &config_id);
1644 devinfo->feature_conf_id = config_id;
1649 static DEVICE_ATTR_RW(feature_config_id);
1651 static ssize_t feature_config_value_show(struct device *device,
1652 struct device_attribute *attr,
1656 u32 ret_payload[PAYLOAD_ARG_CNT];
1657 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1659 ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id,
1664 return sysfs_emit(buf, "%d\n", ret_payload[1]);
1667 static ssize_t feature_config_value_store(struct device *device,
1668 struct device_attribute *attr,
1669 const char *buf, size_t count)
1673 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1678 ret = kstrtou32(buf, 10, &value);
1682 ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id,
1690 static DEVICE_ATTR_RW(feature_config_value);
1692 static struct attribute *zynqmp_firmware_attrs[] = {
1693 &dev_attr_ggs0.attr,
1694 &dev_attr_ggs1.attr,
1695 &dev_attr_ggs2.attr,
1696 &dev_attr_ggs3.attr,
1697 &dev_attr_pggs0.attr,
1698 &dev_attr_pggs1.attr,
1699 &dev_attr_pggs2.attr,
1700 &dev_attr_pggs3.attr,
1701 &dev_attr_shutdown_scope.attr,
1702 &dev_attr_health_status.attr,
1703 &dev_attr_feature_config_id.attr,
1704 &dev_attr_feature_config_value.attr,
1708 ATTRIBUTE_GROUPS(zynqmp_firmware);
1710 static int zynqmp_firmware_probe(struct platform_device *pdev)
1712 struct device *dev = &pdev->dev;
1713 struct device_node *np;
1714 struct zynqmp_devinfo *devinfo;
1717 ret = get_set_conduit_method(dev->of_node);
1721 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp");
1723 np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
1727 feature_check_enabled = true;
1730 if (!feature_check_enabled) {
1731 ret = do_feature_check_call(PM_FEATURE_CHECK);
1733 feature_check_enabled = true;
1738 devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL);
1744 platform_set_drvdata(pdev, devinfo);
1746 /* Check PM API version number */
1747 ret = zynqmp_pm_get_api_version(&pm_api_version);
1751 if (pm_api_version < ZYNQMP_PM_VERSION) {
1752 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
1754 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
1755 pm_api_version >> 16, pm_api_version & 0xFFFF);
1758 pr_info("%s Platform Management API v%d.%d\n", __func__,
1759 pm_api_version >> 16, pm_api_version & 0xFFFF);
1761 /* Check trustzone version number */
1762 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
1764 panic("Legacy trustzone found without version support\n");
1766 if (pm_tz_version < ZYNQMP_TZ_VERSION)
1767 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
1769 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
1770 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1772 pr_info("%s Trustzone version v%d.%d\n", __func__,
1773 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1775 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
1776 ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
1778 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
1782 zynqmp_pm_api_debugfs_init();
1784 np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
1786 em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager",
1789 dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n");
1793 return of_platform_populate(dev->of_node, NULL, NULL, dev);
1796 static int zynqmp_firmware_remove(struct platform_device *pdev)
1798 struct pm_api_feature_data *feature_data;
1799 struct hlist_node *tmp;
1802 mfd_remove_devices(&pdev->dev);
1803 zynqmp_pm_api_debugfs_exit();
1805 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) {
1806 hash_del(&feature_data->hentry);
1807 kfree(feature_data);
1810 platform_device_unregister(em_dev);
1815 static const struct of_device_id zynqmp_firmware_of_match[] = {
1816 {.compatible = "xlnx,zynqmp-firmware"},
1817 {.compatible = "xlnx,versal-firmware"},
1820 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
1822 static struct platform_driver zynqmp_firmware_driver = {
1824 .name = "zynqmp_firmware",
1825 .of_match_table = zynqmp_firmware_of_match,
1826 .dev_groups = zynqmp_firmware_groups,
1828 .probe = zynqmp_firmware_probe,
1829 .remove = zynqmp_firmware_remove,
1831 module_platform_driver(zynqmp_firmware_driver);