1 // SPDX-License-Identifier: GPL-2.0
3 * System Control and Management Interface (SCMI) Clock Protocol
5 * Copyright (C) 2018 ARM Ltd.
8 #include <linux/sort.h>
12 enum scmi_clock_protocol_cmd {
13 CLOCK_ATTRIBUTES = 0x3,
14 CLOCK_DESCRIBE_RATES = 0x4,
17 CLOCK_CONFIG_SET = 0x7,
20 struct scmi_msg_resp_clock_protocol_attributes {
26 struct scmi_msg_resp_clock_attributes {
28 #define CLOCK_ENABLE BIT(0)
29 u8 name[SCMI_MAX_STR_SIZE];
32 struct scmi_clock_set_config {
37 struct scmi_msg_clock_describe_rates {
42 struct scmi_msg_resp_clock_describe_rates {
43 __le32 num_rates_flags;
44 #define NUM_RETURNED(x) ((x) & 0xfff)
45 #define RATE_DISCRETE(x) !((x) & BIT(12))
46 #define NUM_REMAINING(x) ((x) >> 16)
51 #define RATE_TO_U64(X) \
54 le32_to_cpu((x).value_low) | (u64)le32_to_cpu((x).value_high) << 32; \
58 struct scmi_clock_set_rate {
60 #define CLOCK_SET_ASYNC BIT(0)
61 #define CLOCK_SET_IGNORE_RESP BIT(1)
62 #define CLOCK_SET_ROUND_UP BIT(2)
63 #define CLOCK_SET_ROUND_AUTO BIT(3)
73 atomic_t cur_async_req;
74 struct scmi_clock_info *clk;
77 static int scmi_clock_protocol_attributes_get(const struct scmi_handle *handle,
78 struct clock_info *ci)
82 struct scmi_msg_resp_clock_protocol_attributes *attr;
84 ret = scmi_xfer_get_init(handle, PROTOCOL_ATTRIBUTES,
85 SCMI_PROTOCOL_CLOCK, 0, sizeof(*attr), &t);
91 ret = scmi_do_xfer(handle, t);
93 ci->num_clocks = le16_to_cpu(attr->num_clocks);
94 ci->max_async_req = attr->max_async_req;
97 scmi_xfer_put(handle, t);
101 static int scmi_clock_attributes_get(const struct scmi_handle *handle,
102 u32 clk_id, struct scmi_clock_info *clk)
106 struct scmi_msg_resp_clock_attributes *attr;
108 ret = scmi_xfer_get_init(handle, CLOCK_ATTRIBUTES, SCMI_PROTOCOL_CLOCK,
109 sizeof(clk_id), sizeof(*attr), &t);
113 put_unaligned_le32(clk_id, t->tx.buf);
116 ret = scmi_do_xfer(handle, t);
118 strlcpy(clk->name, attr->name, SCMI_MAX_STR_SIZE);
122 scmi_xfer_put(handle, t);
126 static int rate_cmp_func(const void *_r1, const void *_r2)
128 const u64 *r1 = _r1, *r2 = _r2;
139 scmi_clock_describe_rates_get(const struct scmi_handle *handle, u32 clk_id,
140 struct scmi_clock_info *clk)
144 bool rate_discrete = false;
145 u32 tot_rate_cnt = 0, rates_flag;
146 u16 num_returned, num_remaining;
148 struct scmi_msg_clock_describe_rates *clk_desc;
149 struct scmi_msg_resp_clock_describe_rates *rlist;
151 ret = scmi_xfer_get_init(handle, CLOCK_DESCRIBE_RATES,
152 SCMI_PROTOCOL_CLOCK, sizeof(*clk_desc), 0, &t);
156 clk_desc = t->tx.buf;
160 clk_desc->id = cpu_to_le32(clk_id);
161 /* Set the number of rates to be skipped/already read */
162 clk_desc->rate_index = cpu_to_le32(tot_rate_cnt);
164 ret = scmi_do_xfer(handle, t);
168 rates_flag = le32_to_cpu(rlist->num_rates_flags);
169 num_remaining = NUM_REMAINING(rates_flag);
170 rate_discrete = RATE_DISCRETE(rates_flag);
171 num_returned = NUM_RETURNED(rates_flag);
173 if (tot_rate_cnt + num_returned > SCMI_MAX_NUM_RATES) {
174 dev_err(handle->dev, "No. of rates > MAX_NUM_RATES");
178 if (!rate_discrete) {
179 clk->range.min_rate = RATE_TO_U64(rlist->rate[0]);
180 clk->range.max_rate = RATE_TO_U64(rlist->rate[1]);
181 clk->range.step_size = RATE_TO_U64(rlist->rate[2]);
182 dev_dbg(handle->dev, "Min %llu Max %llu Step %llu Hz\n",
183 clk->range.min_rate, clk->range.max_rate,
184 clk->range.step_size);
188 rate = &clk->list.rates[tot_rate_cnt];
189 for (cnt = 0; cnt < num_returned; cnt++, rate++) {
190 *rate = RATE_TO_U64(rlist->rate[cnt]);
191 dev_dbg(handle->dev, "Rate %llu Hz\n", *rate);
194 tot_rate_cnt += num_returned;
196 * check for both returned and remaining to avoid infinite
197 * loop due to buggy firmware
199 } while (num_returned && num_remaining);
201 if (rate_discrete && rate) {
202 clk->list.num_rates = tot_rate_cnt;
203 sort(rate, tot_rate_cnt, sizeof(*rate), rate_cmp_func, NULL);
206 clk->rate_discrete = rate_discrete;
209 scmi_xfer_put(handle, t);
214 scmi_clock_rate_get(const struct scmi_handle *handle, u32 clk_id, u64 *value)
219 ret = scmi_xfer_get_init(handle, CLOCK_RATE_GET, SCMI_PROTOCOL_CLOCK,
220 sizeof(__le32), sizeof(u64), &t);
224 put_unaligned_le32(clk_id, t->tx.buf);
226 ret = scmi_do_xfer(handle, t);
228 *value = get_unaligned_le64(t->rx.buf);
230 scmi_xfer_put(handle, t);
234 static int scmi_clock_rate_set(const struct scmi_handle *handle, u32 clk_id,
240 struct scmi_clock_set_rate *cfg;
241 struct clock_info *ci = handle->clk_priv;
243 ret = scmi_xfer_get_init(handle, CLOCK_RATE_SET, SCMI_PROTOCOL_CLOCK,
244 sizeof(*cfg), 0, &t);
248 if (ci->max_async_req &&
249 atomic_inc_return(&ci->cur_async_req) < ci->max_async_req)
250 flags |= CLOCK_SET_ASYNC;
253 cfg->flags = cpu_to_le32(flags);
254 cfg->id = cpu_to_le32(clk_id);
255 cfg->value_low = cpu_to_le32(rate & 0xffffffff);
256 cfg->value_high = cpu_to_le32(rate >> 32);
258 if (flags & CLOCK_SET_ASYNC)
259 ret = scmi_do_xfer_with_response(handle, t);
261 ret = scmi_do_xfer(handle, t);
263 if (ci->max_async_req)
264 atomic_dec(&ci->cur_async_req);
266 scmi_xfer_put(handle, t);
271 scmi_clock_config_set(const struct scmi_handle *handle, u32 clk_id, u32 config)
275 struct scmi_clock_set_config *cfg;
277 ret = scmi_xfer_get_init(handle, CLOCK_CONFIG_SET, SCMI_PROTOCOL_CLOCK,
278 sizeof(*cfg), 0, &t);
283 cfg->id = cpu_to_le32(clk_id);
284 cfg->attributes = cpu_to_le32(config);
286 ret = scmi_do_xfer(handle, t);
288 scmi_xfer_put(handle, t);
292 static int scmi_clock_enable(const struct scmi_handle *handle, u32 clk_id)
294 return scmi_clock_config_set(handle, clk_id, CLOCK_ENABLE);
297 static int scmi_clock_disable(const struct scmi_handle *handle, u32 clk_id)
299 return scmi_clock_config_set(handle, clk_id, 0);
302 static int scmi_clock_count_get(const struct scmi_handle *handle)
304 struct clock_info *ci = handle->clk_priv;
306 return ci->num_clocks;
309 static const struct scmi_clock_info *
310 scmi_clock_info_get(const struct scmi_handle *handle, u32 clk_id)
312 struct clock_info *ci = handle->clk_priv;
313 struct scmi_clock_info *clk = ci->clk + clk_id;
321 static const struct scmi_clk_ops clk_ops = {
322 .count_get = scmi_clock_count_get,
323 .info_get = scmi_clock_info_get,
324 .rate_get = scmi_clock_rate_get,
325 .rate_set = scmi_clock_rate_set,
326 .enable = scmi_clock_enable,
327 .disable = scmi_clock_disable,
330 static int scmi_clock_protocol_init(struct scmi_handle *handle)
334 struct clock_info *cinfo;
336 scmi_version_get(handle, SCMI_PROTOCOL_CLOCK, &version);
338 dev_dbg(handle->dev, "Clock Version %d.%d\n",
339 PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version));
341 cinfo = devm_kzalloc(handle->dev, sizeof(*cinfo), GFP_KERNEL);
345 scmi_clock_protocol_attributes_get(handle, cinfo);
347 cinfo->clk = devm_kcalloc(handle->dev, cinfo->num_clocks,
348 sizeof(*cinfo->clk), GFP_KERNEL);
352 for (clkid = 0; clkid < cinfo->num_clocks; clkid++) {
353 struct scmi_clock_info *clk = cinfo->clk + clkid;
355 ret = scmi_clock_attributes_get(handle, clkid, clk);
357 scmi_clock_describe_rates_get(handle, clkid, clk);
360 cinfo->version = version;
361 handle->clk_ops = &clk_ops;
362 handle->clk_priv = cinfo;
367 DEFINE_SCMI_PROTOCOL_REGISTER_UNREGISTER(SCMI_PROTOCOL_CLOCK, clock)