2 *-----------------------------------------------------------------------------
3 * Filename: ovl2_regs_tnc.h
5 *-----------------------------------------------------------------------------
6 * Copyright (c) 2002-2010, Intel Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 *-----------------------------------------------------------------------------
28 * This is the internal header file for napa overlay engine. It should be not be
29 * by any other module besides the overlay module itself. It contains the
30 * neccessary hardware virtualized structures and functions internal to
31 * the napa core's overlay engine
32 *-----------------------------------------------------------------------------
34 #ifndef _OVL2_REGS_TNC_H
35 #define _OVL2_REGS_TNC_H
36 /* Second Overlay Structure.
37 * These registers are the trigger registers and should be written
39 typedef struct _ovl2_reg_tnc{
44 /* Color Correction */
45 #define OVL2_RGB_COLOR_DEF_CONT_BRGHT 0x1000000
46 #define OVL2_RGB_COLOR_DEF_SATN_HUE 0x0000080
48 /* Overlay Command Definitions */
50 #define OVL2_CMD_YVYU 0x00020000
51 #define OVL2_CMD_UYVY 0x00010000
52 #define OVL2_CMD_VYUY 0x00030000
55 #define OVL2_CMD_ARGB_8888 0x1C000000
56 #define OVL2_CMD_RGB_8888 0x18000000
57 #define OVL2_CMD_RGB_565 0x14000000
58 #define OVL2_CMD_RGB_555 0x10000000
59 #define OVL2_CMD_RGB_8 0x08000000
60 #define OVL2_CMD_YUV_422 0x00000000 /*packed YUV422*/
61 #define OVL2_CMD_SRC_FMT_MASK 0x3C000000 /*mask for above*/
63 #define OVL2_REG_ADDR_GAMMA5 0x721E0
64 #define OVL2_REG_ADDR_GAMMA4 0x721E4
65 #define OVL2_REG_ADDR_GAMMA3 0x721E8
66 #define OVL2_REG_ADDR_GAMMA2 0x721EC
67 #define OVL2_REG_ADDR_GAMMA1 0x721F0
68 #define OVL2_REG_ADDR_GAMMA0 0x721F4
69 #define OVL2_TOTAL_GAMMA_REG 6
71 /* following value are needed because hardware seems to display yuv slightly dimmer
72 than RGB when color data is calculated out to be equal */
73 #define MID_CONTRAST_YUV 0x43//4a
74 #define MID_SATURATION_YUV 0x91//92
75 #define MID_BRIGHTNESS_YUV -5
76 #endif /* _OVL2_REGS_NAP_H */