1 /*-----------------------------------------------------------------------------
2 * Copyright (c) Chrontel Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 *-----------------------------------------------------------------------------
25 *-----------------------------------------------------------------------------
32 #include "ch7036_typedef.h"
35 //#include <linux/kernel.h>
37 #define CFG_CAP_EDID 0x01
38 #define CFG_CAP_HDCP 0x02
40 typedef unsigned char ch7036_attr_table_index_t;
43 typedef struct _FW7036_CFG {
45 unsigned char ver_major;
46 unsigned char ver_minor;
49 unsigned char capbility;
50 unsigned char reserved;
54 #define LHFM_GET_VERSION 0x1F
55 #define LHFM_GET_HPD 0x06
56 #define LHFM_GET_EDID 0x01
57 #define LHFM_GET_MODEINFO 0x03
58 #define LHFM_GET_VGA_MODEINFO 0x33
59 #define LHFM_HDMI_ONOFF 0x04
60 #define LHFM_REQUEST 0x40
61 #define LHFM_RET_ERROR 0x80
63 int LHFM_get_version(DEV_CONTEXT* p_ch7xxx_context,struct _FW7036_CFG* cfg);
65 void LHFM_enable_crt_hpd(DEV_CONTEXT* p_ch7xxx_context);
66 ch7036_status_t LHFM_get_crt_hpd(DEV_CONTEXT* p_ch7xxx_context);
67 int LHFM_hdmi_onoff(int turnon);
68 ch7036_status_t LHFM_get_hdmi_modeinfo(DEV_CONTEXT* p_ch7xxx_context,unsigned char *minfo);
69 ch7036_status_t LHFM_get_edid(DEV_CONTEXT* p_ch7xxx_context,unsigned char*edid, unsigned char* ebn, unsigned char flag);
70 int LHFM_load_firmware(DEV_CONTEXT* pDevContext);
71 void ch7036_dump( char *s, int size, unsigned char *regdata);
76 #define GET_HDMI_DISPLAY_MODES 0x08
78 #define GET_CRT_HPD 0x10
79 #define GET_CRT_EDID 0x20
81 #define CH7036_HDMI_DDC 0
82 #define CH7036_VGA_DDC 0x80
84 #define MAX_EDID_BLOCKS 2
86 #define MAX_I2C_BLOCK_SIZE 32
91 #define NUM_OF_BLOCKS 0x0F
93 #define EDID_SIZE 0x0100
94 #define EDID_STRUCTURE_VERSION 0x12
95 #define EDID_STRUCTURE_REVISION 0x13
96 #define EDID_FEATURE_SUPPORT 0x18
97 #define EDID_ESTABLISHED_TIMINGS_1 0x23
98 #define EDID_ESTABLISHED_TIMINGS_2 0x24
99 #define EDID_MANUFACTURERS_RESERVED_TIMINGS 0x25
100 #define EDID_STANDARD_TIMINGS 0x26
101 #define EDID_STANDARD_TIMINGS_BIT_DESCRIPTION 0x27
102 #define EDID_DETAILED_TIMING_DESCRIPTION_1 0x36
103 #define EDID_DETAILED_TIMING_DESCRIPTION_2 0x48
104 #define EDID_DETAILED_TIMING_DESCRIPTION_3 0x5A
106 #define EDID_EXTENSION_FLAG 0x7E
108 #define EDID_CEA_TAG 0x80
109 #define EDID_CEA_REVISION 0x81
110 #define EDID_CEA_DETAILED_TIMING_DATA_OFFSET 0x82
111 #define EDID_CEA_VIDEO_DATA_BLOCK 0x84
112 #define EDID_CEA_DATA_BLOCK 0x84
114 #define EDID_CEA_VIDEO_DATA_BLOCK_2 0x96
115 #define EDID_CEA_VIDEO_DATA_BLOCK_3 0xA8
116 #define EDID_CEA_VIDEO_DATA_BLOCK_4 0xBA
117 #define EDID_CEA_VIDEO_DATA_BLOCK_5 0xCC
118 #define EDID_CEA_VIDEO_DATA_BLOCK_6 0xDE
120 #define EDID_SPACE_INDEX_START 0x18
127 unsigned char is_supported;
129 unsigned long index[3];
131 }established_timings_t, *p_established_timings;
136 unsigned char refresh_rate;
137 }standard_timings_t, *p_standard_timings;
142 unsigned char pclk_lobyte;
143 unsigned char pclk_hibyte;
144 unsigned char hactive_lobyte;
145 unsigned char hblank_lobyte;
146 unsigned char hactive_blank;
147 unsigned char vactive_lobyte;
148 unsigned char vblank_lobyte;
149 unsigned char vactive_blank;
150 unsigned char hsync_off_lobyte;
151 unsigned char hsync_pulse_width;
152 unsigned char vsync_off_pulse_width;
154 unsigned char hsopw_vsopw;
158 unsigned char himage_size_lobyte;
159 unsigned char vimage_size_lobyte;
160 unsigned char hvimage_size;
162 unsigned char hborder;
163 unsigned char vborder;
168 typedef struct monitor_range {
170 unsigned char hrate_min;
171 unsigned char hrate_max;
172 unsigned char vrate_min;
173 unsigned char vrate_max;
175 unsigned long pclk_max;
180 typedef struct detailed_timing_block {
181 unsigned long data_tag;
186 typedef struct edid_blk {
189 unsigned char is_edid;
190 unsigned char is_preferred_timing;
193 unsigned char edidblk[EDID_SIZE];
195 established_timings_t *etiming_I;
196 established_timings_t *etiming_II;
197 established_timings_t *etiming_man;
199 standard_timings_t stiming[8];
201 standard_timings_t stiming_x[6];
202 monitor_range_t rtiming;
207 unsigned char supported_modes[15];
208 ch7036_attr_table_index_t modes[MAX_ATTR_LIST_SIZE];