1 // SPDX-License-Identifier: GPL-2.0-only
3 * GHES/EDAC Linux driver
5 * Copyright (c) 2013 by Mauro Carvalho Chehab
7 * Red Hat Inc. https://www.redhat.com
10 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12 #include <acpi/ghes.h>
13 #include <linux/edac.h>
14 #include <linux/dmi.h>
15 #include "edac_module.h"
16 #include <ras/ras_event.h>
19 struct mem_ctl_info *mci;
21 /* Buffers for the error handling routine */
22 char other_detail[400];
26 static refcount_t ghes_refcount = REFCOUNT_INIT(0);
29 * Access to ghes_pvt must be protected by ghes_lock. The spinlock
30 * also provides the necessary (implicit) memory barrier for the SMP
31 * case to make the pointer visible on another CPU.
33 static struct ghes_pvt *ghes_pvt;
36 * This driver's representation of the system hardware, as collected
41 struct dimm_info *dimms;
44 /* GHES registration mutex */
45 static DEFINE_MUTEX(ghes_reg_mutex);
48 * Sync with other, potentially concurrent callers of
49 * ghes_edac_report_mem_error(). We don't know what the
50 * "inventive" firmware would do.
52 static DEFINE_SPINLOCK(ghes_lock);
54 /* "ghes_edac.force_load=1" skips the platform check */
55 static bool __read_mostly force_load;
56 module_param(force_load, bool, 0);
58 static bool system_scanned;
60 /* Memory Device - Type 17 of SMBIOS spec */
61 struct memdev_dmi_entry {
65 u16 phys_mem_array_handle;
66 u16 mem_err_info_handle;
83 u16 conf_mem_clk_speed;
84 } __attribute__((__packed__));
86 static struct dimm_info *find_dimm_by_handle(struct mem_ctl_info *mci, u16 handle)
88 struct dimm_info *dimm;
90 mci_for_each_dimm(mci, dimm) {
91 if (dimm->smbios_handle == handle)
98 static void dimm_setup_label(struct dimm_info *dimm, u16 handle)
100 const char *bank = NULL, *device = NULL;
102 dmi_memdev_name(handle, &bank, &device);
105 * Set to a NULL string when both bank and device are zero. In this case,
106 * the label assigned by default will be preserved.
108 snprintf(dimm->label, sizeof(dimm->label), "%s%s%s",
109 (bank && *bank) ? bank : "",
110 (bank && *bank && device && *device) ? " " : "",
111 (device && *device) ? device : "");
114 static void assign_dmi_dimm_info(struct dimm_info *dimm, struct memdev_dmi_entry *entry)
116 u16 rdr_mask = BIT(7) | BIT(13);
118 if (entry->size == 0xffff) {
119 pr_info("Can't get DIMM%i size\n", dimm->idx);
120 dimm->nr_pages = MiB_TO_PAGES(32);/* Unknown */
121 } else if (entry->size == 0x7fff) {
122 dimm->nr_pages = MiB_TO_PAGES(entry->extended_size);
124 if (entry->size & BIT(15))
125 dimm->nr_pages = MiB_TO_PAGES((entry->size & 0x7fff) << 10);
127 dimm->nr_pages = MiB_TO_PAGES(entry->size);
130 switch (entry->memory_type) {
132 if (entry->type_detail & BIT(13))
133 dimm->mtype = MEM_RDDR;
135 dimm->mtype = MEM_DDR;
138 if (entry->type_detail & BIT(13))
139 dimm->mtype = MEM_RDDR2;
141 dimm->mtype = MEM_DDR2;
144 dimm->mtype = MEM_FB_DDR2;
147 if (entry->type_detail & BIT(12))
148 dimm->mtype = MEM_NVDIMM;
149 else if (entry->type_detail & BIT(13))
150 dimm->mtype = MEM_RDDR3;
152 dimm->mtype = MEM_DDR3;
155 if (entry->type_detail & BIT(12))
156 dimm->mtype = MEM_NVDIMM;
157 else if (entry->type_detail & BIT(13))
158 dimm->mtype = MEM_RDDR4;
160 dimm->mtype = MEM_DDR4;
163 if (entry->type_detail & BIT(6))
164 dimm->mtype = MEM_RMBS;
165 else if ((entry->type_detail & rdr_mask) == rdr_mask)
166 dimm->mtype = MEM_RDR;
167 else if (entry->type_detail & BIT(7))
168 dimm->mtype = MEM_SDR;
169 else if (entry->type_detail & BIT(9))
170 dimm->mtype = MEM_EDO;
172 dimm->mtype = MEM_UNKNOWN;
176 * Actually, we can only detect if the memory has bits for
179 if (entry->total_width == entry->data_width)
180 dimm->edac_mode = EDAC_NONE;
182 dimm->edac_mode = EDAC_SECDED;
184 dimm->dtype = DEV_UNKNOWN;
185 dimm->grain = 128; /* Likely, worse case */
187 dimm_setup_label(dimm, entry->handle);
189 if (dimm->nr_pages) {
190 edac_dbg(1, "DIMM%i: %s size = %d MB%s\n",
191 dimm->idx, edac_mem_types[dimm->mtype],
192 PAGES_TO_MiB(dimm->nr_pages),
193 (dimm->edac_mode != EDAC_NONE) ? "(ECC)" : "");
194 edac_dbg(2, "\ttype %d, detail 0x%02x, width %d(total %d)\n",
195 entry->memory_type, entry->type_detail,
196 entry->total_width, entry->data_width);
199 dimm->smbios_handle = entry->handle;
202 static void enumerate_dimms(const struct dmi_header *dh, void *arg)
204 struct memdev_dmi_entry *entry = (struct memdev_dmi_entry *)dh;
205 struct ghes_hw_desc *hw = (struct ghes_hw_desc *)arg;
208 if (dh->type != DMI_ENTRY_MEM_DEVICE)
211 /* Enlarge the array with additional 16 */
212 if (!hw->num_dimms || !(hw->num_dimms % 16)) {
213 struct dimm_info *new;
215 new = krealloc_array(hw->dimms, hw->num_dimms + 16,
216 sizeof(struct dimm_info), GFP_KERNEL);
225 d = &hw->dimms[hw->num_dimms];
226 d->idx = hw->num_dimms;
228 assign_dmi_dimm_info(d, entry);
233 static void ghes_scan_system(void)
238 dmi_walk(enumerate_dimms, &ghes_hw);
240 system_scanned = true;
243 void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
245 struct edac_raw_error_desc *e;
246 struct mem_ctl_info *mci;
247 struct ghes_pvt *pvt;
252 * We can do the locking below because GHES defers error processing
253 * from NMI to IRQ context. Whenever that changes, we'd at least
256 if (WARN_ON_ONCE(in_nmi()))
259 spin_lock_irqsave(&ghes_lock, flags);
266 e = &mci->error_desc;
268 /* Cleans the error report buffer */
269 memset(e, 0, sizeof (*e));
273 e->other_detail = pvt->other_detail;
277 *pvt->other_detail = '\0';
281 case GHES_SEV_CORRECTED:
282 e->type = HW_EVENT_ERR_CORRECTED;
284 case GHES_SEV_RECOVERABLE:
285 e->type = HW_EVENT_ERR_UNCORRECTED;
288 e->type = HW_EVENT_ERR_FATAL;
292 e->type = HW_EVENT_ERR_INFO;
295 edac_dbg(1, "error validation_bits: 0x%08llx\n",
296 (long long)mem_err->validation_bits);
298 /* Error type, mapped on e->msg */
299 if (mem_err->validation_bits & CPER_MEM_VALID_ERROR_TYPE) {
301 switch (mem_err->error_type) {
303 p += sprintf(p, "Unknown");
306 p += sprintf(p, "No error");
309 p += sprintf(p, "Single-bit ECC");
312 p += sprintf(p, "Multi-bit ECC");
315 p += sprintf(p, "Single-symbol ChipKill ECC");
318 p += sprintf(p, "Multi-symbol ChipKill ECC");
321 p += sprintf(p, "Master abort");
324 p += sprintf(p, "Target abort");
327 p += sprintf(p, "Parity Error");
330 p += sprintf(p, "Watchdog timeout");
333 p += sprintf(p, "Invalid address");
336 p += sprintf(p, "Mirror Broken");
339 p += sprintf(p, "Memory Sparing");
342 p += sprintf(p, "Scrub corrected error");
345 p += sprintf(p, "Scrub uncorrected error");
348 p += sprintf(p, "Physical Memory Map-out event");
351 p += sprintf(p, "reserved error (%d)",
352 mem_err->error_type);
355 strcpy(pvt->msg, "unknown error");
359 if (mem_err->validation_bits & CPER_MEM_VALID_PA) {
360 e->page_frame_number = PHYS_PFN(mem_err->physical_addr);
361 e->offset_in_page = offset_in_page(mem_err->physical_addr);
365 if (mem_err->validation_bits & CPER_MEM_VALID_PA_MASK)
366 e->grain = ~mem_err->physical_addr_mask + 1;
368 /* Memory error location, mapped on e->location */
370 if (mem_err->validation_bits & CPER_MEM_VALID_NODE)
371 p += sprintf(p, "node:%d ", mem_err->node);
372 if (mem_err->validation_bits & CPER_MEM_VALID_CARD)
373 p += sprintf(p, "card:%d ", mem_err->card);
374 if (mem_err->validation_bits & CPER_MEM_VALID_MODULE)
375 p += sprintf(p, "module:%d ", mem_err->module);
376 if (mem_err->validation_bits & CPER_MEM_VALID_RANK_NUMBER)
377 p += sprintf(p, "rank:%d ", mem_err->rank);
378 if (mem_err->validation_bits & CPER_MEM_VALID_BANK)
379 p += sprintf(p, "bank:%d ", mem_err->bank);
380 if (mem_err->validation_bits & CPER_MEM_VALID_BANK_GROUP)
381 p += sprintf(p, "bank_group:%d ",
382 mem_err->bank >> CPER_MEM_BANK_GROUP_SHIFT);
383 if (mem_err->validation_bits & CPER_MEM_VALID_BANK_ADDRESS)
384 p += sprintf(p, "bank_address:%d ",
385 mem_err->bank & CPER_MEM_BANK_ADDRESS_MASK);
386 if (mem_err->validation_bits & (CPER_MEM_VALID_ROW | CPER_MEM_VALID_ROW_EXT)) {
387 u32 row = mem_err->row;
389 row |= cper_get_mem_extension(mem_err->validation_bits, mem_err->extended);
390 p += sprintf(p, "row:%d ", row);
392 if (mem_err->validation_bits & CPER_MEM_VALID_COLUMN)
393 p += sprintf(p, "col:%d ", mem_err->column);
394 if (mem_err->validation_bits & CPER_MEM_VALID_BIT_POSITION)
395 p += sprintf(p, "bit_pos:%d ", mem_err->bit_pos);
396 if (mem_err->validation_bits & CPER_MEM_VALID_MODULE_HANDLE) {
397 const char *bank = NULL, *device = NULL;
398 struct dimm_info *dimm;
400 dmi_memdev_name(mem_err->mem_dev_handle, &bank, &device);
401 if (bank != NULL && device != NULL)
402 p += sprintf(p, "DIMM location:%s %s ", bank, device);
404 p += sprintf(p, "DIMM DMI handle: 0x%.4x ",
405 mem_err->mem_dev_handle);
407 dimm = find_dimm_by_handle(mci, mem_err->mem_dev_handle);
409 e->top_layer = dimm->idx;
410 strcpy(e->label, dimm->label);
413 if (mem_err->validation_bits & CPER_MEM_VALID_CHIP_ID)
414 p += sprintf(p, "chipID: %d ",
415 mem_err->extended >> CPER_MEM_CHIP_ID_SHIFT);
420 strcpy(e->label, "unknown memory");
422 /* All other fields are mapped on e->other_detail */
423 p = pvt->other_detail;
424 p += snprintf(p, sizeof(pvt->other_detail),
425 "APEI location: %s ", e->location);
426 if (mem_err->validation_bits & CPER_MEM_VALID_ERROR_STATUS) {
427 u64 status = mem_err->error_status;
429 p += sprintf(p, "status(0x%016llx): ", (long long)status);
430 switch ((status >> 8) & 0xff) {
432 p += sprintf(p, "Error detected internal to the component ");
435 p += sprintf(p, "Error detected in the bus ");
438 p += sprintf(p, "Storage error in DRAM memory ");
441 p += sprintf(p, "Storage error in TLB ");
444 p += sprintf(p, "Storage error in cache ");
447 p += sprintf(p, "Error in one or more functional units ");
450 p += sprintf(p, "component failed self test ");
453 p += sprintf(p, "Overflow or undervalue of internal queue ");
456 p += sprintf(p, "Virtual address not found on IO-TLB or IO-PDIR ");
459 p += sprintf(p, "Improper access error ");
462 p += sprintf(p, "Access to a memory address which is not mapped to any component ");
465 p += sprintf(p, "Loss of Lockstep ");
468 p += sprintf(p, "Response not associated with a request ");
471 p += sprintf(p, "Bus parity error - must also set the A, C, or D Bits ");
474 p += sprintf(p, "Detection of a PATH_ERROR ");
477 p += sprintf(p, "Bus operation timeout ");
480 p += sprintf(p, "A read was issued to data that has been poisoned ");
483 p += sprintf(p, "reserved ");
487 if (mem_err->validation_bits & CPER_MEM_VALID_REQUESTOR_ID)
488 p += sprintf(p, "requestorID: 0x%016llx ",
489 (long long)mem_err->requestor_id);
490 if (mem_err->validation_bits & CPER_MEM_VALID_RESPONDER_ID)
491 p += sprintf(p, "responderID: 0x%016llx ",
492 (long long)mem_err->responder_id);
493 if (mem_err->validation_bits & CPER_MEM_VALID_TARGET_ID)
494 p += sprintf(p, "targetID: 0x%016llx ",
495 (long long)mem_err->responder_id);
496 if (p > pvt->other_detail)
499 edac_raw_mc_handle_error(e);
502 spin_unlock_irqrestore(&ghes_lock, flags);
506 * Known systems that are safe to enable this module.
508 static struct acpi_platform_list plat_list[] = {
509 {"HPE ", "Server ", 0, ACPI_SIG_FADT, all_versions},
513 int ghes_edac_register(struct ghes *ghes, struct device *dev)
516 struct mem_ctl_info *mci;
517 struct ghes_pvt *pvt;
518 struct edac_mc_layer layers[1];
523 if (IS_ENABLED(CONFIG_X86)) {
524 /* Check if safe to enable on this system */
525 idx = acpi_match_platform_list(plat_list);
526 if (!force_load && idx < 0)
533 /* finish another registration/unregistration instance first */
534 mutex_lock(&ghes_reg_mutex);
537 * We have only one logical memory controller to which all DIMMs belong.
539 if (refcount_inc_not_zero(&ghes_refcount))
544 /* Check if we've got a bogus BIOS */
545 if (!ghes_hw.num_dimms) {
547 ghes_hw.num_dimms = 1;
550 layers[0].type = EDAC_MC_LAYER_ALL_MEM;
551 layers[0].size = ghes_hw.num_dimms;
552 layers[0].is_virt_csrow = true;
554 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct ghes_pvt));
556 pr_info("Can't allocate memory for EDAC data\n");
565 mci->mtype_cap = MEM_FLAG_EMPTY;
566 mci->edac_ctl_cap = EDAC_FLAG_NONE;
567 mci->edac_cap = EDAC_FLAG_NONE;
568 mci->mod_name = "ghes_edac.c";
569 mci->ctl_name = "ghes_edac";
570 mci->dev_name = "ghes";
573 pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
574 pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
575 pr_info("work on such system. Use this driver with caution\n");
576 } else if (idx < 0) {
577 pr_info("This EDAC driver relies on BIOS to enumerate memory and get error reports.\n");
578 pr_info("Unfortunately, not all BIOSes reflect the memory layout correctly.\n");
579 pr_info("So, the end result of using this driver varies from vendor to vendor.\n");
580 pr_info("If you find incorrect reports, please contact your hardware vendor\n");
581 pr_info("to correct its BIOS.\n");
582 pr_info("This system has %d DIMM sockets.\n", ghes_hw.num_dimms);
586 struct dimm_info *src, *dst;
589 mci_for_each_dimm(mci, dst) {
590 src = &ghes_hw.dimms[i];
593 dst->smbios_handle = src->smbios_handle;
594 dst->nr_pages = src->nr_pages;
595 dst->mtype = src->mtype;
596 dst->edac_mode = src->edac_mode;
597 dst->dtype = src->dtype;
598 dst->grain = src->grain;
601 * If no src->label, preserve default label assigned
604 if (strlen(src->label))
605 memcpy(dst->label, src->label, sizeof(src->label));
611 struct dimm_info *dimm = edac_get_dimm(mci, 0, 0, 0);
615 dimm->mtype = MEM_UNKNOWN;
616 dimm->dtype = DEV_UNKNOWN;
617 dimm->edac_mode = EDAC_SECDED;
620 rc = edac_mc_add_mc(mci);
622 pr_info("Can't register with the EDAC core\n");
628 spin_lock_irqsave(&ghes_lock, flags);
630 spin_unlock_irqrestore(&ghes_lock, flags);
632 /* only set on success */
633 refcount_set(&ghes_refcount, 1);
637 /* Not needed anymore */
638 kfree(ghes_hw.dimms);
639 ghes_hw.dimms = NULL;
641 mutex_unlock(&ghes_reg_mutex);
646 void ghes_edac_unregister(struct ghes *ghes)
648 struct mem_ctl_info *mci;
654 mutex_lock(&ghes_reg_mutex);
656 system_scanned = false;
657 memset(&ghes_hw, 0, sizeof(struct ghes_hw_desc));
659 if (!refcount_dec_and_test(&ghes_refcount))
663 * Wait for the irq handler being finished.
665 spin_lock_irqsave(&ghes_lock, flags);
666 mci = ghes_pvt ? ghes_pvt->mci : NULL;
668 spin_unlock_irqrestore(&ghes_lock, flags);
673 mci = edac_mc_del_mc(mci->pdev);
678 mutex_unlock(&ghes_reg_mutex);