1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com
6 #include <linux/kernel.h>
8 #include "k3-psil-priv.h"
10 #define PSIL_PDMA_XY_TR(x) \
14 .ep_type = PSIL_EP_PDMA_XY, \
18 #define PSIL_PDMA_XY_PKT(x) \
22 .ep_type = PSIL_EP_PDMA_XY, \
27 #define PSIL_PDMA_MCASP(x) \
31 .ep_type = PSIL_EP_PDMA_XY, \
37 #define PSIL_ETHERNET(x) \
41 .ep_type = PSIL_EP_NATIVE, \
48 #define PSIL_SA2UL(x, tx) \
52 .ep_type = PSIL_EP_NATIVE, \
60 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
61 static struct psil_ep j721s2_src_ep_map[] = {
62 /* PDMA_MCASP - McASP0-4 */
63 PSIL_PDMA_MCASP(0x4400),
64 PSIL_PDMA_MCASP(0x4401),
65 PSIL_PDMA_MCASP(0x4402),
66 PSIL_PDMA_MCASP(0x4403),
67 PSIL_PDMA_MCASP(0x4404),
68 /* PDMA_SPI_G0 - SPI0-3 */
69 PSIL_PDMA_XY_PKT(0x4600),
70 PSIL_PDMA_XY_PKT(0x4601),
71 PSIL_PDMA_XY_PKT(0x4602),
72 PSIL_PDMA_XY_PKT(0x4603),
73 PSIL_PDMA_XY_PKT(0x4604),
74 PSIL_PDMA_XY_PKT(0x4605),
75 PSIL_PDMA_XY_PKT(0x4606),
76 PSIL_PDMA_XY_PKT(0x4607),
77 PSIL_PDMA_XY_PKT(0x4608),
78 PSIL_PDMA_XY_PKT(0x4609),
79 PSIL_PDMA_XY_PKT(0x460a),
80 PSIL_PDMA_XY_PKT(0x460b),
81 PSIL_PDMA_XY_PKT(0x460c),
82 PSIL_PDMA_XY_PKT(0x460d),
83 PSIL_PDMA_XY_PKT(0x460e),
84 PSIL_PDMA_XY_PKT(0x460f),
85 /* PDMA_SPI_G1 - SPI4-7 */
86 PSIL_PDMA_XY_PKT(0x4610),
87 PSIL_PDMA_XY_PKT(0x4611),
88 PSIL_PDMA_XY_PKT(0x4612),
89 PSIL_PDMA_XY_PKT(0x4613),
90 PSIL_PDMA_XY_PKT(0x4614),
91 PSIL_PDMA_XY_PKT(0x4615),
92 PSIL_PDMA_XY_PKT(0x4616),
93 PSIL_PDMA_XY_PKT(0x4617),
94 PSIL_PDMA_XY_PKT(0x4618),
95 PSIL_PDMA_XY_PKT(0x4619),
96 PSIL_PDMA_XY_PKT(0x461a),
97 PSIL_PDMA_XY_PKT(0x461b),
98 PSIL_PDMA_XY_PKT(0x461c),
99 PSIL_PDMA_XY_PKT(0x461d),
100 PSIL_PDMA_XY_PKT(0x461e),
101 PSIL_PDMA_XY_PKT(0x461f),
102 /* PDMA_USART_G0 - UART0-1 */
103 PSIL_PDMA_XY_PKT(0x4700),
104 PSIL_PDMA_XY_PKT(0x4701),
105 /* PDMA_USART_G1 - UART2-3 */
106 PSIL_PDMA_XY_PKT(0x4702),
107 PSIL_PDMA_XY_PKT(0x4703),
108 /* PDMA_USART_G2 - UART4-9 */
109 PSIL_PDMA_XY_PKT(0x4704),
110 PSIL_PDMA_XY_PKT(0x4705),
111 PSIL_PDMA_XY_PKT(0x4706),
112 PSIL_PDMA_XY_PKT(0x4707),
113 PSIL_PDMA_XY_PKT(0x4708),
114 PSIL_PDMA_XY_PKT(0x4709),
116 PSIL_SA2UL(0x4a40, 0),
117 PSIL_SA2UL(0x4a41, 0),
118 PSIL_SA2UL(0x4a42, 0),
119 PSIL_SA2UL(0x4a43, 0),
121 PSIL_ETHERNET(0x7000),
122 /* MCU_PDMA0 (MCU_PDMA_MISC_G0) - SPI0 */
123 PSIL_PDMA_XY_PKT(0x7100),
124 PSIL_PDMA_XY_PKT(0x7101),
125 PSIL_PDMA_XY_PKT(0x7102),
126 PSIL_PDMA_XY_PKT(0x7103),
127 /* MCU_PDMA1 (MCU_PDMA_MISC_G1) - SPI1-2 */
128 PSIL_PDMA_XY_PKT(0x7200),
129 PSIL_PDMA_XY_PKT(0x7201),
130 PSIL_PDMA_XY_PKT(0x7202),
131 PSIL_PDMA_XY_PKT(0x7203),
132 PSIL_PDMA_XY_PKT(0x7204),
133 PSIL_PDMA_XY_PKT(0x7205),
134 PSIL_PDMA_XY_PKT(0x7206),
135 PSIL_PDMA_XY_PKT(0x7207),
136 /* MCU_PDMA2 (MCU_PDMA_MISC_G2) - UART0 */
137 PSIL_PDMA_XY_PKT(0x7300),
138 /* MCU_PDMA_ADC - ADC0-1 */
139 PSIL_PDMA_XY_TR(0x7400),
140 PSIL_PDMA_XY_TR(0x7401),
141 PSIL_PDMA_XY_TR(0x7402),
142 PSIL_PDMA_XY_TR(0x7403),
144 PSIL_SA2UL(0x7500, 0),
145 PSIL_SA2UL(0x7501, 0),
146 PSIL_SA2UL(0x7502, 0),
147 PSIL_SA2UL(0x7503, 0),
150 /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
151 static struct psil_ep j721s2_dst_ep_map[] = {
153 PSIL_SA2UL(0xca40, 1),
154 PSIL_SA2UL(0xca41, 1),
156 PSIL_ETHERNET(0xf000),
157 PSIL_ETHERNET(0xf001),
158 PSIL_ETHERNET(0xf002),
159 PSIL_ETHERNET(0xf003),
160 PSIL_ETHERNET(0xf004),
161 PSIL_ETHERNET(0xf005),
162 PSIL_ETHERNET(0xf006),
163 PSIL_ETHERNET(0xf007),
165 PSIL_SA2UL(0xf500, 1),
166 PSIL_SA2UL(0xf501, 1),
169 struct psil_ep_map j721s2_ep_map = {
171 .src = j721s2_src_ep_map,
172 .src_count = ARRAY_SIZE(j721s2_src_ep_map),
173 .dst = j721s2_dst_ep_map,
174 .dst_count = ARRAY_SIZE(j721s2_dst_ep_map),